2a50a6d730
the PnP probe is merely a stub as we make assumptions about some of this hardware before we have probed it. Since these devices (with the exception of the speaker) are 'standard', suppress output in the !bootverbose case to clean up the probe messages somewhat.
920 lines
25 KiB
C
920 lines
25 KiB
C
/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
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* $FreeBSD$
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*/
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/*
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* This file contains an aggregated module marked:
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* Copyright (c) 1997, Stefan Esser <se@freebsd.org>
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* All rights reserved.
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* See the notice for details.
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*/
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#include "opt_auto_eoi.h"
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#include "isa.h"
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#include <sys/param.h>
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#ifndef SMP
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#include <machine/lock.h>
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#endif
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/errno.h>
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#include <sys/interrupt.h>
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#include <machine/ipl.h>
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#include <machine/md_var.h>
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#include <machine/segments.h>
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#include <sys/bus.h>
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#if defined(APIC_IO)
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#include <machine/smp.h>
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#include <machine/smptests.h> /** FAST_HI */
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#endif /* APIC_IO */
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#ifdef PC98
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#include <pc98/pc98/pc98.h>
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#include <pc98/pc98/pc98_machdep.h>
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#include <pc98/pc98/epsonio.h>
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#else
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#include <i386/isa/isa.h>
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#endif
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#include <i386/isa/icu.h>
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#if NISA > 0
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#include <isa/isavar.h>
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#endif
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#include <i386/isa/intr_machdep.h>
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#include <sys/interrupt.h>
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#ifdef APIC_IO
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#include <machine/clock.h>
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#endif
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#include "mca.h"
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#if NMCA > 0
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#include <i386/isa/mca_machdep.h>
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#endif
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/* XXX should be in suitable include files */
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#ifdef PC98
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#define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */
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#define ICU_SLAVEID 7
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#else
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#define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */
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#define ICU_SLAVEID 2
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#endif
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#ifdef APIC_IO
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/*
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* This is to accommodate "mixed-mode" programming for
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* motherboards that don't connect the 8254 to the IO APIC.
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*/
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#define AUTO_EOI_1 1
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#endif
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#define NR_INTRNAMES (1 + ICU_LEN + 2 * ICU_LEN)
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u_long *intr_countp[ICU_LEN];
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inthand2_t *intr_handler[ICU_LEN];
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u_int intr_mask[ICU_LEN];
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static u_int* intr_mptr[ICU_LEN];
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void *intr_unit[ICU_LEN];
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static inthand_t *fastintr[ICU_LEN] = {
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&IDTVEC(fastintr0), &IDTVEC(fastintr1),
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&IDTVEC(fastintr2), &IDTVEC(fastintr3),
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&IDTVEC(fastintr4), &IDTVEC(fastintr5),
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&IDTVEC(fastintr6), &IDTVEC(fastintr7),
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&IDTVEC(fastintr8), &IDTVEC(fastintr9),
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&IDTVEC(fastintr10), &IDTVEC(fastintr11),
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&IDTVEC(fastintr12), &IDTVEC(fastintr13),
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&IDTVEC(fastintr14), &IDTVEC(fastintr15),
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#if defined(APIC_IO)
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&IDTVEC(fastintr16), &IDTVEC(fastintr17),
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&IDTVEC(fastintr18), &IDTVEC(fastintr19),
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&IDTVEC(fastintr20), &IDTVEC(fastintr21),
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&IDTVEC(fastintr22), &IDTVEC(fastintr23),
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#endif /* APIC_IO */
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};
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static inthand_t *slowintr[ICU_LEN] = {
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&IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
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&IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
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&IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
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&IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15),
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#if defined(APIC_IO)
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&IDTVEC(intr16), &IDTVEC(intr17), &IDTVEC(intr18), &IDTVEC(intr19),
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&IDTVEC(intr20), &IDTVEC(intr21), &IDTVEC(intr22), &IDTVEC(intr23),
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#endif /* APIC_IO */
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};
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static inthand2_t isa_strayintr;
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#ifdef PC98
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#define NMI_PARITY 0x04
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#define NMI_EPARITY 0x02
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#else
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#define NMI_PARITY (1 << 7)
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#define NMI_IOCHAN (1 << 6)
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#define ENMI_WATCHDOG (1 << 7)
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#define ENMI_BUSTIMER (1 << 6)
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#define ENMI_IOSTATUS (1 << 5)
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#endif
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/*
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* Bus attachment for the ISA PIC.
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*/
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static struct isa_pnp_id atpic_ids[] = {
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{ 0x0000d041 /* PNP0000 */, "AT interrupt controller" },
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{ 0 }
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};
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static int
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atpic_probe(device_t dev)
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{
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int result;
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if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atpic_ids)) <= 0)
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device_quiet(dev);
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return(result);
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}
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/*
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* In the APIC_IO case we might be granted IRQ 2, as this is typically
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* consumed by chaining between the two PIC components. If we're using
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* the APIC, however, this may not be the case, and as such we should
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* free the resource. (XXX untested)
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*
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* The generic ISA attachment code will handle allocating any other resources
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* that we don't explicitly claim here.
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*/
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static int
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atpic_attach(device_t dev)
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{
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#ifdef APIC_IO
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int rid;
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bus_resource_t res;
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/* try to allocate our IRQ and then free it */
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rid = 0;
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res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 0);
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if (res != NULL)
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bus_release_resource(dev, SYS_RES_IRQ, rid, res);
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#endif
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return(0);
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}
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static device_method_t atpic_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, atpic_probe),
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DEVMETHOD(device_attach, atpic_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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{ 0, 0 }
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};
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static driver_t atpic_driver = {
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"atpic",
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atpic_methods,
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1, /* no softc */
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};
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static devclass_t atpic_devclass;
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DRIVER_MODULE(atpic, isa, atpic_driver, atpic_devclass, 0, 0);
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/*
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* Handle a NMI, possibly a machine check.
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* return true to panic system, false to ignore.
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*/
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int
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isa_nmi(cd)
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int cd;
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{
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#ifdef PC98
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int port = inb(0x33);
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if (epson_machine_id == 0x20)
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epson_outb(0xc16, epson_inb(0xc16) | 0x1);
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if (port & NMI_PARITY) {
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panic("BASE RAM parity error, likely hardware failure.");
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} else if (port & NMI_EPARITY) {
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panic("EXTENDED RAM parity error, likely hardware failure.");
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} else {
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printf("\nNMI Resume ??\n");
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return(0);
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}
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#else /* IBM-PC */
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int isa_port = inb(0x61);
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int eisa_port = inb(0x461);
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#if NMCA > 0
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if (MCA_system && mca_bus_nmi())
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return(0);
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#endif
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if (isa_port & NMI_PARITY)
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panic("RAM parity error, likely hardware failure.");
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if (isa_port & NMI_IOCHAN)
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panic("I/O channel check, likely hardware failure.");
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/*
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* On a real EISA machine, this will never happen. However it can
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* happen on ISA machines which implement XT style floating point
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* error handling (very rare). Save them from a meaningless panic.
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*/
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if (eisa_port == 0xff)
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return(0);
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if (eisa_port & ENMI_WATCHDOG)
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panic("EISA watchdog timer expired, likely hardware failure.");
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if (eisa_port & ENMI_BUSTIMER)
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panic("EISA bus timeout, likely hardware failure.");
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if (eisa_port & ENMI_IOSTATUS)
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panic("EISA I/O port status error.");
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printf("\nNMI ISA %x, EISA %x\n", isa_port, eisa_port);
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return(0);
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#endif
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}
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/*
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* Fill in default interrupt table (in case of spuruious interrupt
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* during configuration of kernel, setup interrupt control unit
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*/
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void
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isa_defaultirq()
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{
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int i;
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/* icu vectors */
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for (i = 0; i < ICU_LEN; i++)
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icu_unset(i, (inthand2_t *)NULL);
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/* initialize 8259's */
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#if NMCA > 0
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if (MCA_system)
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outb(IO_ICU1, 0x19); /* reset; program device, four bytes */
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else
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#endif
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outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU1+ICU_IMR_OFFSET, NRSVIDT); /* starting at this vector index */
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outb(IO_ICU1+ICU_IMR_OFFSET, IRQ_SLAVE); /* slave on line 7 */
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#ifdef PC98
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+ICU_IMR_OFFSET, 0x1f); /* (master) auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+ICU_IMR_OFFSET, 0x1d); /* (master) 8086 mode */
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#endif
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#else /* IBM-PC */
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+ICU_IMR_OFFSET, 1); /* 8086 mode */
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#endif
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#endif /* PC98 */
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outb(IO_ICU1+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
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outb(IO_ICU1, 0x0a); /* default to IRR on read */
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#ifndef PC98
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outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
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#endif /* !PC98 */
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#if NMCA > 0
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if (MCA_system)
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outb(IO_ICU2, 0x19); /* reset; program device, four bytes */
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else
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#endif
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outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU2+ICU_IMR_OFFSET, NRSVIDT+8); /* staring at this vector index */
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outb(IO_ICU2+ICU_IMR_OFFSET, ICU_SLAVEID); /* my slave id is 7 */
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#ifdef PC98
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outb(IO_ICU2+ICU_IMR_OFFSET,9); /* 8086 mode */
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#else /* IBM-PC */
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#ifdef AUTO_EOI_2
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outb(IO_ICU2+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU2+ICU_IMR_OFFSET,1); /* 8086 mode */
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#endif
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#endif /* PC98 */
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outb(IO_ICU2+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
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outb(IO_ICU2, 0x0a); /* default to IRR on read */
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}
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/*
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* Caught a stray interrupt, notify
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*/
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static void
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isa_strayintr(vcookiep)
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void *vcookiep;
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{
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int intr = (void **)vcookiep - &intr_unit[0];
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/* DON'T BOTHER FOR NOW! */
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/* for some reason, we get bursts of intr #7, even if not enabled! */
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/*
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* Well the reason you got bursts of intr #7 is because someone
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* raised an interrupt line and dropped it before the 8259 could
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* prioritize it. This is documented in the intel data book. This
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* means you have BAD hardware! I have changed this so that only
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* the first 5 get logged, then it quits logging them, and puts
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* out a special message. rgrimes 3/25/1993
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*/
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/*
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* XXX TODO print a different message for #7 if it is for a
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* glitch. Glitches can be distinguished from real #7's by
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* testing that the in-service bit is _not_ set. The test
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* must be done before sending an EOI so it can't be done if
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* we are using AUTO_EOI_1.
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*/
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if (intrcnt[1 + intr] <= 5)
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log(LOG_ERR, "stray irq %d\n", intr);
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if (intrcnt[1 + intr] == 5)
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log(LOG_CRIT,
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"too many stray irq %d's; not logging any more\n", intr);
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}
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#if NISA > 0
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/*
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* Return a bitmap of the current interrupt requests. This is 8259-specific
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* and is only suitable for use at probe time.
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*/
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intrmask_t
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isa_irq_pending()
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{
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u_char irr1;
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u_char irr2;
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irr1 = inb(IO_ICU1);
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irr2 = inb(IO_ICU2);
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return ((irr2 << 8) | irr1);
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}
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#endif
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int
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update_intr_masks(void)
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{
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int intr, n=0;
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u_int mask,*maskptr;
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for (intr=0; intr < ICU_LEN; intr ++) {
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#if defined(APIC_IO)
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/* no 8259 SLAVE to ignore */
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#else
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if (intr==ICU_SLAVEID) continue; /* ignore 8259 SLAVE output */
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#endif /* APIC_IO */
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maskptr = intr_mptr[intr];
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if (!maskptr)
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continue;
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*maskptr |= SWI_LOW_MASK | (1 << intr);
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mask = *maskptr;
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if (mask != intr_mask[intr]) {
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#if 0
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printf ("intr_mask[%2d] old=%08x new=%08x ptr=%p.\n",
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intr, intr_mask[intr], mask, maskptr);
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#endif
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intr_mask[intr]=mask;
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n++;
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}
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}
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return (n);
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}
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|
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static void
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update_intrname(int intr, char *name)
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{
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char buf[32];
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char *cp;
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int name_index, off, strayintr;
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|
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/*
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* Initialise strings for bitbucket and stray interrupt counters.
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* These have statically allocated indices 0 and 1 through ICU_LEN.
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*/
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if (intrnames[0] == '\0') {
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off = sprintf(intrnames, "???") + 1;
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for (strayintr = 0; strayintr < ICU_LEN; strayintr++)
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off += sprintf(intrnames + off, "stray irq%d",
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strayintr) + 1;
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}
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|
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if (name == NULL)
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name = "???";
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if (snprintf(buf, sizeof(buf), "%s irq%d", name, intr) >= sizeof(buf))
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goto use_bitbucket;
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|
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/*
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* Search for `buf' in `intrnames'. In the usual case when it is
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* not found, append it to the end if there is enough space (the \0
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* terminator for the previous string, if any, becomes a separator).
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*/
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for (cp = intrnames, name_index = 0;
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cp != eintrnames && name_index < NR_INTRNAMES;
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cp += strlen(cp) + 1, name_index++) {
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if (*cp == '\0') {
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if (strlen(buf) >= eintrnames - cp)
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break;
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strcpy(cp, buf);
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goto found;
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}
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if (strcmp(cp, buf) == 0)
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goto found;
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}
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use_bitbucket:
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printf("update_intrname: counting %s irq%d as %s\n", name, intr,
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intrnames);
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name_index = 0;
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found:
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intr_countp[intr] = &intrcnt[name_index];
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}
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|
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int
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icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
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|
{
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#ifdef FAST_HI
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|
int select; /* the select register is 8 bits */
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int vector;
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u_int32_t value; /* the window register is 32 bits */
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#endif /* FAST_HI */
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u_long ef;
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u_int mask = (maskptr ? *maskptr : 0);
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|
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#if defined(APIC_IO)
|
|
if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */
|
|
#else
|
|
if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID)
|
|
#endif /* APIC_IO */
|
|
if (intr_handler[intr] != isa_strayintr)
|
|
return (EBUSY);
|
|
|
|
ef = read_eflags();
|
|
disable_intr();
|
|
intr_handler[intr] = handler;
|
|
intr_mptr[intr] = maskptr;
|
|
intr_mask[intr] = mask | SWI_LOW_MASK | (1 << intr);
|
|
intr_unit[intr] = arg;
|
|
#ifdef FAST_HI
|
|
if (flags & INTR_FAST) {
|
|
vector = TPR_FAST_INTS + intr;
|
|
setidt(vector, fastintr[intr],
|
|
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
|
}
|
|
else {
|
|
vector = TPR_SLOW_INTS + intr;
|
|
#ifdef APIC_INTR_REORDER
|
|
#ifdef APIC_INTR_HIGHPRI_CLOCK
|
|
/* XXX: Hack (kludge?) for more accurate clock. */
|
|
if (intr == apic_8254_intr || intr == 8) {
|
|
vector = TPR_FAST_INTS + intr;
|
|
}
|
|
#endif
|
|
#endif
|
|
setidt(vector, slowintr[intr],
|
|
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
|
}
|
|
#ifdef APIC_INTR_REORDER
|
|
set_lapic_isrloc(intr, vector);
|
|
#endif
|
|
/*
|
|
* Reprogram the vector in the IO APIC.
|
|
*/
|
|
if (int_to_apicintpin[intr].ioapic >= 0) {
|
|
select = int_to_apicintpin[intr].redirindex;
|
|
value = io_apic_read(int_to_apicintpin[intr].ioapic,
|
|
select) & ~IOART_INTVEC;
|
|
io_apic_write(int_to_apicintpin[intr].ioapic,
|
|
select, value | vector);
|
|
}
|
|
#else
|
|
setidt(ICU_OFFSET + intr,
|
|
flags & INTR_FAST ? fastintr[intr] : slowintr[intr],
|
|
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
|
#endif /* FAST_HI */
|
|
INTREN(1 << intr);
|
|
MPINTR_UNLOCK();
|
|
write_eflags(ef);
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
icu_unset(intr, handler)
|
|
int intr;
|
|
inthand2_t *handler;
|
|
{
|
|
u_long ef;
|
|
|
|
if ((u_int)intr >= ICU_LEN || handler != intr_handler[intr])
|
|
return (EINVAL);
|
|
|
|
INTRDIS(1 << intr);
|
|
ef = read_eflags();
|
|
disable_intr();
|
|
intr_countp[intr] = &intrcnt[1 + intr];
|
|
intr_handler[intr] = isa_strayintr;
|
|
intr_mptr[intr] = NULL;
|
|
intr_mask[intr] = HWI_MASK | SWI_MASK;
|
|
intr_unit[intr] = &intr_unit[intr];
|
|
#ifdef FAST_HI_XXX
|
|
/* XXX how do I re-create dvp here? */
|
|
setidt(flags & INTR_FAST ? TPR_FAST_INTS + intr : TPR_SLOW_INTS + intr,
|
|
slowintr[intr], SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
|
#else /* FAST_HI */
|
|
#ifdef APIC_INTR_REORDER
|
|
set_lapic_isrloc(intr, ICU_OFFSET + intr);
|
|
#endif
|
|
setidt(ICU_OFFSET + intr, slowintr[intr], SDT_SYS386IGT, SEL_KPL,
|
|
GSEL(GCODE_SEL, SEL_KPL));
|
|
#endif /* FAST_HI */
|
|
MPINTR_UNLOCK();
|
|
write_eflags(ef);
|
|
return (0);
|
|
}
|
|
|
|
/* The following notice applies beyond this point in the file */
|
|
|
|
/*
|
|
* Copyright (c) 1997, Stefan Esser <se@freebsd.org>
|
|
* All rights reserved.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions
|
|
* are met:
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
* notice unmodified, this list of conditions, and the following
|
|
* disclaimer.
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
|
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
|
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
|
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
*
|
|
* $FreeBSD$
|
|
*
|
|
*/
|
|
|
|
typedef struct intrec {
|
|
intrmask_t mask;
|
|
inthand2_t *handler;
|
|
void *argument;
|
|
struct intrec *next;
|
|
char *name;
|
|
int intr;
|
|
intrmask_t *maskptr;
|
|
int flags;
|
|
} intrec;
|
|
|
|
static intrec *intreclist_head[ICU_LEN];
|
|
|
|
/*
|
|
* The interrupt multiplexer calls each of the handlers in turn. The
|
|
* ipl is initially quite low. It is raised as necessary for each call
|
|
* and lowered after the call. Thus out of order handling is possible
|
|
* even for interrupts of the same type. This is probably no more
|
|
* harmful than out of order handling in general (not harmful except
|
|
* for real time response which we don't support anyway).
|
|
*/
|
|
static void
|
|
intr_mux(void *arg)
|
|
{
|
|
intrec *p;
|
|
intrmask_t oldspl;
|
|
|
|
for (p = arg; p != NULL; p = p->next) {
|
|
oldspl = splq(p->mask);
|
|
p->handler(p->argument);
|
|
splx(oldspl);
|
|
}
|
|
}
|
|
|
|
static intrec*
|
|
find_idesc(unsigned *maskptr, int irq)
|
|
{
|
|
intrec *p = intreclist_head[irq];
|
|
|
|
while (p && p->maskptr != maskptr)
|
|
p = p->next;
|
|
|
|
return (p);
|
|
}
|
|
|
|
static intrec**
|
|
find_pred(intrec *idesc, int irq)
|
|
{
|
|
intrec **pp = &intreclist_head[irq];
|
|
intrec *p = *pp;
|
|
|
|
while (p != idesc) {
|
|
if (p == NULL)
|
|
return (NULL);
|
|
pp = &p->next;
|
|
p = *pp;
|
|
}
|
|
return (pp);
|
|
}
|
|
|
|
/*
|
|
* Both the low level handler and the shared interrupt multiplexer
|
|
* block out further interrupts as set in the handlers "mask", while
|
|
* the handler is running. In fact *maskptr should be used for this
|
|
* purpose, but since this requires one more pointer dereference on
|
|
* each interrupt, we rather bother update "mask" whenever *maskptr
|
|
* changes. The function "update_masks" should be called **after**
|
|
* all manipulation of the linked list of interrupt handlers hung
|
|
* off of intrdec_head[irq] is complete, since the chain of handlers
|
|
* will both determine the *maskptr values and the instances of mask
|
|
* that are fixed. This function should be called with the irq for
|
|
* which a new handler has been add blocked, since the masks may not
|
|
* yet know about the use of this irq for a device of a certain class.
|
|
*/
|
|
|
|
static void
|
|
update_mux_masks(void)
|
|
{
|
|
int irq;
|
|
for (irq = 0; irq < ICU_LEN; irq++) {
|
|
intrec *idesc = intreclist_head[irq];
|
|
while (idesc != NULL) {
|
|
if (idesc->maskptr != NULL) {
|
|
/* our copy of *maskptr may be stale, refresh */
|
|
idesc->mask = *idesc->maskptr;
|
|
}
|
|
idesc = idesc->next;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
update_masks(intrmask_t *maskptr, int irq)
|
|
{
|
|
intrmask_t mask = 1 << irq;
|
|
|
|
if (maskptr == NULL)
|
|
return;
|
|
|
|
if (find_idesc(maskptr, irq) == NULL) {
|
|
/* no reference to this maskptr was found in this irq's chain */
|
|
if ((*maskptr & mask) == 0)
|
|
return;
|
|
/* the irq was included in the classes mask, remove it */
|
|
*maskptr &= ~mask;
|
|
} else {
|
|
/* a reference to this maskptr was found in this irq's chain */
|
|
if ((*maskptr & mask) != 0)
|
|
return;
|
|
/* put the irq into the classes mask */
|
|
*maskptr |= mask;
|
|
}
|
|
/* we need to update all values in the intr_mask[irq] array */
|
|
update_intr_masks();
|
|
/* update mask in chains of the interrupt multiplex handler as well */
|
|
update_mux_masks();
|
|
}
|
|
|
|
/*
|
|
* Add interrupt handler to linked list hung off of intreclist_head[irq]
|
|
* and install shared interrupt multiplex handler, if necessary
|
|
*/
|
|
|
|
static int
|
|
add_intrdesc(intrec *idesc)
|
|
{
|
|
int irq = idesc->intr;
|
|
|
|
intrec *head = intreclist_head[irq];
|
|
|
|
if (head == NULL) {
|
|
/* first handler for this irq, just install it */
|
|
if (icu_setup(irq, idesc->handler, idesc->argument,
|
|
idesc->maskptr, idesc->flags) != 0)
|
|
return (-1);
|
|
|
|
update_intrname(irq, idesc->name);
|
|
/* keep reference */
|
|
intreclist_head[irq] = idesc;
|
|
} else {
|
|
if ((idesc->flags & INTR_EXCL) != 0
|
|
|| (head->flags & INTR_EXCL) != 0) {
|
|
/*
|
|
* can't append new handler, if either list head or
|
|
* new handler do not allow interrupts to be shared
|
|
*/
|
|
if (bootverbose)
|
|
printf("\tdevice combination doesn't support "
|
|
"shared irq%d\n", irq);
|
|
return (-1);
|
|
}
|
|
if (head->next == NULL) {
|
|
/*
|
|
* second handler for this irq, replace device driver's
|
|
* handler by shared interrupt multiplexer function
|
|
*/
|
|
icu_unset(irq, head->handler);
|
|
if (icu_setup(irq, intr_mux, head, 0, 0) != 0)
|
|
return (-1);
|
|
if (bootverbose)
|
|
printf("\tusing shared irq%d.\n", irq);
|
|
update_intrname(irq, "mux");
|
|
}
|
|
/* just append to the end of the chain */
|
|
while (head->next != NULL)
|
|
head = head->next;
|
|
head->next = idesc;
|
|
}
|
|
update_masks(idesc->maskptr, irq);
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Create and activate an interrupt handler descriptor data structure.
|
|
*
|
|
* The dev_instance pointer is required for resource management, and will
|
|
* only be passed through to resource_claim().
|
|
*
|
|
* There will be functions that derive a driver and unit name from a
|
|
* dev_instance variable, and those functions will be used to maintain the
|
|
* interrupt counter label array referenced by systat and vmstat to report
|
|
* device interrupt rates (->update_intrlabels).
|
|
*
|
|
* Add the interrupt handler descriptor data structure created by an
|
|
* earlier call of create_intr() to the linked list for its irq and
|
|
* adjust the interrupt masks if necessary.
|
|
*
|
|
* WARNING: This is an internal function and not to be used by device
|
|
* drivers. It is subject to change without notice.
|
|
*/
|
|
|
|
intrec *
|
|
inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
|
|
intrmask_t *maskptr, int flags)
|
|
{
|
|
intrec *idesc;
|
|
int errcode = -1;
|
|
intrmask_t oldspl;
|
|
|
|
if (ICU_LEN > 8 * sizeof *maskptr) {
|
|
printf("create_intr: ICU_LEN of %d too high for %d bit intrmask\n",
|
|
ICU_LEN, 8 * sizeof *maskptr);
|
|
return (NULL);
|
|
}
|
|
if ((unsigned)irq >= ICU_LEN) {
|
|
printf("create_intr: requested irq%d too high, limit is %d\n",
|
|
irq, ICU_LEN -1);
|
|
return (NULL);
|
|
}
|
|
|
|
idesc = malloc(sizeof *idesc, M_DEVBUF, M_WAITOK);
|
|
if (idesc == NULL)
|
|
return NULL;
|
|
bzero(idesc, sizeof *idesc);
|
|
|
|
if (name == NULL)
|
|
name = "???";
|
|
idesc->name = malloc(strlen(name) + 1, M_DEVBUF, M_WAITOK);
|
|
if (idesc->name == NULL) {
|
|
free(idesc, M_DEVBUF);
|
|
return NULL;
|
|
}
|
|
strcpy(idesc->name, name);
|
|
|
|
idesc->handler = handler;
|
|
idesc->argument = arg;
|
|
idesc->maskptr = maskptr;
|
|
idesc->intr = irq;
|
|
idesc->flags = flags;
|
|
|
|
/* block this irq */
|
|
oldspl = splq(1 << irq);
|
|
|
|
/* add irq to class selected by maskptr */
|
|
errcode = add_intrdesc(idesc);
|
|
splx(oldspl);
|
|
|
|
if (errcode != 0) {
|
|
if (bootverbose)
|
|
printf("\tintr_connect(irq%d) failed, result=%d\n",
|
|
irq, errcode);
|
|
free(idesc->name, M_DEVBUF);
|
|
free(idesc, M_DEVBUF);
|
|
idesc = NULL;
|
|
}
|
|
|
|
return (idesc);
|
|
}
|
|
|
|
/*
|
|
* Deactivate and remove the interrupt handler descriptor data connected
|
|
* created by an earlier call of intr_connect() from the linked list and
|
|
* adjust theinterrupt masks if necessary.
|
|
*
|
|
* Return the memory held by the interrupt handler descriptor data structure
|
|
* to the system. Make sure, the handler is not actively used anymore, before.
|
|
*/
|
|
|
|
int
|
|
inthand_remove(intrec *idesc)
|
|
{
|
|
intrec **hook, *head;
|
|
int irq;
|
|
int errcode = 0;
|
|
intrmask_t oldspl;
|
|
|
|
if (idesc == NULL)
|
|
return (-1);
|
|
|
|
irq = idesc->intr;
|
|
|
|
/* find pointer that keeps the reference to this interrupt descriptor */
|
|
hook = find_pred(idesc, irq);
|
|
if (hook == NULL)
|
|
return (-1);
|
|
|
|
/* make copy of original list head, the line after may overwrite it */
|
|
head = intreclist_head[irq];
|
|
|
|
/* unlink: make predecessor point to idesc->next instead of to idesc */
|
|
*hook = idesc->next;
|
|
|
|
/* now check whether the element we removed was the list head */
|
|
if (idesc == head) {
|
|
|
|
oldspl = splq(1 << irq);
|
|
|
|
/* check whether the new list head is the only element on list */
|
|
head = intreclist_head[irq];
|
|
if (head != NULL) {
|
|
icu_unset(irq, intr_mux);
|
|
if (head->next != NULL) {
|
|
/* install the multiplex handler with new list head as argument */
|
|
errcode = icu_setup(irq, intr_mux, head, 0, 0);
|
|
if (errcode == 0)
|
|
update_intrname(irq, NULL);
|
|
} else {
|
|
/* install the one remaining handler for this irq */
|
|
errcode = icu_setup(irq, head->handler,
|
|
head->argument,
|
|
head->maskptr, head->flags);
|
|
if (errcode == 0)
|
|
update_intrname(irq, head->name);
|
|
}
|
|
} else {
|
|
/* revert to old handler, eg: strayintr */
|
|
icu_unset(irq, idesc->handler);
|
|
}
|
|
splx(oldspl);
|
|
}
|
|
update_masks(idesc->maskptr, irq);
|
|
free(idesc, M_DEVBUF);
|
|
return (0);
|
|
}
|