2b0a1c086d
their HotRod controller and on SIIG PCI ultra DMA controller. These changes also made lots of the Promise code go away, its all much more generic this way. Get rid of atapi_immed_cmd, instead use the queue to move atapi commands from interrupt context if nessesary, the entire atapi layer has gotten an overhaul. Lots of fixes to utililize the new features in subr_disk.c etc, and get rid of the last biots of softc arrays in the drivers, the only one left is atadevices which cannot easily go away (yet). Use our own malloc names, its a lot easier to track memory usage this way. General cleanup overall.
546 lines
17 KiB
C
546 lines
17 KiB
C
/*-
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* Copyright (c) 1998,1999 Søren Schmidt
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "pci.h"
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#include "apm.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/buf.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#if NPCI > 0
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#endif
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#if NAPM > 0
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#include <machine/apm_bios.h>
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#endif
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#include <dev/ata/ata-all.h>
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/* prototypes */
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static void hpt366_timing(struct ata_softc *, int32_t, int32_t);
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/* misc defines */
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#define MIN(a,b) ((a)>(b)?(b):(a))
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#ifdef __alpha__
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#undef vtophys
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#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
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#endif
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#if NPCI > 0
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int32_t
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ata_dmainit(struct ata_softc *scp, int32_t device,
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int32_t apiomode, int32_t wdmamode, int32_t udmamode)
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{
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int32_t type, devno, error;
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void *dmatab;
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if (!scp->bmaddr)
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return -1;
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#ifdef ATA_DMADEBUG
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printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n",
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scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr);
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#endif
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/* if simplex controller, only allow DMA on primary channel */
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if (scp->unit == 1) {
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outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) &
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(ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
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if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) {
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printf("ata%d: simplex device, DMA on primary channel only\n",
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scp->lun);
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return -1;
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}
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}
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if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
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return -1;
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if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
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(((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {
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printf("ata_dmainit: dmatab crosses page boundary, no DMA\n");
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free(dmatab, M_DEVBUF);
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return -1;
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}
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scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab;
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switch (type = pci_get_devid(scp->dev)) {
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case 0x71118086: /* Intel PIIX4 */
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if (udmamode >= 2) {
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int32_t mask48, new48;
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
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mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
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new48 = (1 << devno) + (2 << (16 + (devno << 2)));
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pci_write_config(scp->dev, 0x48,
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(pci_read_config(scp->dev, 0x48, 4) &
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~mask48) | new48, 4);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
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return 0;
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}
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/* FALLTHROUGH */
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case 0x70108086: /* Intel PIIX3 */
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if (wdmamode >= 2 && apiomode >= 4) {
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int32_t mask40, new40, mask44, new44;
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/* if SITRE not set doit for both channels */
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if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){
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new40 = pci_read_config(scp->dev, 0x40, 4);
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new44 = pci_read_config(scp->dev, 0x44, 4);
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if (!(new40 & 0x00004000)) {
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new44 &= ~0x0000000f;
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new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
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}
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if (!(new40 & 0x40000000)) {
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new44 &= ~0x000000f0;
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new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
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}
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new40 |= 0x40004000;
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pci_write_config(scp->dev, 0x40, new40, 4);
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pci_write_config(scp->dev, 0x44, new44, 4);
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}
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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if (device == ATA_MASTER) {
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mask40 = 0x0000330f;
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new40 = 0x00002307;
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mask44 = 0;
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new44 = 0;
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} else {
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mask40 = 0x000000f0;
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new40 = 0x00000070;
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mask44 = 0x0000000f;
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new44 = 0x0000000b;
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}
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if (scp->unit) {
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mask40 <<= 16;
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new40 <<= 16;
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mask44 <<= 4;
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new44 <<= 4;
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}
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pci_write_config(scp->dev, 0x40,
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(pci_read_config(scp->dev, 0x40, 4) & ~mask40) |
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new40, 4);
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pci_write_config(scp->dev, 0x44,
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(pci_read_config(scp->dev, 0x44, 4) & ~mask44) |
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new44, 4);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
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return 0;
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}
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break;
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case 0x12308086: /* Intel PIIX */
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/* probably not worth the trouble */
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break;
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case 0x522910b9: /* AcerLabs Aladdin IV/V */
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/* the Aladdin has to be setup specially for ATAPI devices */
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if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
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(device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) {
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int8_t word53 = pci_read_config(scp->dev, 0x53, 1);
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/* set atapi fifo, this should always work */
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pci_write_config(scp->dev, 0x53, (word53 & ~0x01) | 0x02, 1);
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/* if both master & slave are atapi devices dont allow DMA */
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if (scp->devices & ATA_ATAPI_MASTER &&
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scp->devices & ATA_ATAPI_SLAVE) {
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printf("ata%d: Aladdin: two atapi devices on this channel, "
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"DMA disabled\n", scp->lun);
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break;
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}
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/* if needed set atapi fifo & dma */
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if ((udmamode >=2) || (wdmamode >= 2 && apiomode >= 4)) {
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pci_write_config(scp->dev, 0x53, word53 | 0x03, 1);
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scp->flags |= ATA_ATAPI_DMA_RO;
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if (device == ATA_MASTER)
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outb(scp->bmaddr + ATA_BMSTAT_PORT,
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inb(scp->bmaddr + ATA_BMSTAT_PORT) |
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ATA_BMSTAT_DMA_MASTER);
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else
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outb(scp->bmaddr + ATA_BMSTAT_PORT,
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inb(scp->bmaddr + ATA_BMSTAT_PORT) |
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ATA_BMSTAT_DMA_SLAVE);
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}
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}
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if (udmamode >=2) {
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int32_t word54 = pci_read_config(scp->dev, 0x54, 4);
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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word54 |= 0x5555;
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word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2)));
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pci_write_config(scp->dev, 0x54, word54, 4);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
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return 0;
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}
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else if (wdmamode >= 2 && apiomode >= 4) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
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return 0;
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}
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break;
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case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */
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case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */
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/* the Promise can only do DMA on ATA disks not on ATAPI devices */
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if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
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(device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
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break;
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devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
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if (udmamode >=2) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
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return 0;
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}
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else if (wdmamode >= 2 && apiomode >= 4) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
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return 0;
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}
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else {
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if (bootverbose)
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printf("ata%d: %s: setting PIO mode on Promise chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave");
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pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4);
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}
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break;
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case 0x00041103: /* HighPoint HPT366 IDE controller */
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/* punt on ATAPI devices for now */
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if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
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(device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
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break;
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devno = (device == ATA_MASTER) ? 0 : 1;
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if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA4, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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hpt366_timing(scp, device, ATA_MODE_UDMA4);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
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return 0;
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}
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else if (udmamode >=3) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA3, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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hpt366_timing(scp, device, ATA_MODE_UDMA3);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3;
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return 0;
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}
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else if (udmamode >=2) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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hpt366_timing(scp, device, ATA_MODE_UDMA2);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
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return 0;
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}
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else if (wdmamode >= 2 && apiomode >= 4) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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hpt366_timing(scp, device, ATA_MODE_WDMA2);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
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return 0;
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}
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else {
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if (bootverbose)
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printf("ata%d: %s: setting PIO mode on HPT366 chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave");
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hpt366_timing(scp, device, ATA_MODE_PIO);
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}
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break;
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default: /* unknown controller chip */
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/* better not try generic DMA on ATAPI devices it almost never works */
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if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
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(device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
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break;
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/* well, we have no support for this, but try anyways */
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if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) &&
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(inb(scp->bmaddr + ATA_BMSTAT_PORT) &
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((device == ATA_MASTER) ?
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ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER))) {
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
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if (bootverbose)
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printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (error)
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break;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
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return 0;
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}
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}
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free(dmatab, M_DEVBUF);
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return -1;
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}
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int32_t
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ata_dmasetup(struct ata_softc *scp, int32_t device,
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int8_t *data, int32_t count, int32_t flags)
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{
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struct ata_dmaentry *dmatab;
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u_int32_t dma_count, dma_base;
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int32_t i = 0;
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#ifdef ATA_DMADEBUG
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printf("ata%d: dmasetup\n", scp->lun);
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#endif
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if (((uintptr_t)data & 1) || (count & 1))
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return -1;
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if (!count) {
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#ifdef ATA_DMADEBUG
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printf("ata%d: zero length DMA transfer attempt on %s\n",
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scp->lun, ((device == ATA_MASTER) ? "master" : "slave"));
|
|
#endif
|
|
return -1;
|
|
}
|
|
|
|
dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1];
|
|
dma_base = vtophys(data);
|
|
dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK)));
|
|
data += dma_count;
|
|
count -= dma_count;
|
|
|
|
while (count) {
|
|
dmatab[i].base = dma_base;
|
|
dmatab[i].count = (dma_count & 0xffff);
|
|
i++;
|
|
if (i >= ATA_DMA_ENTRIES) {
|
|
printf("ata%d: too many segments in DMA table for %s\n",
|
|
scp->lun, (device ? "slave" : "master"));
|
|
return -1;
|
|
}
|
|
dma_base = vtophys(data);
|
|
dma_count = MIN(count, PAGE_SIZE);
|
|
data += MIN(count, PAGE_SIZE);
|
|
count -= MIN(count, PAGE_SIZE);
|
|
}
|
|
#ifdef ATA_DMADEBUG
|
|
printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count);
|
|
#endif
|
|
dmatab[i].base = dma_base;
|
|
dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
|
|
|
|
outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
|
|
#ifdef ATA_DMADEBUG
|
|
printf("dmatab=%08x %08x\n",
|
|
vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT));
|
|
#endif
|
|
outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
|
|
outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
|
|
(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
ata_dmastart(struct ata_softc *scp)
|
|
{
|
|
#ifdef ATA_DMADEBUG
|
|
printf("ata%d: dmastart\n", scp->lun);
|
|
#endif
|
|
scp->flags |= ATA_DMA_ACTIVE;
|
|
outb(scp->bmaddr + ATA_BMCMD_PORT,
|
|
inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
|
|
}
|
|
|
|
int32_t
|
|
ata_dmadone(struct ata_softc *scp)
|
|
{
|
|
#ifdef ATA_DMADEBUG
|
|
printf("ata%d: dmadone\n", scp->lun);
|
|
#endif
|
|
outb(scp->bmaddr + ATA_BMCMD_PORT,
|
|
inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
|
|
scp->flags &= ~ATA_DMA_ACTIVE;
|
|
return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
|
|
}
|
|
|
|
int32_t
|
|
ata_dmastatus(struct ata_softc *scp)
|
|
{
|
|
#ifdef ATA_DMADEBUG
|
|
printf("ata%d: dmastatus\n", scp->lun);
|
|
#endif
|
|
return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
|
|
}
|
|
|
|
static void
|
|
hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode)
|
|
{
|
|
u_int32_t timing;
|
|
|
|
switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){
|
|
case 0x85: /* 25Mhz */
|
|
switch (mode) {
|
|
case ATA_MODE_PIO: timing = 0xc0ca8521; break;
|
|
case ATA_MODE_WDMA2: timing = 0xa0ca8521; break;
|
|
case ATA_MODE_UDMA2:
|
|
case ATA_MODE_UDMA3: timing = 0x90cf8521; break;
|
|
case ATA_MODE_UDMA4: timing = 0x90c98521; break;
|
|
default: timing = 0x01208585;
|
|
}
|
|
break;
|
|
default:
|
|
case 0xa7: /* 33MHz */
|
|
switch (mode) {
|
|
case ATA_MODE_PIO: timing = 0xc0c8a731; break;
|
|
case ATA_MODE_WDMA2: timing = 0xa0c8a731; break;
|
|
case ATA_MODE_UDMA2: timing = 0x90caa731; break;
|
|
case ATA_MODE_UDMA3: timing = 0x90cfa731; break;
|
|
case ATA_MODE_UDMA4: timing = 0x90c9a731; break;
|
|
default: timing = 0x0120a7a7;
|
|
}
|
|
break;
|
|
case 0xd9: /* 40Mhz */
|
|
switch (mode) {
|
|
case ATA_MODE_PIO: timing = 0xc008d963; break;
|
|
case ATA_MODE_WDMA2: timing = 0xa008d943; break;
|
|
case ATA_MODE_UDMA2: timing = 0x900bd943; break;
|
|
case ATA_MODE_UDMA3: timing = 0x900ad943; break;
|
|
case ATA_MODE_UDMA4: timing = 0x900fd943; break;
|
|
default: timing = 0x0120d9d9;
|
|
}
|
|
}
|
|
pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4);
|
|
}
|
|
|
|
#else /* NPCI > 0 */
|
|
|
|
int32_t
|
|
ata_dmainit(struct ata_softc *scp, int32_t device,
|
|
int32_t piomode, int32_t wdmamode, int32_t udmamode)
|
|
{
|
|
return -1;
|
|
}
|
|
|
|
int32_t
|
|
ata_dmasetup(struct ata_softc *scp, int32_t device,
|
|
int8_t *data, int32_t count, int32_t flags)
|
|
{
|
|
return -1;
|
|
}
|
|
|
|
void
|
|
ata_dmastart(struct ata_softc *scp)
|
|
{
|
|
}
|
|
|
|
int32_t
|
|
ata_dmadone(struct ata_softc *scp)
|
|
{
|
|
return -1;
|
|
}
|
|
|
|
int32_t
|
|
ata_dmastatus(struct ata_softc *scp)
|
|
{
|
|
return -1;
|
|
}
|
|
|
|
#endif /* NPCI > 0 */
|