58fb7d8e0b
ahc_pci.c:
Prepare for making ahc a module by adding module dependency
and version info.
aic7770.c:
Remove linux header ifdefs. The headers are handled differently
in Linux where local includes (those using "'s instead of <>'s)
are allowed.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
aic7xxx.c:
Remove linux header ifdefs.
current->curr to avoid Linux's use of current as a
#define for the current task on some architectures.
Add a helper function, ahc_assert_atn(), for use in
message phases we handle manually. This hides the fact
that U160 chips with the expected phase matching disabled
need to have SCSISIGO updated differently.
if (ahc_check_residual(scb) != 0)
ahc_calc_residual(scb);
else
ahc_set_residual(scb, 0);
becomes:
ahc_update_residual(scb);
Modify scsi parity error (or CRC error) handling to
reflect expected phase being disabled on U160 chips.
Move SELTO handling above BUSFREE handling so we can
use the new busfree interrupt behavior on U160 chips.
In ahc_build_transfer_msg() filter the period and ppr_options
prior to deciding whether a PPR message is required.
ppr_options may be forced to zero which will effect our
decision.
Correct a long standing but latent bug in ahc_find_syncrate().
We could choose a DT only rate even though DT transfers were
disabled. In the CAM environment this was unlikely as CAM
filters our rate to a non-DT value if the device does not
support such rates.
When displaing controller characteristics, include the
speed of the chip. This way we can modify the transfer
speed based on optional features that are enabled/disabled
in a particular application.
Add support for switching from fully blown tagged queing
to just using simple queue tags should the device reject
an ordered tag.
Remove per-target "current" disconnect and tag queuing
enable flags. These should be per-device and are not
referenced internally be the driver, so we let the OSM
track this state if it needs to.
Use SCSI-3 message terminology.
aic7xxx.h:
The real 7850 does not support Ultra modes, but there are
several cards that use the generic 7850 PCI ID even though
they are using an Ultra capable chip (7859/7860). We start
out with the AHC_ULTRA feature set and then check the
DEVSTATUS register to determine if the capability is really
present.
current -> curr
ahc_calc_residual() is no longer static allowing it to
be called from ahc_update_residual() in aic7xxx_inline.h.
Update some serial eeprom definitions for the latest
BIOS versions.
aic7xxx.reg:
Add a combined DATA_PHASE mask to the SCSIPHASE register
definition to simplify some sequencer code.
aic7xxx.seq:
Take advantage of some performance features available only
on the U160 chips. The auto-ack feature allows us to ack
data-in phases up to the data-fifo size while the sequencer
is still setting up the DMA engine. This greatly reduces
read transfer latency and simplifies testing for transfer
complete (check SCSIEN only). We also disable the expected
phase feature, and enable the new bus free interrupt behavior,
to avoid a few instructions.
Re-arrange the Ultra2+ data phase handling to allow us to
do more work in parallel with the data fifo flushing on a
read.
On an SDTR, ack the message immediately so the target can
prepare the next phase or message byte in parallel with
our work to honor the message.
aic7xxx_93cx6.c:
Remove linux header ifdefs.
aic7xxx_freebsd.c:
current -> curr
Add a module event handler.
Handle tag downgrades in our ahc_send_async() handler.
We won't be able to downgrade to "basic queuing" until
CAM is made aware of this queuing type.
aic7xxx_freebsd.h:
Include cleanups.
Define offsetof if required.
Correct a few comments.
Update prototype of ahc_send_async().
aic7xxx_inline.h:
Implement ahc_update_residual().
aic7xxx_pci.c:
Remove linux header ifdefs.
Correct a few product strings.
Enable several U160 performance enhancing features.
Modify Ultra capability determination so we will enable
Ultra speeds on devices with a 7850 PCI id that happen
to really be a 7859 or 7860.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
346 lines
8.4 KiB
C
346 lines
8.4 KiB
C
/*
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* Product specific probe and attach routines for:
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* 27/284X and aic7770 motherboard SCSI controllers
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*
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* Copyright (c) 1994-1998, 2000, 2001 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU Public License ("GPL").
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: //depot/src/aic7xxx/aic7770.c#11 $
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*
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* $FreeBSD$
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*/
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#include <dev/aic7xxx/aic7xxx_freebsd.h>
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#include <dev/aic7xxx/aic7xxx_inline.h>
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#include <dev/aic7xxx/aic7xxx_93cx6.h>
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#define ID_AIC7770 0x04907770
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#define ID_AHA_274x 0x04907771
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#define ID_AHA_284xB 0x04907756 /* BIOS enabled */
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#define ID_AHA_284x 0x04907757 /* BIOS disabled*/
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static void aha2840_load_seeprom(struct ahc_softc *ahc);
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static ahc_device_setup_t ahc_aic7770_VL_setup;
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static ahc_device_setup_t ahc_aic7770_EISA_setup;;
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static ahc_device_setup_t ahc_aic7770_setup;
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struct aic7770_identity aic7770_ident_table [] =
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{
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{
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ID_AHA_274x,
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0xFFFFFFFF,
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"Adaptec 274X SCSI adapter",
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ahc_aic7770_EISA_setup
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},
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{
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ID_AHA_284xB,
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0xFFFFFFFE,
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"Adaptec 284X SCSI adapter",
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ahc_aic7770_VL_setup
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},
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/* Generic chip probes for devices we don't know 'exactly' */
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{
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ID_AIC7770,
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0xFFFFFFFF,
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"Adaptec aic7770 SCSI adapter",
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ahc_aic7770_EISA_setup
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}
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};
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const int ahc_num_aic7770_devs = NUM_ELEMENTS(aic7770_ident_table);
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struct aic7770_identity *
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aic7770_find_device(uint32_t id)
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{
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struct aic7770_identity *entry;
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int i;
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for (i = 0; i < ahc_num_aic7770_devs; i++) {
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entry = &aic7770_ident_table[i];
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if (entry->full_id == (id & entry->id_mask))
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return (entry);
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}
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return (NULL);
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}
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int
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aic7770_config(struct ahc_softc *ahc, struct aic7770_identity *entry)
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{
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struct ahc_probe_config probe_config;
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int error;
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u_int hostconf;
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u_int irq;
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u_int intdef;
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ahc_init_probe_config(&probe_config);
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error = entry->setup(ahc->dev_softc, &probe_config);
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if (error != 0)
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return (error);
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error = aic7770_map_registers(ahc);
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if (error != 0)
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return (error);
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probe_config.description = entry->name;
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error = ahc_softc_init(ahc, &probe_config);
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error = ahc_reset(ahc);
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if (error != 0)
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return (error);
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/* Make sure we have a valid interrupt vector */
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intdef = ahc_inb(ahc, INTDEF);
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irq = intdef & VECTOR;
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switch (irq) {
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case 9:
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case 10:
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case 11:
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case 12:
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case 14:
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case 15:
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break;
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default:
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printf("aic7770_config: illegal irq setting %d\n", intdef);
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return (ENXIO);
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}
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if ((intdef & EDGE_TRIG) != 0)
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ahc->flags |= AHC_EDGE_INTERRUPT;
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switch (probe_config.chip & (AHC_EISA|AHC_VL)) {
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case AHC_EISA:
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{
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u_int biosctrl;
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u_int scsiconf;
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u_int scsiconf1;
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biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
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scsiconf = ahc_inb(ahc, SCSICONF);
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scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
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/* Get the primary channel information */
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if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
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ahc->flags |= 1;
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if ((biosctrl & BIOSMODE) == BIOSDISABLED) {
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ahc->flags |= AHC_USEDEFAULTS;
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} else {
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if ((ahc->features & AHC_WIDE) != 0) {
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ahc->our_id = scsiconf1 & HWSCSIID;
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if (scsiconf & TERM_ENB)
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ahc->flags |= AHC_TERM_ENB_A;
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} else {
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ahc->our_id = scsiconf & HSCSIID;
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ahc->our_id_b = scsiconf1 & HSCSIID;
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if (scsiconf & TERM_ENB)
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ahc->flags |= AHC_TERM_ENB_A;
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if (scsiconf1 & TERM_ENB)
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ahc->flags |= AHC_TERM_ENB_B;
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}
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}
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/*
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* We have no way to tell, so assume extended
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* translation is enabled.
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*/
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ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
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break;
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}
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case AHC_VL:
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{
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aha2840_load_seeprom(ahc);
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break;
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}
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default:
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break;
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}
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/*
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* Ensure autoflush is enabled
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*/
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ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
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/* Setup the FIFO threshold and the bus off time */
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hostconf = ahc_inb(ahc, HOSTCONF);
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ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH);
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ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF);
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/*
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* Generic aic7xxx initialization.
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*/
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error = ahc_init(ahc);
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if (error != 0)
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return (error);
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/*
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* Link this softc in with all other ahc instances.
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*/
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ahc_softc_insert(ahc);
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error = aic7770_map_int(ahc, irq);
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if (error != 0)
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return (error);
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/*
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* Enable the board's BUS drivers
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*/
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ahc_outb(ahc, BCTL, ENABLE);
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/*
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* Allow interrupts.
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*/
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ahc_intr_enable(ahc, TRUE);
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return (0);
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}
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/*
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* Read the 284x SEEPROM.
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*/
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static void
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aha2840_load_seeprom(struct ahc_softc *ahc)
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{
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struct seeprom_descriptor sd;
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struct seeprom_config sc;
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uint16_t checksum = 0;
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uint8_t scsi_conf;
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int have_seeprom;
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sd.sd_ahc = ahc;
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sd.sd_control_offset = SEECTL_2840;
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sd.sd_status_offset = STATUS_2840;
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sd.sd_dataout_offset = STATUS_2840;
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sd.sd_chip = C46;
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sd.sd_MS = 0;
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sd.sd_RDY = EEPROM_TF;
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sd.sd_CS = CS_2840;
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sd.sd_CK = CK_2840;
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sd.sd_DO = DO_2840;
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sd.sd_DI = DI_2840;
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if (bootverbose)
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printf("%s: Reading SEEPROM...", ahc_name(ahc));
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have_seeprom = read_seeprom(&sd,
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(uint16_t *)&sc,
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/*start_addr*/0,
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sizeof(sc)/2);
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if (have_seeprom) {
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/* Check checksum */
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int i;
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int maxaddr = (sizeof(sc)/2) - 1;
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uint16_t *scarray = (uint16_t *)≻
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for (i = 0; i < maxaddr; i++)
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checksum = checksum + scarray[i];
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if (checksum != sc.checksum) {
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if(bootverbose)
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printf ("checksum error\n");
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have_seeprom = 0;
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} else if (bootverbose) {
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printf("done.\n");
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}
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}
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if (!have_seeprom) {
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if (bootverbose)
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printf("%s: No SEEPROM available\n", ahc_name(ahc));
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ahc->flags |= AHC_USEDEFAULTS;
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} else {
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/*
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* Put the data we've collected down into SRAM
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* where ahc_init will find it.
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*/
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int i;
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int max_targ = (ahc->features & AHC_WIDE) != 0 ? 16 : 8;
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uint16_t discenable;
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discenable = 0;
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for (i = 0; i < max_targ; i++){
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uint8_t target_settings;
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target_settings = (sc.device_flags[i] & CFXFER) << 4;
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if (sc.device_flags[i] & CFSYNCH)
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target_settings |= SOFS;
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if (sc.device_flags[i] & CFWIDEB)
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target_settings |= WIDEXFER;
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if (sc.device_flags[i] & CFDISC)
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discenable |= (0x01 << i);
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ahc_outb(ahc, TARG_SCSIRATE + i, target_settings);
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}
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ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
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ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
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ahc->our_id = sc.brtime_id & CFSCSIID;
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scsi_conf = (ahc->our_id & 0x7);
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if (sc.adapter_control & CFSPARITY)
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scsi_conf |= ENSPCHK;
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if (sc.adapter_control & CFRESETB)
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scsi_conf |= RESET_SCSI;
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if (sc.bios_control & CF284XEXTEND)
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ahc->flags |= AHC_EXTENDED_TRANS_A;
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/* Set SCSICONF info */
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ahc_outb(ahc, SCSICONF, scsi_conf);
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if (sc.adapter_control & CF284XSTERM)
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ahc->flags |= AHC_TERM_ENB_A;
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}
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}
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static int
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ahc_aic7770_VL_setup(ahc_dev_softc_t dev, struct ahc_probe_config *probe_config)
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{
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int error;
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error = ahc_aic7770_setup(dev, probe_config);
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probe_config->chip |= AHC_VL;
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return (error);
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}
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static int
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ahc_aic7770_EISA_setup(ahc_dev_softc_t dev,
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struct ahc_probe_config *probe_config)
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{
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int error;
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error = ahc_aic7770_setup(dev, probe_config);
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probe_config->chip |= AHC_EISA;
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return (error);
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}
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static int
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ahc_aic7770_setup(ahc_dev_softc_t dev, struct ahc_probe_config *probe_config)
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{
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probe_config->channel = 'A';
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probe_config->channel_b = 'B';
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probe_config->chip = AHC_AIC7770;
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probe_config->features = AHC_AIC7770_FE;
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probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
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probe_config->flags |= AHC_PAGESCBS;
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return (0);
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}
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