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2e6a5b15a9
freebsd-nq/sys/amd64/isa
History
Mike Smith 84685adb57 Return to using disable/enable_intr() for guarding DMA register access. 
Mask the read value from the count register in order to return zero correctly
after TC, as per intel datasheet : "If it is not autoinitialised, this
register will have a count of FFFFH after TC"
1997-07-29 05:24:36 +00:00
..
atpic_vector.S Removed the defunct GET_MPLOCK/REL_MPLOCK macros. 1997-07-24 03:24:57 +00:00
clock.c clock.c: 1997-07-26 01:53:04 +00:00
icu_ipl.s Split vector.s into UP and SMP specific files: 1997-05-26 17:58:27 +00:00
icu_ipl.S Split vector.s into UP and SMP specific files: 1997-05-26 17:58:27 +00:00
icu_vector.s Removed the defunct GET_MPLOCK/REL_MPLOCK macros. 1997-07-24 03:24:57 +00:00
icu_vector.S Removed the defunct GET_MPLOCK/REL_MPLOCK macros. 1997-07-24 03:24:57 +00:00
icu.h Last commit didn't take, operator error??? 1997-07-22 20:12:32 +00:00
intr_machdep.c Removed unused #includes. 1997-07-20 14:10:18 +00:00
intr_machdep.h SMP or APIC_IO: 1997-07-19 02:28:30 +00:00
isa.c Return to using disable/enable_intr() for guarding DMA register access. 1997-07-29 05:24:36 +00:00
isa.h Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not 1997-02-22 09:48:43 +00:00
nmi.c Removed unused #includes. 1997-07-20 14:10:18 +00:00
npx.c Made the SMP case ignore the possibility of an INT13 interface. 1997-07-21 07:57:50 +00:00
timerreg.h Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not 1997-02-22 09:48:43 +00:00
vector.s Split vector.s into UP and SMP specific files: 1997-05-26 17:58:27 +00:00
vector.S Split vector.s into UP and SMP specific files: 1997-05-26 17:58:27 +00:00