61 lines
1.8 KiB
LLVM
61 lines
1.8 KiB
LLVM
; RUN: llc < %s -disable-post-ra -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=SOFT
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; RUN: llc < %s -disable-post-ra -mtriple=armv7-gnueabi -float-abi=hard -mcpu=cortex-a8 | FileCheck %s -check-prefix=HARD
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; rdar://8984306
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define float @test1(float %x, float %y) nounwind {
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entry:
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; SOFT-LABEL: test1:
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; SOFT: lsr r1, r1, #31
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; SOFT: bfi r0, r1, #31, #1
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; HARD-LABEL: test1:
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; HARD: vmov.i32 [[REG1:(d[0-9]+)]], #0x80000000
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; HARD: vbsl [[REG1]], d
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%0 = tail call float @copysignf(float %x, float %y) nounwind readnone
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ret float %0
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}
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define double @test2(double %x, double %y) nounwind {
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entry:
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; SOFT-LABEL: test2:
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; SOFT: lsr r2, r3, #31
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; SOFT: bfi r1, r2, #31, #1
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; HARD-LABEL: test2:
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; HARD: vmov.i32 [[REG2:(d[0-9]+)]], #0x80000000
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; HARD: vshl.i64 [[REG2]], [[REG2]], #32
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; HARD: vbsl [[REG2]], d1, d0
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%0 = tail call double @copysign(double %x, double %y) nounwind readnone
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ret double %0
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}
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define double @test3(double %x, double %y, double %z) nounwind {
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entry:
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; SOFT-LABEL: test3:
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; SOFT: vmov.i32 [[REG3:(d[0-9]+)]], #0x80000000
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; SOFT: vshl.i64 [[REG3]], [[REG3]], #32
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; SOFT: vbsl [[REG3]],
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%0 = fmul double %x, %y
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%1 = tail call double @copysign(double %0, double %z) nounwind readnone
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ret double %1
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}
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; rdar://9287902
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define float @test4() nounwind {
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entry:
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; SOFT-LABEL: test4:
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; SOFT: vmov [[REG7:(d[0-9]+)]], r0, r1
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; SOFT: vmov.i32 [[REG6:(d[0-9]+)]], #0x80000000
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; SOFT: vshr.u64 [[REG7]], [[REG7]], #32
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; SOFT: vbsl [[REG6]], [[REG7]],
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%0 = tail call double (...) @bar() nounwind
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%1 = fptrunc double %0 to float
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%2 = tail call float @copysignf(float 5.000000e-01, float %1) nounwind readnone
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%3 = fadd float %1, %2
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ret float %3
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}
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declare double @bar(...)
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declare double @copysign(double, double) nounwind
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declare float @copysignf(float, float) nounwind
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