948d799e27
- Remove 4 extra bytes from the ethernet payload. - The maximum RX buffer was incorrectly set. Increase it to 64K for now, until the exact limit is understood. - Enable hardware checksumming again. - Make hardware data structure packed. MFC after: 3 days
1039 lines
24 KiB
C
1039 lines
24 KiB
C
/*-
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* Copyright (c) 2013-2014 Kevin Lo
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* ASIX Electronics AX88178A/AX88179 USB 2.0/3.0 gigabit ethernet driver.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/condvar.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/socket.h>
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#include <sys/sysctl.h>
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#include <sys/unistd.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usbdi_util.h>
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#include "usbdevs.h"
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#define USB_DEBUG_VAR axge_debug
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#include <dev/usb/usb_debug.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/net/usb_ethernet.h>
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#include <dev/usb/net/if_axgereg.h>
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/*
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* Various supported device vendors/products.
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*/
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static const STRUCT_USB_HOST_ID axge_devs[] = {
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#define AXGE_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
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AXGE_DEV(ASIX, AX88178A),
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AXGE_DEV(ASIX, AX88179),
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AXGE_DEV(DLINK, DUB1312),
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AXGE_DEV(SITECOMEU, LN032),
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#undef AXGE_DEV
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};
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static const struct {
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uint8_t ctrl;
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uint8_t timer_l;
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uint8_t timer_h;
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uint8_t size;
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uint8_t ifg;
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} __packed axge_bulk_size[] = {
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{ 7, 0x4f, 0x00, 0x12, 0xff },
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{ 7, 0x20, 0x03, 0x16, 0xff },
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{ 7, 0xae, 0x07, 0x18, 0xff },
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{ 7, 0xcc, 0x4c, 0x18, 0x08 }
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};
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/* prototypes */
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static device_probe_t axge_probe;
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static device_attach_t axge_attach;
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static device_detach_t axge_detach;
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static usb_callback_t axge_bulk_read_callback;
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static usb_callback_t axge_bulk_write_callback;
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static miibus_readreg_t axge_miibus_readreg;
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static miibus_writereg_t axge_miibus_writereg;
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static miibus_statchg_t axge_miibus_statchg;
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static uether_fn_t axge_attach_post;
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static uether_fn_t axge_init;
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static uether_fn_t axge_stop;
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static uether_fn_t axge_start;
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static uether_fn_t axge_tick;
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static uether_fn_t axge_setmulti;
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static uether_fn_t axge_setpromisc;
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static int axge_read_mem(struct axge_softc *, uint8_t, uint16_t,
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uint16_t, void *, int);
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static void axge_write_mem(struct axge_softc *, uint8_t, uint16_t,
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uint16_t, void *, int);
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static uint8_t axge_read_cmd_1(struct axge_softc *, uint8_t, uint16_t);
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static uint16_t axge_read_cmd_2(struct axge_softc *, uint8_t, uint16_t,
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uint16_t);
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static void axge_write_cmd_1(struct axge_softc *, uint8_t, uint16_t,
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uint8_t);
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static void axge_write_cmd_2(struct axge_softc *, uint8_t, uint16_t,
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uint16_t, uint16_t);
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static void axge_chip_init(struct axge_softc *);
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static void axge_reset(struct axge_softc *);
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static int axge_attach_post_sub(struct usb_ether *);
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static int axge_ifmedia_upd(struct ifnet *);
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static void axge_ifmedia_sts(struct ifnet *, struct ifmediareq *);
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static int axge_ioctl(struct ifnet *, u_long, caddr_t);
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static void axge_rx_frame(struct usb_ether *, struct usb_page_cache *, int);
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static void axge_rxeof(struct usb_ether *, struct usb_page_cache *,
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unsigned int, unsigned int, uint32_t);
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static void axge_csum_cfg(struct usb_ether *);
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#define AXGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
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#ifdef USB_DEBUG
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static int axge_debug = 0;
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static SYSCTL_NODE(_hw_usb, OID_AUTO, axge, CTLFLAG_RW, 0, "USB axge");
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SYSCTL_INT(_hw_usb_axge, OID_AUTO, debug, CTLFLAG_RW, &axge_debug, 0,
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"Debug level");
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#endif
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static const struct usb_config axge_config[AXGE_N_TRANSFER] = {
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[AXGE_BULK_DT_WR] = {
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.type = UE_BULK,
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.endpoint = UE_ADDR_ANY,
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.direction = UE_DIR_OUT,
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.frames = 16,
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.bufsize = 16 * MCLBYTES,
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.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
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.callback = axge_bulk_write_callback,
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.timeout = 10000, /* 10 seconds */
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},
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[AXGE_BULK_DT_RD] = {
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.type = UE_BULK,
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.endpoint = UE_ADDR_ANY,
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.direction = UE_DIR_IN,
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.bufsize = 65536,
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.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
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.callback = axge_bulk_read_callback,
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.timeout = 0, /* no timeout */
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},
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};
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static device_method_t axge_methods[] = {
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/* Device interface. */
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DEVMETHOD(device_probe, axge_probe),
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DEVMETHOD(device_attach, axge_attach),
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DEVMETHOD(device_detach, axge_detach),
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/* MII interface. */
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DEVMETHOD(miibus_readreg, axge_miibus_readreg),
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DEVMETHOD(miibus_writereg, axge_miibus_writereg),
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DEVMETHOD(miibus_statchg, axge_miibus_statchg),
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DEVMETHOD_END
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};
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static driver_t axge_driver = {
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.name = "axge",
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.methods = axge_methods,
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.size = sizeof(struct axge_softc),
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};
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static devclass_t axge_devclass;
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DRIVER_MODULE(axge, uhub, axge_driver, axge_devclass, NULL, NULL);
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DRIVER_MODULE(miibus, axge, miibus_driver, miibus_devclass, NULL, NULL);
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MODULE_DEPEND(axge, uether, 1, 1, 1);
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MODULE_DEPEND(axge, usb, 1, 1, 1);
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MODULE_DEPEND(axge, ether, 1, 1, 1);
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MODULE_DEPEND(axge, miibus, 1, 1, 1);
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MODULE_VERSION(axge, 1);
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static const struct usb_ether_methods axge_ue_methods = {
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.ue_attach_post = axge_attach_post,
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.ue_attach_post_sub = axge_attach_post_sub,
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.ue_start = axge_start,
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.ue_init = axge_init,
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.ue_stop = axge_stop,
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.ue_tick = axge_tick,
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.ue_setmulti = axge_setmulti,
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.ue_setpromisc = axge_setpromisc,
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.ue_mii_upd = axge_ifmedia_upd,
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.ue_mii_sts = axge_ifmedia_sts,
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};
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static int
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axge_read_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
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uint16_t val, void *buf, int len)
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{
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struct usb_device_request req;
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AXGE_LOCK_ASSERT(sc, MA_OWNED);
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req.bmRequestType = UT_READ_VENDOR_DEVICE;
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req.bRequest = cmd;
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USETW(req.wValue, val);
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USETW(req.wIndex, index);
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USETW(req.wLength, len);
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return (uether_do_request(&sc->sc_ue, &req, buf, 1000));
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}
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static void
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axge_write_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
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uint16_t val, void *buf, int len)
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{
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struct usb_device_request req;
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AXGE_LOCK_ASSERT(sc, MA_OWNED);
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req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
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req.bRequest = cmd;
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USETW(req.wValue, val);
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USETW(req.wIndex, index);
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USETW(req.wLength, len);
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if (uether_do_request(&sc->sc_ue, &req, buf, 1000)) {
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/* Error ignored. */
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}
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}
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static uint8_t
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axge_read_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg)
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{
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uint8_t val;
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axge_read_mem(sc, cmd, 1, reg, &val, 1);
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return (val);
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}
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static uint16_t
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axge_read_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
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uint16_t reg)
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{
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uint8_t val[2];
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axge_read_mem(sc, cmd, index, reg, &val, 2);
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return (UGETW(val));
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}
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static void
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axge_write_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg, uint8_t val)
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{
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axge_write_mem(sc, cmd, 1, reg, &val, 1);
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}
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static void
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axge_write_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
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uint16_t reg, uint16_t val)
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{
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uint8_t temp[2];
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USETW(temp, val);
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axge_write_mem(sc, cmd, index, reg, &temp, 2);
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}
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static int
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axge_miibus_readreg(device_t dev, int phy, int reg)
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{
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struct axge_softc *sc;
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uint16_t val;
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int locked;
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sc = device_get_softc(dev);
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locked = mtx_owned(&sc->sc_mtx);
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if (!locked)
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AXGE_LOCK(sc);
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val = axge_read_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy);
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if (!locked)
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AXGE_UNLOCK(sc);
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return (val);
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}
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static int
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axge_miibus_writereg(device_t dev, int phy, int reg, int val)
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{
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struct axge_softc *sc;
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int locked;
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sc = device_get_softc(dev);
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if (sc->sc_phyno != phy)
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return (0);
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locked = mtx_owned(&sc->sc_mtx);
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if (!locked)
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AXGE_LOCK(sc);
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axge_write_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy, val);
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if (!locked)
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AXGE_UNLOCK(sc);
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return (0);
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}
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static void
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axge_miibus_statchg(device_t dev)
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{
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struct axge_softc *sc;
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struct mii_data *mii;
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struct ifnet *ifp;
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uint8_t link_status, tmp[5];
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uint16_t val;
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int locked;
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sc = device_get_softc(dev);
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mii = GET_MII(sc);
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locked = mtx_owned(&sc->sc_mtx);
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if (!locked)
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AXGE_LOCK(sc);
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ifp = uether_getifp(&sc->sc_ue);
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if (mii == NULL || ifp == NULL ||
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(ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
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goto done;
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sc->sc_flags &= ~AXGE_FLAG_LINK;
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if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
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(IFM_ACTIVE | IFM_AVALID)) {
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switch (IFM_SUBTYPE(mii->mii_media_active)) {
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case IFM_10_T:
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case IFM_100_TX:
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case IFM_1000_T:
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sc->sc_flags |= AXGE_FLAG_LINK;
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break;
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default:
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break;
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}
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}
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/* Lost link, do nothing. */
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if ((sc->sc_flags & AXGE_FLAG_LINK) == 0)
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goto done;
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link_status = axge_read_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PLSR);
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val = 0;
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if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
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val |= MSR_FD;
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if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
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val |= MSR_TFC;
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if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
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val |= MSR_RFC;
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}
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val |= MSR_RE;
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switch (IFM_SUBTYPE(mii->mii_media_active)) {
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case IFM_1000_T:
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val |= MSR_GM | MSR_EN_125MHZ;
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if (link_status & PLSR_USB_SS)
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memcpy(tmp, &axge_bulk_size[0], 5);
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else if (link_status & PLSR_USB_HS)
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memcpy(tmp, &axge_bulk_size[1], 5);
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else
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memcpy(tmp, &axge_bulk_size[3], 5);
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break;
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case IFM_100_TX:
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val |= MSR_PS;
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if (link_status & (PLSR_USB_SS | PLSR_USB_HS))
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memcpy(tmp, &axge_bulk_size[2], 5);
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else
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memcpy(tmp, &axge_bulk_size[3], 5);
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break;
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case IFM_10_T:
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memcpy(tmp, &axge_bulk_size[3], 5);
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break;
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}
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/* Rx bulk configuration. */
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axge_write_mem(sc, AXGE_ACCESS_MAC, 5, AXGE_RX_BULKIN_QCTRL, tmp, 5);
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axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MSR, val);
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done:
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if (!locked)
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AXGE_UNLOCK(sc);
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}
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static void
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axge_chip_init(struct axge_softc *sc)
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{
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/* Power up ethernet PHY. */
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axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, 0);
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axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, EPPRCR_IPRL);
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uether_pause(&sc->sc_ue, hz / 4);
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axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CLK_SELECT,
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AXGE_CLK_SELECT_ACS | AXGE_CLK_SELECT_BCS);
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uether_pause(&sc->sc_ue, hz / 10);
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}
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static void
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axge_reset(struct axge_softc *sc)
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{
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struct usb_config_descriptor *cd;
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usb_error_t err;
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cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
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err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
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cd->bConfigurationValue);
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if (err)
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DPRINTF("reset failed (ignored)\n");
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/* Wait a little while for the chip to get its brains in order. */
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uether_pause(&sc->sc_ue, hz / 100);
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/* Reinitialize controller to achieve full reset. */
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axge_chip_init(sc);
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}
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|
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static void
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axge_attach_post(struct usb_ether *ue)
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{
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struct axge_softc *sc;
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sc = uether_getsc(ue);
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sc->sc_phyno = 3;
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|
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/* Initialize controller and get station address. */
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axge_chip_init(sc);
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axge_read_mem(sc, AXGE_ACCESS_MAC, ETHER_ADDR_LEN, AXGE_NIDR,
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ue->ue_eaddr, ETHER_ADDR_LEN);
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}
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static int
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axge_attach_post_sub(struct usb_ether *ue)
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{
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struct axge_softc *sc;
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struct ifnet *ifp;
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int error;
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sc = uether_getsc(ue);
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ifp = ue->ue_ifp;
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
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ifp->if_start = uether_start;
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ifp->if_ioctl = axge_ioctl;
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ifp->if_init = uether_init;
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IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
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ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
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IFQ_SET_READY(&ifp->if_snd);
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ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_TXCSUM | IFCAP_RXCSUM;
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ifp->if_hwassist = AXGE_CSUM_FEATURES;
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ifp->if_capenable = ifp->if_capabilities;
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mtx_lock(&Giant);
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error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp,
|
|
uether_ifmedia_upd, ue->ue_methods->ue_mii_sts,
|
|
BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, MIIF_DOPAUSE);
|
|
mtx_unlock(&Giant);
|
|
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* Set media options.
|
|
*/
|
|
static int
|
|
axge_ifmedia_upd(struct ifnet *ifp)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct mii_data *mii;
|
|
struct mii_softc *miisc;
|
|
int error;
|
|
|
|
sc = ifp->if_softc;
|
|
mii = GET_MII(sc);
|
|
AXGE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
|
|
PHY_RESET(miisc);
|
|
error = mii_mediachg(mii);
|
|
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* Report current media status.
|
|
*/
|
|
static void
|
|
axge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct mii_data *mii;
|
|
|
|
sc = ifp->if_softc;
|
|
mii = GET_MII(sc);
|
|
AXGE_LOCK(sc);
|
|
mii_pollstat(mii);
|
|
ifmr->ifm_active = mii->mii_media_active;
|
|
ifmr->ifm_status = mii->mii_media_status;
|
|
AXGE_UNLOCK(sc);
|
|
}
|
|
|
|
/*
|
|
* Probe for a AX88179 chip.
|
|
*/
|
|
static int
|
|
axge_probe(device_t dev)
|
|
{
|
|
struct usb_attach_arg *uaa;
|
|
|
|
uaa = device_get_ivars(dev);
|
|
if (uaa->usb_mode != USB_MODE_HOST)
|
|
return (ENXIO);
|
|
if (uaa->info.bConfigIndex != AXGE_CONFIG_IDX)
|
|
return (ENXIO);
|
|
if (uaa->info.bIfaceIndex != AXGE_IFACE_IDX)
|
|
return (ENXIO);
|
|
|
|
return (usbd_lookup_id_by_uaa(axge_devs, sizeof(axge_devs), uaa));
|
|
}
|
|
|
|
/*
|
|
* Attach the interface. Allocate softc structures, do ifmedia
|
|
* setup and ethernet/BPF attach.
|
|
*/
|
|
static int
|
|
axge_attach(device_t dev)
|
|
{
|
|
struct usb_attach_arg *uaa;
|
|
struct axge_softc *sc;
|
|
struct usb_ether *ue;
|
|
uint8_t iface_index;
|
|
int error;
|
|
|
|
uaa = device_get_ivars(dev);
|
|
sc = device_get_softc(dev);
|
|
ue = &sc->sc_ue;
|
|
|
|
device_set_usb_desc(dev);
|
|
mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
|
|
|
|
iface_index = AXGE_IFACE_IDX;
|
|
error = usbd_transfer_setup(uaa->device, &iface_index,
|
|
sc->sc_xfer, axge_config, AXGE_N_TRANSFER, sc, &sc->sc_mtx);
|
|
if (error) {
|
|
device_printf(dev, "allocating USB transfers failed\n");
|
|
goto detach;
|
|
}
|
|
|
|
ue->ue_sc = sc;
|
|
ue->ue_dev = dev;
|
|
ue->ue_udev = uaa->device;
|
|
ue->ue_mtx = &sc->sc_mtx;
|
|
ue->ue_methods = &axge_ue_methods;
|
|
|
|
error = uether_ifattach(ue);
|
|
if (error) {
|
|
device_printf(dev, "could not attach interface\n");
|
|
goto detach;
|
|
}
|
|
return (0); /* success */
|
|
|
|
detach:
|
|
axge_detach(dev);
|
|
return (ENXIO); /* failure */
|
|
}
|
|
|
|
static int
|
|
axge_detach(device_t dev)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct usb_ether *ue;
|
|
|
|
sc = device_get_softc(dev);
|
|
ue = &sc->sc_ue;
|
|
usbd_transfer_unsetup(sc->sc_xfer, AXGE_N_TRANSFER);
|
|
uether_ifdetach(ue);
|
|
mtx_destroy(&sc->sc_mtx);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
axge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct usb_ether *ue;
|
|
struct usb_page_cache *pc;
|
|
int actlen;
|
|
|
|
sc = usbd_xfer_softc(xfer);
|
|
ue = &sc->sc_ue;
|
|
usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
|
|
|
|
switch (USB_GET_STATE(xfer)) {
|
|
case USB_ST_TRANSFERRED:
|
|
pc = usbd_xfer_get_frame(xfer, 0);
|
|
axge_rx_frame(ue, pc, actlen);
|
|
|
|
/* FALLTHROUGH */
|
|
case USB_ST_SETUP:
|
|
tr_setup:
|
|
usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
|
|
usbd_transfer_submit(xfer);
|
|
uether_rxflush(ue);
|
|
break;
|
|
|
|
default:
|
|
if (error != USB_ERR_CANCELLED) {
|
|
usbd_xfer_set_stall(xfer);
|
|
goto tr_setup;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void
|
|
axge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct ifnet *ifp;
|
|
struct usb_page_cache *pc;
|
|
struct mbuf *m;
|
|
uint32_t txhdr;
|
|
int nframes, pos;
|
|
|
|
sc = usbd_xfer_softc(xfer);
|
|
ifp = uether_getifp(&sc->sc_ue);
|
|
|
|
switch (USB_GET_STATE(xfer)) {
|
|
case USB_ST_TRANSFERRED:
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
/* FALLTHROUGH */
|
|
case USB_ST_SETUP:
|
|
tr_setup:
|
|
if ((sc->sc_flags & AXGE_FLAG_LINK) == 0 ||
|
|
(ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) {
|
|
/*
|
|
* Don't send anything if there is no link or
|
|
* controller is busy.
|
|
*/
|
|
return;
|
|
}
|
|
|
|
for (nframes = 0; nframes < 16 &&
|
|
!IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) {
|
|
IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
|
|
if (m == NULL)
|
|
break;
|
|
usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES,
|
|
nframes);
|
|
pos = 0;
|
|
pc = usbd_xfer_get_frame(xfer, nframes);
|
|
txhdr = htole32(m->m_pkthdr.len);
|
|
usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
|
|
txhdr = 0;
|
|
txhdr = htole32(txhdr);
|
|
usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr));
|
|
pos += 8;
|
|
usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len);
|
|
pos += m->m_pkthdr.len;
|
|
if ((pos % usbd_xfer_max_framelen(xfer)) == 0)
|
|
txhdr |= 0x80008000;
|
|
|
|
/*
|
|
* XXX
|
|
* Update TX packet counter here. This is not
|
|
* correct way but it seems that there is no way
|
|
* to know how many packets are sent at the end
|
|
* of transfer because controller combines
|
|
* multiple writes into single one if there is
|
|
* room in TX buffer of controller.
|
|
*/
|
|
ifp->if_opackets++;
|
|
|
|
/*
|
|
* if there's a BPF listener, bounce a copy
|
|
* of this frame to him:
|
|
*/
|
|
BPF_MTAP(ifp, m);
|
|
|
|
m_freem(m);
|
|
|
|
/* Set frame length. */
|
|
usbd_xfer_set_frame_len(xfer, nframes, pos);
|
|
}
|
|
if (nframes != 0) {
|
|
usbd_xfer_set_frames(xfer, nframes);
|
|
usbd_transfer_submit(xfer);
|
|
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
|
}
|
|
return;
|
|
/* NOTREACHED */
|
|
default:
|
|
ifp->if_oerrors++;
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
|
|
if (error != USB_ERR_CANCELLED) {
|
|
usbd_xfer_set_stall(xfer);
|
|
goto tr_setup;
|
|
}
|
|
return;
|
|
|
|
}
|
|
}
|
|
|
|
static void
|
|
axge_tick(struct usb_ether *ue)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct mii_data *mii;
|
|
|
|
sc = uether_getsc(ue);
|
|
mii = GET_MII(sc);
|
|
AXGE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
mii_tick(mii);
|
|
if ((sc->sc_flags & AXGE_FLAG_LINK) == 0) {
|
|
axge_miibus_statchg(ue->ue_dev);
|
|
if ((sc->sc_flags & AXGE_FLAG_LINK) != 0)
|
|
axge_start(ue);
|
|
}
|
|
}
|
|
|
|
static void
|
|
axge_setmulti(struct usb_ether *ue)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct ifnet *ifp;
|
|
struct ifmultiaddr *ifma;
|
|
uint32_t h;
|
|
uint16_t rxmode;
|
|
uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
|
|
|
|
sc = uether_getsc(ue);
|
|
ifp = uether_getifp(ue);
|
|
h = 0;
|
|
AXGE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR);
|
|
if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
|
|
rxmode |= RCR_AMALL;
|
|
axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
|
|
return;
|
|
}
|
|
rxmode &= ~RCR_AMALL;
|
|
|
|
if_maddr_rlock(ifp);
|
|
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
|
|
if (ifma->ifma_addr->sa_family != AF_LINK)
|
|
continue;
|
|
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
|
|
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
|
|
hashtbl[h / 8] |= 1 << (h % 8);
|
|
}
|
|
if_maddr_runlock(ifp);
|
|
|
|
axge_write_mem(sc, AXGE_ACCESS_MAC, 8, AXGE_MFA, (void *)&hashtbl, 8);
|
|
axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
|
|
}
|
|
|
|
static void
|
|
axge_setpromisc(struct usb_ether *ue)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct ifnet *ifp;
|
|
uint16_t rxmode;
|
|
|
|
sc = uether_getsc(ue);
|
|
ifp = uether_getifp(ue);
|
|
rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR);
|
|
|
|
if (ifp->if_flags & IFF_PROMISC)
|
|
rxmode |= RCR_PRO;
|
|
else
|
|
rxmode &= ~RCR_PRO;
|
|
|
|
axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
|
|
axge_setmulti(ue);
|
|
}
|
|
|
|
static void
|
|
axge_start(struct usb_ether *ue)
|
|
{
|
|
struct axge_softc *sc;
|
|
|
|
sc = uether_getsc(ue);
|
|
/*
|
|
* Start the USB transfers, if not already started.
|
|
*/
|
|
usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_RD]);
|
|
usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_WR]);
|
|
}
|
|
|
|
static void
|
|
axge_init(struct usb_ether *ue)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct ifnet *ifp;
|
|
uint16_t rxmode;
|
|
|
|
sc = uether_getsc(ue);
|
|
ifp = uether_getifp(ue);
|
|
AXGE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
|
|
return;
|
|
|
|
/*
|
|
* Cancel pending I/O and free all RX/TX buffers.
|
|
*/
|
|
axge_stop(ue);
|
|
|
|
axge_reset(sc);
|
|
|
|
/* Set MAC address. */
|
|
axge_write_mem(sc, AXGE_ACCESS_MAC, ETHER_ADDR_LEN, AXGE_NIDR,
|
|
IF_LLADDR(ifp), ETHER_ADDR_LEN);
|
|
|
|
axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PWLLR, 0x34);
|
|
axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PWLHR, 0x52);
|
|
|
|
/* Configure TX/RX checksum offloading. */
|
|
axge_csum_cfg(ue);
|
|
|
|
/* Configure RX settings. */
|
|
rxmode = (RCR_AM | RCR_SO | RCR_DROP_CRCE);
|
|
if ((ifp->if_capenable & IFCAP_RXCSUM) != 0)
|
|
rxmode |= RCR_IPE;
|
|
|
|
/* If we want promiscuous mode, set the allframes bit. */
|
|
if (ifp->if_flags & IFF_PROMISC)
|
|
rxmode |= RCR_PRO;
|
|
|
|
if (ifp->if_flags & IFF_BROADCAST)
|
|
rxmode |= RCR_AB;
|
|
|
|
axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
|
|
|
|
axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_MMSR,
|
|
MMSR_PME_TYPE | MMSR_PME_POL | MMSR_RWMP);
|
|
|
|
/* Load the multicast filter. */
|
|
axge_setmulti(ue);
|
|
|
|
usbd_xfer_set_stall(sc->sc_xfer[AXGE_BULK_DT_WR]);
|
|
|
|
ifp->if_drv_flags |= IFF_DRV_RUNNING;
|
|
/* Switch to selected media. */
|
|
axge_ifmedia_upd(ifp);
|
|
}
|
|
|
|
static void
|
|
axge_stop(struct usb_ether *ue)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct ifnet *ifp;
|
|
|
|
sc = uether_getsc(ue);
|
|
ifp = uether_getifp(ue);
|
|
|
|
AXGE_LOCK_ASSERT(sc, MA_OWNED);
|
|
|
|
ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
|
|
sc->sc_flags &= ~AXGE_FLAG_LINK;
|
|
|
|
/*
|
|
* Stop all the transfers, if not already stopped:
|
|
*/
|
|
usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_WR]);
|
|
usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_RD]);
|
|
}
|
|
|
|
static int
|
|
axge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
|
|
{
|
|
struct usb_ether *ue;
|
|
struct axge_softc *sc;
|
|
struct ifreq *ifr;
|
|
int error, mask, reinit;
|
|
|
|
ue = ifp->if_softc;
|
|
sc = uether_getsc(ue);
|
|
ifr = (struct ifreq *)data;
|
|
error = 0;
|
|
reinit = 0;
|
|
if (cmd == SIOCSIFCAP) {
|
|
AXGE_LOCK(sc);
|
|
mask = ifr->ifr_reqcap ^ ifp->if_capenable;
|
|
if ((mask & IFCAP_TXCSUM) != 0 &&
|
|
(ifp->if_capabilities & IFCAP_TXCSUM) != 0) {
|
|
ifp->if_capenable ^= IFCAP_TXCSUM;
|
|
if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
|
|
ifp->if_hwassist |= AXGE_CSUM_FEATURES;
|
|
else
|
|
ifp->if_hwassist &= ~AXGE_CSUM_FEATURES;
|
|
reinit++;
|
|
}
|
|
if ((mask & IFCAP_RXCSUM) != 0 &&
|
|
(ifp->if_capabilities & IFCAP_RXCSUM) != 0) {
|
|
ifp->if_capenable ^= IFCAP_RXCSUM;
|
|
reinit++;
|
|
}
|
|
if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING)
|
|
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
|
|
else
|
|
reinit = 0;
|
|
AXGE_UNLOCK(sc);
|
|
if (reinit > 0)
|
|
uether_init(ue);
|
|
} else
|
|
error = uether_ioctl(ifp, cmd, data);
|
|
|
|
return (error);
|
|
}
|
|
|
|
static void
|
|
axge_rx_frame(struct usb_ether *ue, struct usb_page_cache *pc, int actlen)
|
|
{
|
|
uint32_t pos;
|
|
uint32_t pkt_cnt;
|
|
uint32_t rxhdr;
|
|
uint32_t pkt_hdr;
|
|
uint32_t hdr_off;
|
|
uint32_t pktlen;
|
|
|
|
/* verify we have enough data */
|
|
if (actlen < (int)sizeof(rxhdr))
|
|
return;
|
|
|
|
pos = 0;
|
|
|
|
usbd_copy_out(pc, actlen - sizeof(rxhdr), &rxhdr, sizeof(rxhdr));
|
|
rxhdr = le32toh(rxhdr);
|
|
|
|
pkt_cnt = (uint16_t)rxhdr;
|
|
hdr_off = (uint16_t)(rxhdr >> 16);
|
|
|
|
while (pkt_cnt--) {
|
|
/* verify the header offset */
|
|
if ((int)(hdr_off + sizeof(pkt_hdr)) > actlen) {
|
|
DPRINTF("End of packet headers\n");
|
|
break;
|
|
}
|
|
if ((int)pos >= actlen) {
|
|
DPRINTF("Data position reached end\n");
|
|
break;
|
|
}
|
|
usbd_copy_out(pc, hdr_off, &pkt_hdr, sizeof(pkt_hdr));
|
|
|
|
pkt_hdr = le32toh(pkt_hdr);
|
|
pktlen = (pkt_hdr >> 16) & 0x1fff;
|
|
if (pkt_hdr & (AXGE_RXHDR_CRC_ERR | AXGE_RXHDR_DROP_ERR)) {
|
|
DPRINTF("Dropped a packet\n");
|
|
ue->ue_ifp->if_ierrors++;
|
|
}
|
|
if (pktlen >= 6 && (int)(pos + pktlen) <= actlen) {
|
|
axge_rxeof(ue, pc, pos + 2, pktlen - 6, pkt_hdr);
|
|
} else {
|
|
DPRINTF("Invalid packet pos=%d len=%d\n",
|
|
(int)pos, (int)pktlen);
|
|
}
|
|
pos += (pktlen + 7) & ~7;
|
|
hdr_off += sizeof(pkt_hdr);
|
|
}
|
|
}
|
|
|
|
static void
|
|
axge_rxeof(struct usb_ether *ue, struct usb_page_cache *pc,
|
|
unsigned int offset, unsigned int len, uint32_t pkt_hdr)
|
|
{
|
|
struct ifnet *ifp;
|
|
struct mbuf *m;
|
|
|
|
ifp = ue->ue_ifp;
|
|
if (len < ETHER_HDR_LEN || len > MCLBYTES - ETHER_ALIGN) {
|
|
ifp->if_ierrors++;
|
|
return;
|
|
}
|
|
|
|
m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
|
|
if (m == NULL) {
|
|
ifp->if_iqdrops++;
|
|
return;
|
|
}
|
|
m->m_pkthdr.rcvif = ifp;
|
|
m->m_len = m->m_pkthdr.len = len + ETHER_ALIGN;
|
|
m_adj(m, ETHER_ALIGN);
|
|
|
|
usbd_copy_out(pc, offset, mtod(m, uint8_t *), len);
|
|
|
|
ifp->if_ipackets++;
|
|
|
|
if ((pkt_hdr & (AXGE_RXHDR_L4CSUM_ERR | AXGE_RXHDR_L3CSUM_ERR)) == 0) {
|
|
if ((pkt_hdr & AXGE_RXHDR_L4_TYPE_MASK) ==
|
|
AXGE_RXHDR_L4_TYPE_TCP ||
|
|
(pkt_hdr & AXGE_RXHDR_L4_TYPE_MASK) ==
|
|
AXGE_RXHDR_L4_TYPE_UDP) {
|
|
m->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
|
|
CSUM_PSEUDO_HDR | CSUM_IP_CHECKED | CSUM_IP_VALID;
|
|
m->m_pkthdr.csum_data = 0xffff;
|
|
}
|
|
}
|
|
|
|
_IF_ENQUEUE(&ue->ue_rxq, m);
|
|
}
|
|
|
|
static void
|
|
axge_csum_cfg(struct usb_ether *ue)
|
|
{
|
|
struct axge_softc *sc;
|
|
struct ifnet *ifp;
|
|
uint8_t csum;
|
|
|
|
sc = uether_getsc(ue);
|
|
AXGE_LOCK_ASSERT(sc, MA_OWNED);
|
|
ifp = uether_getifp(ue);
|
|
|
|
csum = 0;
|
|
if ((ifp->if_capenable & IFCAP_TXCSUM) != 0)
|
|
csum |= CTCR_IP | CTCR_TCP | CTCR_UDP;
|
|
axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CTCR, csum);
|
|
|
|
csum = 0;
|
|
if ((ifp->if_capenable & IFCAP_RXCSUM) != 0)
|
|
csum |= CRCR_IP | CRCR_TCP | CRCR_UDP;
|
|
axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CRCR, csum);
|
|
}
|