6325f105aa
This is enough to allow this ASUS router to reboot successfully. I tried the watchdog path and although it fires, it isn't rebooting! It's just hanging, likely somewhere in TZ. Tested: * ASUS RT-AC58U router, IPQ4019 Reviewed by: andrew, manu, imp Differential Revision: https://reviews.freebsd.org/D32723
237 lines
6.9 KiB
C
237 lines
6.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/reboot.h>
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#include <sys/devmap.h>
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#include <sys/physmem.h>
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#include <sys/lock.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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#include <machine/intr.h>
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#include <machine/machdep.h>
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#include <machine/platformvar.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <arm/qualcomm/ipq4018_machdep.h>
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#include <arm/qualcomm/ipq4018_reg.h>
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#include "platform_if.h"
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static int
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ipq4018_attach(platform_t plat)
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{
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return (0);
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}
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static void
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ipq4018_late_init(platform_t plat)
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{
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/*
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* XXX FIXME This is needed because we're not parsing
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* the fdt reserved memory regions in a consistent way
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* between arm/arm64. Once the reserved region parsing
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* is fixed up this will become unneccessary.
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*
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* These cover the SRAM/TZ regions that are not fully
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* accessible from the OS. They're in the ipq4018.dtsi
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* tree.
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*
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* Without these, the system fails to boot because we
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* aren't parsing the regions correctly.
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*
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* These will be unnecessary once the parser and setup
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* code is fixed.
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*/
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physmem_exclude_region(IPQ4018_MEM_SMEM_START,
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IPQ4018_MEM_SMEM_SIZE,
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EXFLAG_NODUMP | EXFLAG_NOALLOC);
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physmem_exclude_region(IPQ4018_MEM_TZ_START,
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IPQ4018_MEM_TZ_SIZE,
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EXFLAG_NODUMP | EXFLAG_NOALLOC);
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}
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static int
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ipq4018_devmap_init(platform_t plat)
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{
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/*
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* This covers the boot UART. Without it we can't boot successfully:
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* there's a mutex uninit panic in subr_vmem.c that occurs when doing
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* a call to pmap_mapdev() when the bus space code is doing its thing.
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*/
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devmap_add_entry(IPQ4018_MEM_UART1_START, IPQ4018_MEM_UART1_SIZE);
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/*
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* This covers a bunch of the reset block, which includes the PS-HOLD
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* register for dropping power.
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*/
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devmap_add_entry(IPQ4018_MEM_PSHOLD_START, IPQ4018_MEM_PSHOLD_SIZE);
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return (0);
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}
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/*
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* This toggles the PS-HOLD register which on most IPQ devices will toggle
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* the power control block and reset the SoC.
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*
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* However, there are apparently some units out there where this is not
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* appropriate and instead the watchdog needs to be used.
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*
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* For now since there's only going to be one or two initial supported boards
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* this will be fine. But if this doesn't reboot cleanly, now you know.
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*/
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static void
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ipq4018_cpu_reset_pshold(void)
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{
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bus_space_handle_t pshold;
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printf("%s: called\n", __func__);
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bus_space_map(fdtbus_bs_tag, IPQ4018_MEM_PSHOLD_START,
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IPQ4018_MEM_PSHOLD_SIZE, 0, &pshold);
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bus_space_write_4(fdtbus_bs_tag, pshold, 0, 0);
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bus_space_barrier(fdtbus_bs_tag, pshold, 0, 0x4,
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BUS_SPACE_BARRIER_WRITE);
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}
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static void
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ipq4018_cpu_reset(platform_t plat)
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{
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spinlock_enter();
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dsb();
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ipq4018_cpu_reset_pshold();
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/* Spin */
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printf("%s: spinning\n", __func__);
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while(1)
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;
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}
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/*
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* Early putc routine for EARLY_PRINTF support. To use, add to kernel config:
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* option SOCDEV_PA=0x07800000
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* option SOCDEV_VA=0x07800000
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* option EARLY_PRINTF
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* Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
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* makes sense now, but if multiple SOCs do that it will make early_putc another
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* duplicate symbol to be eliminated on the path to a generic kernel.
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*/
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#if 0
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void
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qca_msm_early_putc(int c)
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{
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static int is_init = 0;
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int limit;
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/*
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* This must match what's put into SOCDEV_VA. You have to change them
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* both together.
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*
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* XXX TODO I should really go and just make UART_BASE here depend upon
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* SOCDEV_VA so they move together.
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*/
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#define UART_BASE IPQ4018_MEM_UART1_START
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volatile uint32_t * UART_DM_TF0 = (uint32_t *)(UART_BASE + 0x70);
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volatile uint32_t * UART_DM_SR = (uint32_t *)(UART_BASE + 0x08);
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#define UART_DM_SR_TXEMT (1 << 3)
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#define UART_DM_SR_TXRDY (1 << 2)
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volatile uint32_t * UART_DM_ISR = (uint32_t *)(UART_BASE + 0x14);
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volatile uint32_t * UART_DM_CR = (uint32_t *)(UART_BASE + 0x10);
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#define UART_DM_TX_READY (1 << 7)
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#define UART_DM_CLEAR_TX_READY 0x300
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volatile uint32_t * UART_DM_NO_CHARS_FOR_TX = (uint32_t *)(UART_BASE + 0x40);
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volatile uint32_t * UART_DM_TFWR = (uint32_t *)(UART_BASE + 0x1c);
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#define UART_DM_TFW_VALUE 0
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volatile uint32_t * UART_DM_IPR = (uint32_t *)(UART_BASE + 0x18);
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#define UART_DM_STALE_TIMEOUT_LSB 0xf
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if (is_init == 0) {
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is_init = 1;
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*UART_DM_TFWR = UART_DM_TFW_VALUE;
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wmb();
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*UART_DM_IPR = UART_DM_STALE_TIMEOUT_LSB;
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wmb();
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}
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/* Wait until TXFIFO is empty via ISR */
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limit = 100000;
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if ((*UART_DM_SR & UART_DM_SR_TXEMT) == 0) {
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while (((*UART_DM_ISR & UART_DM_TX_READY) == 0) && --limit) {
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/* Note - can't use DELAY here yet, too early */
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rmb();
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}
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*UART_DM_CR = UART_DM_CLEAR_TX_READY;
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wmb();
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}
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/* FIFO is ready. Say we're going to write one byte */
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*UART_DM_NO_CHARS_FOR_TX = 1;
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wmb();
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limit = 100000;
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while (((*UART_DM_SR & UART_DM_SR_TXRDY) == 0) && --limit) {
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/* Note - can't use DELAY here yet, too early */
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rmb();
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}
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/* Put character in first fifo slot */
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*UART_DM_TF0 = c;
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wmb();
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}
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early_putc_t *early_putc = qca_msm_early_putc;
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#endif
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static platform_method_t ipq4018_methods[] = {
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PLATFORMMETHOD(platform_attach, ipq4018_attach),
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PLATFORMMETHOD(platform_devmap_init, ipq4018_devmap_init),
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PLATFORMMETHOD(platform_late_init, ipq4018_late_init),
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PLATFORMMETHOD(platform_cpu_reset, ipq4018_cpu_reset),
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#ifdef SMP
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PLATFORMMETHOD(platform_mp_start_ap, ipq4018_mp_start_ap),
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PLATFORMMETHOD(platform_mp_setmaxid, ipq4018_mp_setmaxid),
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#endif
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PLATFORMMETHOD_END,
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};
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FDT_PLATFORM_DEF2(ipq4018, ipq4018_ac58u, "ASUS RT-AC58U", 0,
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"asus,rt-ac58u", 80);
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