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workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.) |
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| .. | ||
| dcphy.c | ||
| if_dc.c | ||
| if_dcreg.h | ||
| pnphy.c | ||