John-Mark Gurney 80d7c14c42 Bring in support for single core Zynq devices. Turns out that real ... hardware, the registers appear like there's two cores, but the second core does not work, so base the number of cores upon the chip id. Tested on a XC7Z007S. also, previous commit was suppose to be D14429. Submitted by: Thomas Skibo Differential Revision: https://reviews.freebsd.org/D14429		2020-05-21 06:40:51 +00:00
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files.zynq7	Add the Cadence GEM ethernet driver to NOTES so that it gets built with	2020-04-02 19:06:05 +00:00
std.zynq7	Remove IPI_IRQ_START and IPI_IRQ_END from the arm kernel config files.	2018-07-28 06:46:10 +00:00
uart_dev_cdnc.c	Regularize my copyright notice	2019-12-04 16:56:11 +00:00
zy7_devcfg.c	Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (17 of many)	2020-02-26 14:26:36 +00:00
zy7_ehci.c	arm: Fix duplicate ehci DRIVER_MODULE	2018-04-27 21:05:58 +00:00
zy7_gpio.c	Fix accidental USB port resets by GPIO on Zynq/Zedboard boards	2018-04-03 04:31:54 +00:00
zy7_l2cache.c	sys/arm: further adoption of SPDX licensing ID tags.	2017-11-27 15:04:10 +00:00
zy7_machdep.c	sys/arm: further adoption of SPDX licensing ID tags.	2017-11-27 15:04:10 +00:00
zy7_machdep.h
zy7_mp.c	Bring in support for single core Zynq devices. Turns out that real	2020-05-21 06:40:51 +00:00
zy7_qspi.c	zilinx/zy7_qspi: Add a qspi driver for Zynq platforms.	2020-01-19 20:04:44 +00:00
zy7_reg.h	sys/arm: further adoption of SPDX licensing ID tags.	2017-11-27 15:04:10 +00:00
zy7_slcr.c	Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (17 of many)	2020-02-26 14:26:36 +00:00
zy7_slcr.h	Bring in support for single core Zynq devices. Turns out that real	2020-05-21 06:40:51 +00:00
zy7_spi.c	arm: zynq: An SPI driver for Zynq platforms	2020-02-28 10:57:23 +00:00