32c96bc813
CR4. This bit is specific to the Intel VTX and removing it makes the library more portable to AMD/SVM. In the Intel VTX implementation, the hypervisor will ensure that this bit is always set. See vmx_fix_cr4() for details. Suggested by: grehan
661 lines
14 KiB
C
661 lines
14 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <machine/specialreg.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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#include <string.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <machine/vmm.h>
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#include <machine/vmm_dev.h>
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#include "vmmapi.h"
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#include "mptable.h"
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#define BIOS_ROM_BASE (0xf0000)
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#define BIOS_ROM_SIZE (0x10000)
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struct vmctx {
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int fd;
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char *name;
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};
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#define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
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#define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
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static int
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vm_device_open(const char *name)
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{
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int fd, len;
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char *vmfile;
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len = strlen("/dev/vmm/") + strlen(name) + 1;
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vmfile = malloc(len);
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assert(vmfile != NULL);
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snprintf(vmfile, len, "/dev/vmm/%s", name);
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/* Open the device file */
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fd = open(vmfile, O_RDWR, 0);
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free(vmfile);
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return (fd);
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}
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int
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vm_create(const char *name)
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{
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return (CREATE((char *)name));
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}
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struct vmctx *
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vm_open(const char *name)
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{
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struct vmctx *vm;
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vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
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assert(vm != NULL);
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vm->fd = -1;
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vm->name = (char *)(vm + 1);
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strcpy(vm->name, name);
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if ((vm->fd = vm_device_open(vm->name)) < 0)
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goto err;
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return (vm);
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err:
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vm_destroy(vm);
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return (NULL);
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}
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void
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vm_destroy(struct vmctx *vm)
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{
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assert(vm != NULL);
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DESTROY(vm->name);
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if (vm->fd >= 0)
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close(vm->fd);
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free(vm);
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}
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int
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vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa,
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vm_paddr_t *ret_hpa, size_t *ret_len)
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{
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int error;
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struct vm_memory_segment seg;
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bzero(&seg, sizeof(seg));
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seg.gpa = gpa;
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error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg);
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*ret_hpa = seg.hpa;
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*ret_len = seg.len;
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return (error);
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}
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int
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vm_setup_memory(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **mapaddr)
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{
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int error;
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struct vm_memory_segment seg;
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/*
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* Create and optionally map 'len' bytes of memory at guest
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* physical address 'gpa'
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*/
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bzero(&seg, sizeof(seg));
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seg.gpa = gpa;
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seg.len = len;
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error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg);
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if (error == 0 && mapaddr != NULL) {
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*mapaddr = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED,
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ctx->fd, gpa);
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}
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return (error);
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}
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char *
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vm_map_memory(struct vmctx *ctx, vm_paddr_t gpa, size_t len)
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{
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/* Map 'len' bytes of memory at guest physical address 'gpa' */
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return ((char *)mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED,
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ctx->fd, gpa));
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}
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int
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vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
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uint64_t base, uint32_t limit, uint32_t access)
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{
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int error;
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struct vm_seg_desc vmsegdesc;
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bzero(&vmsegdesc, sizeof(vmsegdesc));
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vmsegdesc.cpuid = vcpu;
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vmsegdesc.regnum = reg;
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vmsegdesc.desc.base = base;
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vmsegdesc.desc.limit = limit;
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vmsegdesc.desc.access = access;
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error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
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return (error);
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}
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int
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vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
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uint64_t *base, uint32_t *limit, uint32_t *access)
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{
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int error;
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struct vm_seg_desc vmsegdesc;
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bzero(&vmsegdesc, sizeof(vmsegdesc));
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vmsegdesc.cpuid = vcpu;
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vmsegdesc.regnum = reg;
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error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
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if (error == 0) {
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*base = vmsegdesc.desc.base;
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*limit = vmsegdesc.desc.limit;
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*access = vmsegdesc.desc.access;
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}
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return (error);
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}
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int
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vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
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{
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int error;
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struct vm_register vmreg;
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bzero(&vmreg, sizeof(vmreg));
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vmreg.cpuid = vcpu;
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vmreg.regnum = reg;
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vmreg.regval = val;
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error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
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return (error);
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}
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int
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vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
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{
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int error;
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struct vm_register vmreg;
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bzero(&vmreg, sizeof(vmreg));
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vmreg.cpuid = vcpu;
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vmreg.regnum = reg;
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error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
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*ret_val = vmreg.regval;
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return (error);
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}
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int
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vm_get_pinning(struct vmctx *ctx, int vcpu, int *host_cpuid)
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{
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int error;
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struct vm_pin vmpin;
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bzero(&vmpin, sizeof(vmpin));
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vmpin.vm_cpuid = vcpu;
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error = ioctl(ctx->fd, VM_GET_PINNING, &vmpin);
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*host_cpuid = vmpin.host_cpuid;
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return (error);
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}
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int
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vm_set_pinning(struct vmctx *ctx, int vcpu, int host_cpuid)
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{
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int error;
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struct vm_pin vmpin;
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bzero(&vmpin, sizeof(vmpin));
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vmpin.vm_cpuid = vcpu;
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vmpin.host_cpuid = host_cpuid;
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error = ioctl(ctx->fd, VM_SET_PINNING, &vmpin);
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return (error);
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}
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int
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vm_run(struct vmctx *ctx, int vcpu, uint64_t rip, struct vm_exit *vmexit)
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{
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int error;
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struct vm_run vmrun;
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bzero(&vmrun, sizeof(vmrun));
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vmrun.cpuid = vcpu;
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vmrun.rip = rip;
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error = ioctl(ctx->fd, VM_RUN, &vmrun);
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bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
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return (error);
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}
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static int
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vm_inject_event_real(struct vmctx *ctx, int vcpu, enum vm_event_type type,
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int vector, int error_code, int error_code_valid)
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{
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struct vm_event ev;
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bzero(&ev, sizeof(ev));
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ev.cpuid = vcpu;
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ev.type = type;
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ev.vector = vector;
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ev.error_code = error_code;
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ev.error_code_valid = error_code_valid;
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return (ioctl(ctx->fd, VM_INJECT_EVENT, &ev));
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}
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int
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vm_inject_event(struct vmctx *ctx, int vcpu, enum vm_event_type type,
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int vector)
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{
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return (vm_inject_event_real(ctx, vcpu, type, vector, 0, 0));
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}
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int
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vm_inject_event2(struct vmctx *ctx, int vcpu, enum vm_event_type type,
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int vector, int error_code)
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{
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return (vm_inject_event_real(ctx, vcpu, type, vector, error_code, 1));
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}
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int
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vm_build_tables(struct vmctx *ctxt, int ncpu, void *oemtbl, int oemtblsz)
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{
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return (vm_build_mptable(ctxt, BIOS_ROM_BASE, BIOS_ROM_SIZE, ncpu,
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oemtbl, oemtblsz));
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}
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int
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vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
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{
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struct vm_lapic_irq vmirq;
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bzero(&vmirq, sizeof(vmirq));
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vmirq.cpuid = vcpu;
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vmirq.vector = vector;
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return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
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}
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int
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vm_inject_nmi(struct vmctx *ctx, int vcpu)
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{
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struct vm_nmi vmnmi;
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bzero(&vmnmi, sizeof(vmnmi));
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vmnmi.cpuid = vcpu;
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return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
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}
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int
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vm_capability_name2type(const char *capname)
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{
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int i;
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static struct {
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const char *name;
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int type;
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} capstrmap[] = {
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{ "hlt_exit", VM_CAP_HALT_EXIT },
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{ "mtrap_exit", VM_CAP_MTRAP_EXIT },
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{ "pause_exit", VM_CAP_PAUSE_EXIT },
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{ "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST },
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{ 0 }
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};
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for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
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if (strcmp(capstrmap[i].name, capname) == 0)
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return (capstrmap[i].type);
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}
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return (-1);
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}
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int
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vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
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int *retval)
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{
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int error;
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struct vm_capability vmcap;
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bzero(&vmcap, sizeof(vmcap));
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vmcap.cpuid = vcpu;
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vmcap.captype = cap;
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error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
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*retval = vmcap.capval;
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return (error);
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}
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int
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vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
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{
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struct vm_capability vmcap;
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bzero(&vmcap, sizeof(vmcap));
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vmcap.cpuid = vcpu;
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vmcap.captype = cap;
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vmcap.capval = val;
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return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
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}
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int
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vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
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{
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struct vm_pptdev pptdev;
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bzero(&pptdev, sizeof(pptdev));
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pptdev.bus = bus;
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pptdev.slot = slot;
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pptdev.func = func;
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return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
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}
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int
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vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
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{
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struct vm_pptdev pptdev;
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bzero(&pptdev, sizeof(pptdev));
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pptdev.bus = bus;
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pptdev.slot = slot;
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pptdev.func = func;
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return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
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}
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int
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vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
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vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
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{
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struct vm_pptdev_mmio pptmmio;
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bzero(&pptmmio, sizeof(pptmmio));
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pptmmio.bus = bus;
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pptmmio.slot = slot;
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pptmmio.func = func;
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pptmmio.gpa = gpa;
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pptmmio.len = len;
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pptmmio.hpa = hpa;
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return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
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}
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int
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vm_setup_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
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int destcpu, int vector, int numvec)
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{
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struct vm_pptdev_msi pptmsi;
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bzero(&pptmsi, sizeof(pptmsi));
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pptmsi.vcpu = vcpu;
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pptmsi.bus = bus;
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pptmsi.slot = slot;
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pptmsi.func = func;
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pptmsi.destcpu = destcpu;
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pptmsi.vector = vector;
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pptmsi.numvec = numvec;
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return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
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}
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int
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vm_setup_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
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int idx, uint32_t msg, uint32_t vector_control, uint64_t addr)
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{
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struct vm_pptdev_msix pptmsix;
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bzero(&pptmsix, sizeof(pptmsix));
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pptmsix.vcpu = vcpu;
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pptmsix.bus = bus;
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pptmsix.slot = slot;
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pptmsix.func = func;
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pptmsix.idx = idx;
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pptmsix.msg = msg;
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pptmsix.addr = addr;
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pptmsix.vector_control = vector_control;
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return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
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}
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uint64_t *
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vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
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int *ret_entries)
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{
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int error;
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static struct vm_stats vmstats;
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vmstats.cpuid = vcpu;
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error = ioctl(ctx->fd, VM_STATS, &vmstats);
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if (error == 0) {
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if (ret_entries)
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*ret_entries = vmstats.num_entries;
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if (ret_tv)
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*ret_tv = vmstats.tv;
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return (vmstats.statbuf);
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} else
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return (NULL);
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}
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const char *
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vm_get_stat_desc(struct vmctx *ctx, int index)
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{
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static struct vm_stat_desc statdesc;
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statdesc.index = index;
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if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
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return (statdesc.desc);
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else
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return (NULL);
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}
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|
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/*
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|
* From Intel Vol 3a:
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* Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
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*/
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int
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vcpu_reset(struct vmctx *vmctx, int vcpu)
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{
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int error;
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uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
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uint32_t desc_access, desc_limit;
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uint16_t sel;
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zero = 0;
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rflags = 0x2;
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error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
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if (error)
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goto done;
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rip = 0xfff0;
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if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
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goto done;
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cr0 = CR0_NE;
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if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
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goto done;
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if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
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goto done;
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cr4 = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
|
|
goto done;
|
|
|
|
/*
|
|
* CS: present, r/w, accessed, 16-bit, byte granularity, usable
|
|
*/
|
|
desc_base = 0xffff0000;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0093;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0xf000;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
|
|
goto done;
|
|
|
|
/*
|
|
* SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
|
|
*/
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0093;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
|
|
goto done;
|
|
|
|
/* General purpose registers */
|
|
rdx = 0xf00;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
|
|
goto done;
|
|
|
|
/* GDTR, IDTR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error != 0)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error != 0)
|
|
goto done;
|
|
|
|
/* TR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0000008b;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
|
|
goto done;
|
|
|
|
/* LDTR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x00000082;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
|
|
desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
|
|
goto done;
|
|
|
|
/* XXX cr2, debug registers */
|
|
|
|
error = 0;
|
|
done:
|
|
return (error);
|
|
}
|