3df9e0375a
in Open Firmware was Apple-specific, and we have complete coverage of Apple system controllers, so move RTC responsibilities into the system controller drivers. This avoids interesting problems from manipulating these devices through Open Firmware behind the backs of their drivers. Obtained from: NetBSD MFC after: 2 weeks
111 lines
3.2 KiB
C
111 lines
3.2 KiB
C
/*-
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* Copyright (c) 2006 Michael Lorenz
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* Copyright (c) 2008 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*
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*/
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#ifndef _POWERPC_CUDAVAR_H_
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#define _POWERPC_CUDAVAR_H_
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#define CUDA_DEVSTR "Apple CUDA I/O Controller"
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#define CUDA_MAXPACKETS 10
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/* Cuda addresses */
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#define CUDA_ADB 0
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#define CUDA_PSEUDO 1
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#define CUDA_ERROR 2 /* error codes? */
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#define CUDA_TIMER 3
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#define CUDA_POWER 4
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#define CUDA_IIC 5 /* XXX ??? */
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#define CUDA_PMU 6
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#define CUDA_ADB_QUERY 7
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/* Cuda commands */
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#define CMD_AUTOPOLL 1
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#define CMD_READ_RTC 3
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#define CMD_WRITE_RTC 9
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#define CMD_POWEROFF 10
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#define CMD_RESET 17
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#define CMD_IIC 34
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/* Cuda state codes */
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#define CUDA_NOTREADY 0x1 /* has not been initialized yet */
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#define CUDA_IDLE 0x2 /* the bus is currently idle */
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#define CUDA_OUT 0x3 /* sending out a command */
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#define CUDA_IN 0x4 /* receiving data */
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#define CUDA_POLLING 0x5 /* polling - II only */
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struct cuda_packet {
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uint8_t len;
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uint8_t type;
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uint8_t data[253];
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STAILQ_ENTRY(cuda_packet) pkt_q;
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};
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STAILQ_HEAD(cuda_pktq, cuda_packet);
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struct cuda_softc {
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device_t sc_dev;
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int sc_memrid;
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struct resource *sc_memr;
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int sc_irqrid;
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struct resource *sc_irq;
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void *sc_ih;
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struct mtx sc_mutex;
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device_t adb_bus;
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int sc_node;
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volatile int sc_state;
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int sc_waiting;
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int sc_polling;
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int sc_iic_done;
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volatile int sc_autopoll;
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uint32_t sc_rtc;
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int sc_i2c_read_len;
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/* internal buffers */
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uint8_t sc_in[256];
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uint8_t sc_out[256];
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int sc_sent;
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int sc_out_length;
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int sc_received;
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struct cuda_packet sc_pkts[CUDA_MAXPACKETS];
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struct cuda_pktq sc_inq;
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struct cuda_pktq sc_outq;
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struct cuda_pktq sc_freeq;
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};
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#endif /* _POWERPC_CUDAVAR_H_ */
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