310 lines
8.8 KiB
C
310 lines
8.8 KiB
C
/* $FreeBSD$ */
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/* $NecBSD: dp83932var.h,v 1.3 1999/01/24 01:39:51 kmatsuda Exp $ */
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/* $NetBSD: if_snvar.h,v 1.12 1998/05/01 03:42:47 scottr Exp $ */
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/*-
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* [NetBSD for NEC PC-98 series]
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* Copyright (c) 1997, 1998, 1999
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* Kouichi Matsuda. All rights reserved.
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*
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* Copyright (c) 1991 Algorithmics Ltd (http://www.algor.co.uk)
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* You may use, copy, and modify this program so long as you retain the
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* copyright line.
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*/
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/*
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* if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/mac68k vars
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*/
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/*
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* Modified for NetBSD/pc98 1.2.1 from NetBSD/mac68k 1.2D by Kouichi Matsuda.
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* Make adapted for NEC PC-9801-83, 84, PC-9801-103, 104, PC-9801N-25 and
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* PC-9801N-J02, J02R, which uses National Semiconductor DP83934AVQB as
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* Ethernet Controller and National Semiconductor NS46C46 as
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* (64 * 16 bits) Microwire Serial EEPROM.
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*/
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/* borrow from arch/mac68k/dev/if_mcvar.h for debug. */
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#ifdef DDB
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#define integrate
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#define hide
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#else
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#define integrate static __inline
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#define hide static
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#endif
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/* NetBSD Emulation */
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#ifdef __NetBSD__
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#define splhardnet splnet
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#endif
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#ifdef __FreeBSD__
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#define splhardnet splimp
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#ifndef NBPG
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#define NBPG PAGE_SIZE
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#endif
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#ifndef PGOFSET
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#define PGOFSET PAGE_MASK
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#endif
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typedef unsigned long ulong;
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#define delay(x) DELAY(x)
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#endif
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/*
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* Vendor types
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*/
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/*
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* SONIC buffers need to be aligned 16 or 32 bit aligned.
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* These macros calculate and verify alignment.
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*/
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#define ROUNDUP(p, N) (((int) p + N - 1) & ~(N - 1))
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#define SOALIGN(m, array) (m ? (ROUNDUP(array, 4)) : (ROUNDUP(array, 2)))
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#define LOWER(x) ((unsigned)(x) & 0xffff)
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#define UPPER(x) ((unsigned)(x) >> 16)
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/*
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* Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0)
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* and 32 bit mode (everything else) using a single GENERIC kernel
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* binary, all structures have to be accessed using macros which can
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* adjust the offsets appropriately.
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*/
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/* m is not sc->bitmode, we treat m as sc. */
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#define SWO(m, a, o, x) (*(m)->sc_writetodesc)((m), (a), (o), (x))
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#define SRO(m, a, o) (*(m)->sc_readfromdesc)((m), (a), (o))
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/*
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* Register access macros. We use bus_space_* to talk to the Sonic
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* registers. A mapping table is used in case a particular configuration
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* hooked the regs up at non-word offsets.
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*/
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#define NIC_GET(sc, reg) (*(sc)->sc_nic_get)(sc, reg)
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#define NIC_PUT(sc, reg, val) (*(sc)->sc_nic_put)(sc, reg, val)
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#define SONIC_GETDMA(p) (p)
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/* pc98 does not have any write buffers to flush... */
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#define wbflush()
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/*
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* buffer sizes in 32 bit mode
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* 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes
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*
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* 1 RxPkt is 7 words == 28 bytes
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* 1 Rda is 4 words == 16 bytes
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*
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* The CDA is 17 words == 68 bytes
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*
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* total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68
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*/
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#define NRBA 16 /* # receive buffers < NRRA */
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#define RBAMASK (NRBA-1)
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#define NTDA 16 /* # transmit descriptors */
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#define NRRA 64 /* # receive resource descriptors */
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#define RRAMASK (NRRA-1) /* the reason why NRRA must be power of two */
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#define FCSSIZE 4 /* size of FCS appended to packets */
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/*
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* maximum receive packet size plus 2 byte pad to make each
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* one aligned. 4 byte slop (required for eobc)
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*/
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#define RBASIZE(sc) (sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \
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((sc)->bitmode ? 6 : 2))
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/*
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* transmit buffer area
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*/
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#define TXBSIZE 1536 /* 6*2^8 -- the same size as the 8390 TXBUF */
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#define SN_NPAGES 2 + NRBA + (NTDA/2)
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typedef struct mtd {
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u_int32_t mtd_vtxp;
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u_int32_t mtd_vbuf;
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struct mbuf *mtd_mbuf;
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} mtd_t;
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/*
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* The snc_softc for PC-98 if_snc.
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*/
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typedef struct snc_softc {
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struct arpcom sc_ethercom;
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#define sc_if sc_ethercom.ac_if /* network visible interface */
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device_t sc_dev;
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struct resource * ioport;
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int ioport_rid;
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struct resource * iomem;
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int iomem_rid;
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struct resource * irq;
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int irq_rid;
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void * irq_handle;
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bus_space_tag_t sc_iot; /* bus identifier for io */
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bus_space_tag_t sc_memt; /* bus identifier for mem */
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bus_space_handle_t sc_ioh; /* io handle */
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bus_space_handle_t sc_memh; /* bus memory handle */
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int bitmode; /* 32 bit mode == 1, 16 == 0 */
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u_int16_t sncr_dcr; /* DCR for this instance */
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u_int16_t sncr_dcr2; /* DCR2 for this instance */
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int sc_rramark; /* index into v_rra of wp */
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u_int32_t v_rra[NRRA]; /* DMA addresses of v_rra */
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u_int32_t v_rea; /* ptr to the end of the rra space */
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int sc_rxmark; /* current hw pos in rda ring */
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int sc_rdamark; /* current sw pos in rda ring */
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int sc_nrda; /* total number of RDAs */
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u_int32_t v_rda;
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u_int32_t rbuf[NRBA];
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struct mtd mtda[NTDA];
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int mtd_hw; /* idx of first mtd given to hw */
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int mtd_prev; /* idx of last mtd given to hardware */
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int mtd_free; /* next free mtd to use */
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int mtd_tlinko; /*
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* offset of tlink of last txp given
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* to SONIC. Need to clear EOL on
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* this word to add a desc.
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*/
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int mtd_pint; /* Counter to set TXP_PINT */
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u_int32_t v_cda;
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u_int8_t curbank; /* current window bank */
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struct ifmedia sc_media; /* supported media information */
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/*
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* NIC register access functions:
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*/
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u_int16_t (*sc_nic_get)
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(struct snc_softc *, u_int8_t);
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void (*sc_nic_put)
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(struct snc_softc *, u_int8_t, u_int16_t);
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/*
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* Memory functions:
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*
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* copy to/from descriptor
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* copy to/from buffer
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* zero bytes in buffer
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*/
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void (*sc_writetodesc)
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(struct snc_softc *, u_int32_t, u_int32_t, u_int16_t);
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u_int16_t (*sc_readfromdesc)
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(struct snc_softc *, u_int32_t, u_int32_t);
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void (*sc_copytobuf)
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(struct snc_softc *, void *, u_int32_t, size_t);
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void (*sc_copyfrombuf)
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(struct snc_softc *, void *, u_int32_t, size_t);
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void (*sc_zerobuf)
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(struct snc_softc *, u_int32_t, size_t);
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/*
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* Machine-dependent functions:
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*
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* hardware reset hook - may be NULL
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* hardware init hook - may be NULL
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* media change hook - may be NULL
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*/
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void (*sc_hwreset)(struct snc_softc *);
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void (*sc_hwinit)(struct snc_softc *);
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int (*sc_mediachange)(struct snc_softc *);
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void (*sc_mediastatus)(struct snc_softc *, struct ifmediareq *);
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int sc_enabled; /* boolean; power enabled on interface */
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int (*sc_enable)(struct snc_softc *);
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void (*sc_disable)(struct snc_softc *);
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void *sc_sh; /* shutdownhook cookie */
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int gone;
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#if NRND > 0
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rndsource_element_t rnd_source;
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#endif
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} snc_softc_t;
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/*
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* Accessing SONIC data structures and registers as 32 bit values
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* makes code endianess independent. The SONIC is however always in
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* bigendian mode so it is necessary to ensure that data structures shared
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* between the CPU and the SONIC are always in bigendian order.
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*/
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/*
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* Receive Resource Descriptor
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* This structure describes the buffers into which packets
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* will be received. Note that more than one packet may be
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* packed into a single buffer if constraints permit.
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*/
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#define RXRSRC_PTRLO 0 /* buffer address LO */
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#define RXRSRC_PTRHI 1 /* buffer address HI */
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#define RXRSRC_WCLO 2 /* buffer size (16bit words) LO */
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#define RXRSRC_WCHI 3 /* buffer size (16bit words) HI */
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#define RXRSRC_SIZE(sc) (sc->bitmode ? (4 * 4) : (4 * 2))
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/*
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* Receive Descriptor
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* This structure holds information about packets received.
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*/
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#define RXPKT_STATUS 0
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#define RXPKT_BYTEC 1
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#define RXPKT_PTRLO 2
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#define RXPKT_PTRHI 3
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#define RXPKT_SEQNO 4
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#define RXPKT_RLINK 5
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#define RXPKT_INUSE 6
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#define RXPKT_SIZE(sc) (sc->bitmode ? (7 * 4) : (7 * 2))
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#define RBASEQ(x) (((x)>>8)&0xff)
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#define PSNSEQ(x) ((x) & 0xff)
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/*
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* Transmit Descriptor
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* This structure holds information about packets to be transmitted.
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*/
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#define FRAGMAX 8 /* maximum number of fragments in a packet */
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#define TXP_STATUS 0 /* + transmitted packet status */
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#define TXP_CONFIG 1 /* transmission configuration */
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#define TXP_PKTSIZE 2 /* entire packet size in bytes */
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#define TXP_FRAGCNT 3 /* # fragments in packet */
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#define TXP_FRAGOFF 4 /* offset to first fragment */
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#define TXP_FRAGSIZE 3 /* size of each fragment desc */
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#define TXP_FPTRLO 0 /* ptr to packet fragment LO */
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#define TXP_FPTRHI 1 /* ptr to packet fragment HI */
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#define TXP_FSIZE 2 /* fragment size */
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#define TXP_WORDS (TXP_FRAGOFF + (FRAGMAX*TXP_FRAGSIZE) + 1) /* 1 for tlink */
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#define TXP_SIZE(sc) ((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2))
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#define EOL 0x0001 /* end of list marker for link fields */
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/*
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* CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to
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* match incoming addresses against. It is programmed via DMA
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* from a memory region.
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*/
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#define MAXCAM 16 /* number of user entries in CAM */
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#define CDA_CAMDESC 4 /* # words i na descriptor */
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#define CDA_CAMEP 0 /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
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#define CDA_CAMAP0 1 /* CAM Address Port 1 xx-xx-YY-YY-xx-xx */
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#define CDA_CAMAP1 2 /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
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#define CDA_CAMAP2 3
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#define CDA_ENABLE 64 /* mask enabling CAM entries */
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#define CDA_SIZE(sc) ((4*16 + 1) * ((sc->bitmode) ? 4 : 2))
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void sncconfig(struct snc_softc *, int *, int, int, u_int8_t *);
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void sncintr(void *);
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void sncshutdown(void *);
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