362 lines
8.3 KiB
C
362 lines
8.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/resource.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/pwm/pwmbus.h>
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#include "pwm_if.h"
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#define AW_PWM_CTRL 0x00
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#define AW_PWM_CTRL_PRESCALE_MASK 0xF
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#define AW_PWM_CTRL_EN (1 << 4)
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#define AW_PWM_CTRL_ACTIVE_LEVEL_HIGH (1 << 5)
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#define AW_PWM_CTRL_GATE (1 << 6)
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#define AW_PWM_CTRL_MODE_MASK 0x80
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#define AW_PWM_CTRL_PULSE_MODE (1 << 7)
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#define AW_PWM_CTRL_CYCLE_MODE (0 << 7)
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#define AW_PWM_CTRL_PULSE_START (1 << 8)
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#define AW_PWM_CTRL_CLK_BYPASS (1 << 9)
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#define AW_PWM_CTRL_PERIOD_BUSY (1 << 28)
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#define AW_PWM_PERIOD 0x04
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#define AW_PWM_PERIOD_TOTAL_MASK 0xFFFF
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#define AW_PWM_PERIOD_TOTAL_SHIFT 16
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#define AW_PWM_PERIOD_ACTIVE_MASK 0xFFFF
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#define AW_PWM_PERIOD_ACTIVE_SHIFT 0
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#define AW_PWM_MAX_FREQ 24000000
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#define NS_PER_SEC 1000000000
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static struct ofw_compat_data compat_data[] = {
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{ "allwinner,sun5i-a13-pwm", 1 },
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{ NULL, 0 }
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};
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static struct resource_spec aw_pwm_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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struct aw_pwm_softc {
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device_t dev;
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device_t busdev;
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clk_t clk;
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struct resource *res;
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uint64_t clk_freq;
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unsigned int period;
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unsigned int duty;
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uint32_t flags;
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bool enabled;
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};
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static uint32_t aw_pwm_clk_prescaler[] = {
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120,
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180,
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240,
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360,
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480,
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0,
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0,
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0,
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12000,
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24000,
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36000,
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48000,
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72000,
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0,
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0,
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1,
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};
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#define AW_PWM_READ(sc, reg) bus_read_4((sc)->res, (reg))
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#define AW_PWM_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
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static int aw_pwm_probe(device_t dev);
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static int aw_pwm_attach(device_t dev);
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static int aw_pwm_detach(device_t dev);
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static int
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aw_pwm_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
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return (ENXIO);
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device_set_desc(dev, "Allwinner PWM");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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aw_pwm_attach(device_t dev)
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{
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struct aw_pwm_softc *sc;
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uint64_t clk_freq;
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uint32_t reg;
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int error;
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sc = device_get_softc(dev);
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sc->dev = dev;
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error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
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if (error != 0) {
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device_printf(dev, "cannot get clock\n");
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goto fail;
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}
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error = clk_enable(sc->clk);
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error = clk_get_freq(sc->clk, &sc->clk_freq);
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if (bus_alloc_resources(dev, aw_pwm_spec, &sc->res) != 0) {
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device_printf(dev, "cannot allocate resources for device\n");
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error = ENXIO;
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goto fail;
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}
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if ((sc->busdev = pwmbus_attach_bus(dev)) == NULL)
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device_printf(dev, "Cannot attach pwm bus\n");
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/* Read the configuration left by U-Boot */
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reg = AW_PWM_READ(sc, AW_PWM_CTRL);
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if (reg & (AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN))
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sc->enabled = true;
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reg = AW_PWM_READ(sc, AW_PWM_CTRL);
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reg &= AW_PWM_CTRL_PRESCALE_MASK;
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if (reg > nitems(aw_pwm_clk_prescaler)) {
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device_printf(dev, "Bad prescaler %x, cannot guess current settings\n", reg);
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goto out;
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}
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clk_freq = sc->clk_freq / aw_pwm_clk_prescaler[reg];
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reg = AW_PWM_READ(sc, AW_PWM_PERIOD);
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sc->period = NS_PER_SEC /
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(clk_freq / ((reg >> AW_PWM_PERIOD_TOTAL_SHIFT) & AW_PWM_PERIOD_TOTAL_MASK));
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sc->duty = NS_PER_SEC /
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(clk_freq / ((reg >> AW_PWM_PERIOD_ACTIVE_SHIFT) & AW_PWM_PERIOD_ACTIVE_MASK));
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out:
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return (0);
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fail:
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aw_pwm_detach(dev);
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return (error);
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}
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static int
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aw_pwm_detach(device_t dev)
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{
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struct aw_pwm_softc *sc;
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sc = device_get_softc(dev);
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bus_generic_detach(sc->dev);
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bus_release_resources(dev, aw_pwm_spec, &sc->res);
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return (0);
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}
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static int
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aw_pwm_channel_max(device_t dev, int *nchannel)
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{
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*nchannel = 1;
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return (0);
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}
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static int
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aw_pwm_channel_config(device_t dev, int channel, unsigned int period, unsigned int duty)
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{
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struct aw_pwm_softc *sc;
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uint64_t period_freq, duty_freq;
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uint64_t clk_rate, div;
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uint32_t reg;
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int prescaler;
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int i;
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sc = device_get_softc(dev);
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period_freq = NS_PER_SEC / period;
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if (period_freq > AW_PWM_MAX_FREQ)
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return (EINVAL);
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duty_freq = NS_PER_SEC / duty;
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if (duty_freq < period_freq) {
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device_printf(sc->dev, "duty < period\n");
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return (EINVAL);
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}
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/* First test without prescaler */
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clk_rate = AW_PWM_MAX_FREQ;
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prescaler = AW_PWM_CTRL_PRESCALE_MASK;
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div = AW_PWM_MAX_FREQ / period_freq;
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if ((div - 1) > AW_PWM_PERIOD_TOTAL_MASK) {
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/* Test all prescaler */
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for (i = 0; i < nitems(aw_pwm_clk_prescaler); i++) {
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if (aw_pwm_clk_prescaler[i] == 0)
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continue;
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div = (AW_PWM_MAX_FREQ * aw_pwm_clk_prescaler[i]) / period_freq;
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if ((div - 1) < AW_PWM_PERIOD_TOTAL_MASK ) {
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prescaler = i;
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clk_rate = AW_PWM_MAX_FREQ / aw_pwm_clk_prescaler[i];
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break;
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}
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}
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if (prescaler == AW_PWM_CTRL_PRESCALE_MASK)
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return (EINVAL);
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}
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reg = AW_PWM_READ(sc, AW_PWM_CTRL);
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if (reg & AW_PWM_CTRL_PERIOD_BUSY) {
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device_printf(sc->dev, "pwm busy\n");
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return (EBUSY);
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}
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/* Write the prescalar */
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reg &= ~AW_PWM_CTRL_PRESCALE_MASK;
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reg |= prescaler;
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AW_PWM_WRITE(sc, AW_PWM_CTRL, reg);
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/* Write the total/active cycles */
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reg = ((clk_rate / period_freq) << AW_PWM_PERIOD_TOTAL_SHIFT) |
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((clk_rate / duty_freq) << AW_PWM_PERIOD_ACTIVE_SHIFT);
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AW_PWM_WRITE(sc, AW_PWM_PERIOD, reg);
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sc->period = period;
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sc->duty = duty;
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return (0);
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}
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static int
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aw_pwm_channel_get_config(device_t dev, int channel, unsigned int *period, unsigned int *duty)
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{
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struct aw_pwm_softc *sc;
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sc = device_get_softc(dev);
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*period = sc->period;
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*duty = sc->duty;
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return (0);
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}
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static int
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aw_pwm_channel_enable(device_t dev, int channel, bool enable)
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{
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struct aw_pwm_softc *sc;
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uint32_t reg;
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sc = device_get_softc(dev);
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if (enable && sc->enabled)
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return (0);
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reg = AW_PWM_READ(sc, AW_PWM_CTRL);
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if (enable)
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reg |= AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN;
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else
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reg &= ~(AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN);
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AW_PWM_WRITE(sc, AW_PWM_CTRL, reg);
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sc->enabled = enable;
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return (0);
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}
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static int
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aw_pwm_channel_is_enabled(device_t dev, int channel, bool *enabled)
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{
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struct aw_pwm_softc *sc;
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sc = device_get_softc(dev);
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*enabled = sc->enabled;
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return (0);
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}
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static device_t
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aw_pwm_get_bus(device_t dev)
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{
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struct aw_pwm_softc *sc;
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sc = device_get_softc(dev);
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return (sc->busdev);
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}
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static device_method_t aw_pwm_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, aw_pwm_probe),
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DEVMETHOD(device_attach, aw_pwm_attach),
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DEVMETHOD(device_detach, aw_pwm_detach),
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/* pwm interface */
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DEVMETHOD(pwm_get_bus, aw_pwm_get_bus),
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DEVMETHOD(pwm_channel_max, aw_pwm_channel_max),
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DEVMETHOD(pwm_channel_config, aw_pwm_channel_config),
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DEVMETHOD(pwm_channel_get_config, aw_pwm_channel_get_config),
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DEVMETHOD(pwm_channel_enable, aw_pwm_channel_enable),
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DEVMETHOD(pwm_channel_is_enabled, aw_pwm_channel_is_enabled),
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DEVMETHOD_END
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};
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static driver_t aw_pwm_driver = {
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"pwm",
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aw_pwm_methods,
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sizeof(struct aw_pwm_softc),
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};
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static devclass_t aw_pwm_devclass;
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DRIVER_MODULE(aw_pwm, simplebus, aw_pwm_driver, aw_pwm_devclass, 0, 0);
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SIMPLEBUS_PNP_INFO(compat_data);
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