Leandro Lupori 3d0399c718 [PowerPC64] Clear low-order bits of ARPN
PowerISA 2.07B says that the low-order p-12 bits of the real page number
contained in ARPN and LP fields of a PTE must be 0s and are ignored
by the hardware (Book III-S, 5.7.7.1), where 2^p is the actual page size
in bytes, but we were clearing only the LP field.

This worked on bare metal and QEMU with KVM, that ignore these bits,
but caused a kernel panic on QEMU with TCG, that expects them to be
cleared.

This fixes running FreeBSD with HPT superpages enabled on QEMU
with TCG.

MFC after:	2 weeks
Sponsored by:	Eldorado Research Institute (eldorado.org.br)
2021-03-25 14:01:57 -03:00
2021-03-16 07:12:40 +01:00
2021-03-25 11:45:19 -04:00
2021-03-01 16:01:44 +01:00
2021-03-25 11:05:31 -04:00
2021-03-25 00:51:44 +01:00
2020-11-23 04:39:29 +00:00
2020-12-31 10:29:44 -05:00
2018-06-09 03:08:04 +00:00
2021-01-21 19:10:07 -05:00
2021-02-25 11:02:09 -05:00

FreeBSD Source:

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Description
freebsd with flexible iflib nic queues
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