0cfab8ddc1
and Core Duo), models 0xF (Core2), model 0x17 (Core2Extreme) and
model 0x1C (Atom).
In these CPUs, the actual numbers, kinds and widths of PMCs present
need to queried at run time. Support for specific "architectural"
events also needs to be queried at run time.
Model 0xE CPUs support programmable PMCs, subsequent CPUs
additionally support "fixed-function" counters.
- Use event names that are close to vendor documentation, taking in
account that:
- events with identical semantics on two or more CPUs in this family
can have differing names in vendor documentation,
- identical vendor event names may map to differing events across
CPUs,
- each type of CPU supports a different subset of measurable
events.
Fixed-function and programmable counters both use the same vendor
names for events. The use of a class name prefix ("iaf-" or
"iap-" respectively) permits these to be distinguished.
- In libpmc, refactor pmc_name_of_event() into a public interface
and an internal helper function, for use by log handling code.
- Minor code tweaks: staticize a global, freshen a few comments.
Tested by: gnn
40 lines
716 B
Makefile
40 lines
716 B
Makefile
#
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# $FreeBSD$
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#
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.PATH: ${.CURDIR}/../../dev/hwpmc
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KMOD= hwpmc
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SRCS= hwpmc_mod.c hwpmc_logging.c vnode_if.h
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.if ${MACHINE_ARCH} == "amd64"
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SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_tsc.c
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SRCS+= hwpmc_x86.c
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SRCS+= device_if.h bus_if.h
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.endif
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.if ${MACHINE_ARCH} == "arm"
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SRCS+= hwpmc_arm.c
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.endif
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.if ${MACHINE_ARCH} == "i386"
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SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_ppro.c
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SRCS+= hwpmc_pentium.c hwpmc_tsc.c hwpmc_x86.c
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SRCS+= device_if.h bus_if.h
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.endif
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.if ${MACHINE_ARCH} == "ia64"
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SRCS+= hwpmc_ia64.c
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.endif
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.if ${MACHINE_ARCH} == "powerpc"
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SRCS+= hwpmc_powerpc.c
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.endif
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.if ${MACHINE_ARCH} == "sparc64"
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SRCS+= hwpmc_sparc64.c
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.endif
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.include <bsd.kmod.mk>
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