230754ccca
BERI stands for Bluespec Extensible RISC Implementation, based on MIPS. BERI has not implemented standard MIPS perfomance monitoring counters, instead it provides statistical counters. BERI statcounters have a several limitations: - They can't be written - They don't support start/stop operation - None of hardware interrupt is provided on a counter overflow. So make it separate to hwpmc_mips module and support process/system counting mode only. Sponsored by: DARPA, AFRL |
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| .. | ||
| pmu-events | ||
| libpmc_json.cc | ||
| libpmc_pmu_util.c | ||
| libpmc.c | ||
| libpmcinternal.h | ||
| Makefile | ||
| Makefile.depend | ||
| Makefile.inc | ||
| pmc_allocate.3 | ||
| pmc_attach.3 | ||
| pmc_capabilities.3 | ||
| pmc_configure_logfile.3 | ||
| pmc_disable.3 | ||
| pmc_event_names_of_class.3 | ||
| pmc_get_driver_stats.3 | ||
| pmc_get_msr.3 | ||
| pmc_init.3 | ||
| pmc_name_of_capability.3 | ||
| pmc_read.3 | ||
| pmc_set.3 | ||
| pmc_start.3 | ||
| pmc.3 | ||
| pmc.atom.3 | ||
| pmc.atomsilvermont.3 | ||
| pmc.core2.3 | ||
| pmc.core.3 | ||
| pmc.corei7.3 | ||
| pmc.corei7uc.3 | ||
| pmc.h | ||
| pmc.haswell.3 | ||
| pmc.haswelluc.3 | ||
| pmc.haswellxeon.3 | ||
| pmc.iaf.3 | ||
| pmc.ivybridge.3 | ||
| pmc.ivybridgexeon.3 | ||
| pmc.k7.3 | ||
| pmc.k8.3 | ||
| pmc.mips24k.3 | ||
| pmc.octeon.3 | ||
| pmc.p4.3 | ||
| pmc.p5.3 | ||
| pmc.p6.3 | ||
| pmc.sandybridge.3 | ||
| pmc.sandybridgeuc.3 | ||
| pmc.sandybridgexeon.3 | ||
| pmc.soft.3 | ||
| pmc.tsc.3 | ||
| pmc.ucf.3 | ||
| pmc.westmere.3 | ||
| pmc.westmereuc.3 | ||
| pmc.xscale.3 | ||
| pmcformat.h | ||
| pmclog.3 | ||
| pmclog.c | ||
| pmclog.h | ||