bf7f8bd30a
Setting strict causes a validation of the requested value vs the value currently running after a frequency change is requested. Change applicability to be single core not i386. Thanks to mav@ for reviewing and commenting on my lack of understanding. MFC after: 2 weeks
99 lines
3.2 KiB
Groff
99 lines
3.2 KiB
Groff
.\"
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.\" Copyright (c) 2012 Sean Bruno <sbruno@freebsd.org>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd June 12, 2012
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.Dt EST 4
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.Os
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.Sh NAME
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.Nm est
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.Nd Enhanced Speedstep Technology
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.Sh SYNOPSIS
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To compile this capability into your kernel
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place the following line in your kernel
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configuration file:
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.Bd -ragged -offset indent
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.Cd "device cpufreq"
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.Ed
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.Sh DESCRIPTION
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The
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.Nm
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interface provides support for the Intel Enhanced Speedstep Technology.
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.Pp
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Note that
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.Nm
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capabilities are automatically loaded by the
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.Xr cpufreq 4
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driver.
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.Sh LOADER TUNABLES
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The
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.Nm
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interface is intended to allow
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.Xr cpufreq 4
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to access and implement Intel Enhanced SpeedStep Technology via
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.Xr acpi 4
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and the acpi_perf interface accessors.
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If the default settings are not optimal, the following sysctls can be
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used to modify or monitor
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.Nm
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behavior.
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.Bl -tag -width indent
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.It hw.est.msr_info
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Attempt to infer information from direct probing of the msr.
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Should only be used in diagnostic cases
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.Pq default 0
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.It hw.est.strict
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Validate frequency requested is accepted by the cpu when set.
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It appears that this will only work on single core cpus.
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.Pq default 0
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.El
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "est%d: <Enhanced SpeedStep Frequency Control> on cpu%d"
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.Pp
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Indicates normal startup of this interface.
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.It "est: CPU supports Enhanced Speedstep, but is not recognized."
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.It "est: cpu_vendor GenuineIntel, msr 471c471c0600471c"
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.It "device_attach: est%d attach returned 6"
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.Pp
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Indicates all attempts to attach to this interface have failed.
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This usually indicates an improper BIOS setting restricting O/S
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control of the CPU speeds.
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Consult your BIOS documentation for more details.
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.El
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.Sh COMPATIBILITY
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.Nm
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is only found on supported Intel CPUs.
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.Sh SEE ALSO
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.Xr cpufreq 4
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.Rs
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.%T "Intel 64 and IA-32 Architectures Software Developer Manuals"
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.%U "http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html"
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.Re
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.Sh AUTHORS
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This manual page was written by
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.An Sean Bruno Aq sbruno@FreeBSD.org .
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