Nathan Whitehorn 4770f5380e Fix a typo derived from a mismerge from mmu_oea that would cause ... pmap_sync_icache() to sync random (possibly uncached or nonexisting!) memory, causing kernel page faults or machine checks, most easily triggered by using GDB. While here, add an additional safeguard to only sync cacheable memory. MFC after: 2 days		2011-06-04 03:22:16 +00:00
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aim	Fix a typo derived from a mismerge from mmu_oea that would cause	2011-06-04 03:22:16 +00:00
booke	On multi-core, multi-threaded PPC systems, it is important that the threads	2011-05-31 15:11:43 +00:00
compile
conf	Add a new driver, the ad7417, to read temperatures and voltages on some	2011-05-29 14:25:42 +00:00
cpufreq	Remove unused variables. Spotted by a cppcheck	2011-01-06 20:19:01 +00:00
fpu	The NetBSD Foundation has granted permission to remove clause 3 and 4 from	2010-03-03 17:07:02 +00:00
include	The POWER7 has only 32 SLB slots instead of 64, like other supported	2011-06-02 14:25:52 +00:00
mambo	Fix the interrupt code, broken 7 months ago. The interrupt framework	2011-01-29 20:58:38 +00:00
mpc85xx	o Determine the number of LAWs in a way the is future proof. Only the	2011-05-28 19:14:16 +00:00
ofw	Temporarily back out those parts of r222613 related to parsing the memory	2011-06-02 17:43:17 +00:00
powermac	- Introduce a define for ZERO_C_TO_K.	2011-06-03 20:43:12 +00:00
powerpc	On multi-core, multi-threaded PPC systems, it is important that the threads	2011-05-31 15:11:43 +00:00
ps3	Add RTC support for the LV1 clock on the PS3. The hypervisor won't let us	2011-05-24 02:19:45 +00:00
psim	Fix the interrupt code, broken 7 months ago. The interrupt framework	2011-01-29 20:58:38 +00:00