04b6fa8330
facilities as well as support for the Octeon 2 family of SoCs.
XXX Note that with our antediluvian assembler, we can't support some Octeon 2
instructions and fall back to using the old ones instead.
529 lines
20 KiB
C
529 lines
20 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include "cvmx-config.h"
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#include "cvmx.h"
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#include "cvmx-spinlock.h"
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#include <octeon-app-init.h>
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#include "cvmx-sysinfo.h"
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#include "cvmx-bootmem.h"
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#include "cvmx-uart.h"
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#include "cvmx-coremask.h"
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#include "cvmx-core.h"
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#include "cvmx-interrupt.h"
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#include "cvmx-ebt3000.h"
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#include "cvmx-sim-magic.h"
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#include "cvmx-debug.h"
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#include "../../bootloader/u-boot/include/octeon_mem_map.h"
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int cvmx_debug_uart = -1;
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/**
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* @file
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*
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* Main entry point for all simple executive based programs.
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*/
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extern void cvmx_interrupt_initialize(void);
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/**
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* Main entry point for all simple executive based programs.
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* This is the first C function called. It completes
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* initialization, calls main, and performs C level cleanup.
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*
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* @param app_desc_addr
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* Address of the application description structure passed
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* brom the boot loader.
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*/
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EXTERN_ASM void __cvmx_app_init(uint64_t app_desc_addr);
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/**
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* Set up sysinfo structure from boot descriptor versions 6 and higher.
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* In these versions, the interesting data in not in the boot info structure
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* defined by the toolchain, but is in the cvmx_bootinfo structure defined in
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* the simple exec.
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*
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* @param app_desc_ptr
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* pointer to boot descriptor block
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*
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* @param sys_info_ptr
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* pointer to sysinfo structure to fill in
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*/
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static void process_boot_desc_ver_6(octeon_boot_descriptor_t *app_desc_ptr, cvmx_sysinfo_t *sys_info_ptr)
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{
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cvmx_bootinfo_t *cvmx_bootinfo_ptr = CASTPTR(cvmx_bootinfo_t, app_desc_ptr->cvmx_desc_vaddr);
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/* copy application information for simple exec use */
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/* Populate the sys_info structure from the boot descriptor block created by the bootloader.
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** The boot descriptor block is put in the top of the heap, so it will be overwritten when the
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** heap is fully used. Information that is to be used must be copied before that.
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** Applications should only use the sys_info structure, not the boot descriptor
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*/
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if (cvmx_bootinfo_ptr->major_version == 1)
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{
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sys_info_ptr->core_mask = cvmx_bootinfo_ptr->core_mask;
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sys_info_ptr->heap_base = cvmx_bootinfo_ptr->heap_base;
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sys_info_ptr->heap_size = cvmx_bootinfo_ptr->heap_end - cvmx_bootinfo_ptr->heap_base;
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sys_info_ptr->stack_top = cvmx_bootinfo_ptr->stack_top;
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sys_info_ptr->stack_size = cvmx_bootinfo_ptr->stack_size;
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sys_info_ptr->init_core = cvmx_get_core_num();
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sys_info_ptr->phy_mem_desc_addr = cvmx_bootinfo_ptr->phy_mem_desc_addr;
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sys_info_ptr->exception_base_addr = cvmx_bootinfo_ptr->exception_base_addr;
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sys_info_ptr->cpu_clock_hz = cvmx_bootinfo_ptr->eclock_hz;
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sys_info_ptr->dram_data_rate_hz = cvmx_bootinfo_ptr->dclock_hz * 2;
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sys_info_ptr->board_type = cvmx_bootinfo_ptr->board_type;
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sys_info_ptr->board_rev_major = cvmx_bootinfo_ptr->board_rev_major;
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sys_info_ptr->board_rev_minor = cvmx_bootinfo_ptr->board_rev_minor;
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memcpy(sys_info_ptr->mac_addr_base, cvmx_bootinfo_ptr->mac_addr_base, 6);
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sys_info_ptr->mac_addr_count = cvmx_bootinfo_ptr->mac_addr_count;
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memcpy(sys_info_ptr->board_serial_number, cvmx_bootinfo_ptr->board_serial_number, CVMX_BOOTINFO_OCTEON_SERIAL_LEN);
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sys_info_ptr->console_uart_num = 0;
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if (cvmx_bootinfo_ptr->flags & OCTEON_BL_FLAG_CONSOLE_UART1)
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sys_info_ptr->console_uart_num = 1;
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if (cvmx_bootinfo_ptr->dram_size > 32*1024*1024)
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sys_info_ptr->system_dram_size = (uint64_t)cvmx_bootinfo_ptr->dram_size; /* older bootloaders incorrectly gave this in bytes, so don't convert */
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else
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sys_info_ptr->system_dram_size = (uint64_t)cvmx_bootinfo_ptr->dram_size * 1024 * 1024; /* convert from Megabytes to bytes */
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if (cvmx_bootinfo_ptr->minor_version >= 1)
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{
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sys_info_ptr->compact_flash_common_base_addr = cvmx_bootinfo_ptr->compact_flash_common_base_addr;
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sys_info_ptr->compact_flash_attribute_base_addr = cvmx_bootinfo_ptr->compact_flash_attribute_base_addr;
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sys_info_ptr->led_display_base_addr = cvmx_bootinfo_ptr->led_display_base_addr;
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}
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else if (sys_info_ptr->board_type == CVMX_BOARD_TYPE_EBT3000 ||
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sys_info_ptr->board_type == CVMX_BOARD_TYPE_EBT5800 ||
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sys_info_ptr->board_type == CVMX_BOARD_TYPE_EBT5810)
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{
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/* Default these variables so that users of structure can be the same no
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** matter what version fo boot info block the bootloader passes */
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sys_info_ptr->compact_flash_common_base_addr = 0x1d000000 + 0x800;
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sys_info_ptr->compact_flash_attribute_base_addr = 0x1d010000;
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if (sys_info_ptr->board_rev_major == 1)
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sys_info_ptr->led_display_base_addr = 0x1d020000;
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else
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sys_info_ptr->led_display_base_addr = 0x1d020000 + 0xf8;
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}
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else
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{
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sys_info_ptr->compact_flash_common_base_addr = 0;
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sys_info_ptr->compact_flash_attribute_base_addr = 0;
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sys_info_ptr->led_display_base_addr = 0;
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}
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if (cvmx_bootinfo_ptr->minor_version >= 2)
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{
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sys_info_ptr->dfa_ref_clock_hz = cvmx_bootinfo_ptr->dfa_ref_clock_hz;
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sys_info_ptr->bootloader_config_flags = cvmx_bootinfo_ptr->config_flags;
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}
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else
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{
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sys_info_ptr->dfa_ref_clock_hz = 0;
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sys_info_ptr->bootloader_config_flags = 0;
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if (app_desc_ptr->flags & OCTEON_BL_FLAG_DEBUG)
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sys_info_ptr->bootloader_config_flags |= CVMX_BOOTINFO_CFG_FLAG_DEBUG;
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if (app_desc_ptr->flags & OCTEON_BL_FLAG_NO_MAGIC)
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sys_info_ptr->bootloader_config_flags |= CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC;
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}
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}
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else
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{
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printf("ERROR: Incompatible CVMX descriptor passed by bootloader: %d.%d\n",
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(int)cvmx_bootinfo_ptr->major_version, (int)cvmx_bootinfo_ptr->minor_version);
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exit(-1);
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}
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}
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/**
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* Interrupt handler for calling exit on Control-C interrupts.
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*
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* @param irq_number IRQ interrupt number
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* @param registers CPU registers at the time of the interrupt
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* @param user_arg Unused user argument
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*/
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static void process_break_interrupt(int irq_number, uint64_t registers[32], void *user_arg)
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{
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/* Exclude new functionality when building with older toolchains */
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#if OCTEON_APP_INIT_H_VERSION >= 3
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int uart = irq_number - CVMX_IRQ_UART0;
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cvmx_uart_lsr_t lsrval;
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/* Check for a Control-C interrupt from the console. This loop will eat
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all input received on the uart */
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lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(uart));
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while (lsrval.s.dr)
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{
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int c = cvmx_read_csr(CVMX_MIO_UARTX_RBR(uart));
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if (c == '\003')
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{
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register uint64_t tmp;
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/* Wait for an another Control-C if right now we have no
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access to the console. After this point we hold the
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lock and use a different lock to synchronize between
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the memfile dumps from different cores. As a
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consequence regular printfs *don't* work after this
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point! */
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if (__octeon_uart_trylock () == 1)
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return;
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/* Pulse MCD0 signal on Ctrl-C to stop all the cores. Also
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set the MCD0 to be not masked by this core so we know
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the signal is received by someone */
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asm volatile (
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"dmfc0 %0, $22\n"
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"ori %0, %0, 0x1110\n"
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"dmtc0 %0, $22\n"
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: "=r" (tmp));
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}
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lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(uart));
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}
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#endif
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}
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/**
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* This is the debug exception handler with "break". Before calling exit to
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* dump the profile-feedback output it releases the lock on the console.
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* This way if there is buffered data in stdout it can still be flushed.
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* stdio is required to flush all output during an fread.
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*/
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static void exit_on_break(void)
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{
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#if OCTEON_APP_INIT_H_VERSION >= 4
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unsigned int coremask = cvmx_sysinfo_get()->core_mask;
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cvmx_coremask_barrier_sync(coremask);
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if (cvmx_coremask_first_core(coremask))
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__octeon_uart_unlock();
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#endif
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exit(0);
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}
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/* Add string signature to applications so that we can easily tell what
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** Octeon revision they were compiled for. Don't make static to avoid unused
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** variable warning. */
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#define xstr(s) str(s)
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#define str(s) #s
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int octeon_model_version_check(uint32_t chip_id);
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#define OMS xstr(OCTEON_MODEL)
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char octeon_rev_signature[] =
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#ifdef USE_RUNTIME_MODEL_CHECKS
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"Compiled for runtime Octeon model checking";
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#else
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"Compiled for Octeon processor id: "OMS;
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#endif
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void __cvmx_app_init(uint64_t app_desc_addr)
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{
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/* App descriptor used by bootloader */
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octeon_boot_descriptor_t *app_desc_ptr = CASTPTR(octeon_boot_descriptor_t, app_desc_addr);
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/* app info structure used by the simple exec */
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cvmx_sysinfo_t *sys_info_ptr = cvmx_sysinfo_get();
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int breakflag = 0;
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if (cvmx_coremask_first_core(app_desc_ptr->core_mask))
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{
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/* do once per application setup */
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if (app_desc_ptr->desc_version < 6)
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{
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printf("Obsolete bootloader, can't run application\n");
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exit(-1);
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}
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else
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{
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/* Handle all newer versions here.... */
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if (app_desc_ptr->desc_version > 7)
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{
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printf("Warning: newer boot descripter version than expected\n");
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}
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process_boot_desc_ver_6(app_desc_ptr,sys_info_ptr);
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}
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}
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cvmx_coremask_barrier_sync(app_desc_ptr->core_mask);
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breakflag = sys_info_ptr->bootloader_config_flags & CVMX_BOOTINFO_CFG_FLAG_BREAK;
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/* No need to initialize bootmem, interrupts, interrupt handler and error handler
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if version does not match. */
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if (cvmx_coremask_first_core(sys_info_ptr->core_mask))
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{
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/* Check to make sure the Chip version matches the configured version */
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uint32_t chip_id = cvmx_get_proc_id();
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/* Make sure we can properly run on this chip */
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octeon_model_version_check(chip_id);
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}
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cvmx_interrupt_initialize();
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if (cvmx_coremask_first_core(sys_info_ptr->core_mask))
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{
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int break_uart = 0;
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unsigned int i;
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/* Intialize the bootmem allocator with the descriptor that was provided by
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* the bootloader
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* IMPORTANT: All printfs must happen after this since PCI console uses named
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* blocks.
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*/
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cvmx_bootmem_init(sys_info_ptr->phy_mem_desc_addr);
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if (breakflag && cvmx_debug_booted())
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{
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printf("ERROR: Using debug and break together in not supported.\n");
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while (1)
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;
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}
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/* Search through the arguments for a break=X or a debug=X. */
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for (i = 0; i < app_desc_ptr->argc; i++)
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{
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const char *argv = CASTPTR(const char, CVMX_ADD_SEG32(CVMX_MIPS32_SPACE_KSEG0, app_desc_ptr->argv[i]));
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if (strncmp(argv, "break=", 6) == 0)
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break_uart = atoi(argv + 6);
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else if (strncmp(argv, "debug=", 6) == 0)
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cvmx_debug_uart = atoi(argv + 6);
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}
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if (breakflag)
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{
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int32_t *trampoline = CASTPTR(int32_t, CVMX_ADD_SEG32(CVMX_MIPS32_SPACE_KSEG0, BOOTLOADER_DEBUG_TRAMPOLINE));
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/* On debug exception, call exit_on_break from all cores. */
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*trampoline = (int32_t)(long)&exit_on_break;
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cvmx_uart_enable_intr(break_uart, process_break_interrupt);
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}
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}
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cvmx_coremask_barrier_sync(app_desc_ptr->core_mask);
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/* Clear BEV now that we have installed exception handlers. */
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uint64_t tmp;
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asm volatile (
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" .set push \n"
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" .set mips64 \n"
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" .set noreorder \n"
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" .set noat \n"
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" mfc0 %[tmp], $12, 0 \n"
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" li $at, 1 << 22 \n"
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" not $at, $at \n"
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" and %[tmp], $at \n"
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" mtc0 %[tmp], $12, 0 \n"
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" .set pop \n"
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: [tmp] "=&r" (tmp) : );
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/* Set all cores to stop on MCD0 signals */
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asm volatile(
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"dmfc0 %0, $22, 0\n"
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"or %0, %0, 0x1100\n"
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"dmtc0 %0, $22, 0\n" : "=r" (tmp));
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CVMX_SYNC;
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/* Now intialize the debug exception handler as BEV is cleared. */
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if (!breakflag)
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cvmx_debug_init();
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/* Synchronise all cores at this point */
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cvmx_coremask_barrier_sync(app_desc_ptr->core_mask);
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}
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int cvmx_user_app_init(void)
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{
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uint64_t bist_val;
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uint64_t mask;
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int bist_errors = 0;
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uint64_t tmp;
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uint64_t base_addr;
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/* Put message on LED display */
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if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM)
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ebt3000_str_write("CVMX ");
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/* Check BIST results for COP0 registers, some values only meaningful in pass 2 */
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CVMX_MF_CACHE_ERR(bist_val);
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mask = (1ULL<<32) | (1ULL<<33) | (1ULL<<34) | (1ULL<<35) | (1ULL<<36);
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bist_val &= mask;
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if (bist_val)
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{
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printf("BIST FAILURE: COP0_CACHE_ERR: 0x%llx\n", (unsigned long long)bist_val);
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bist_errors++;
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}
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mask = 0xfc00000000000000ull;
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CVMX_MF_CVM_MEM_CTL(bist_val);
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bist_val &= mask;
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if (bist_val)
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{
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printf("BIST FAILURE: COP0_CVM_MEM_CTL: 0x%llx\n", (unsigned long long)bist_val);
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bist_errors++;
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}
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/* Set up 4 cache lines of local memory, make available from Kernel space */
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CVMX_MF_CVM_MEM_CTL(tmp);
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tmp &= ~0x1ffull;
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tmp |= 0x104ull;
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/* Set WBTHRESH=4 as per Core-14752 errata in cn63xxp1.X. */
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if (OCTEON_IS_MODEL(OCTEON_CN63XX_PASS1_X))
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{
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tmp &= ~(0xfull << 11);
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tmp |= 4 << 11;
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}
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CVMX_MT_CVM_MEM_CTL(tmp);
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#if CVMX_USE_1_TO_1_TLB_MAPPINGS
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/* Check to see if the bootloader is indicating that the application is outside
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** of the 0x10000000 0x20000000 range, in which case we can't use 1-1 mappings */
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if (cvmx_sysinfo_get()->bootloader_config_flags & CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING)
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{
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printf("ERROR: 1-1 TLB mappings configured and oversize application loaded.\n");
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printf("ERROR: Either 1-1 TLB mappings must be disabled or application size reduced.\n");
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|
exit(-1);
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|
}
|
|
|
|
/* Create 1-1 Mappings for all DRAM up to 8 gigs, excluding the low 1 Megabyte. This area
|
|
** is reserved for the bootloader and exception vectors. By not mapping this area, NULL pointer
|
|
** dereferences will be caught with TLB exceptions. Exception handlers should be written
|
|
** using XKPHYS or KSEG0 addresses. */
|
|
#if CVMX_NULL_POINTER_PROTECT
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|
/* Exclude low 1 MByte from mapping to detect NULL pointer accesses.
|
|
** The only down side of this is it uses more TLB mappings */
|
|
cvmx_core_add_fixed_tlb_mapping_bits(0x0, 0x0, 0x100000 | TLB_DIRTY | TLB_VALID | TLB_GLOBAL, CVMX_TLB_PAGEMASK_1M);
|
|
cvmx_core_add_fixed_tlb_mapping(0x200000, 0x200000, 0x300000, CVMX_TLB_PAGEMASK_1M);
|
|
cvmx_core_add_fixed_tlb_mapping(0x400000, 0x400000, 0x500000, CVMX_TLB_PAGEMASK_1M);
|
|
cvmx_core_add_fixed_tlb_mapping(0x600000, 0x600000, 0x700000, CVMX_TLB_PAGEMASK_1M);
|
|
|
|
cvmx_core_add_fixed_tlb_mapping(0x800000, 0x800000, 0xC00000, CVMX_TLB_PAGEMASK_4M);
|
|
cvmx_core_add_fixed_tlb_mapping(0x1000000, 0x1000000, 0x1400000, CVMX_TLB_PAGEMASK_4M);
|
|
cvmx_core_add_fixed_tlb_mapping(0x1800000, 0x1800000, 0x1c00000, CVMX_TLB_PAGEMASK_4M);
|
|
|
|
cvmx_core_add_fixed_tlb_mapping(0x2000000, 0x2000000, 0x3000000, CVMX_TLB_PAGEMASK_16M);
|
|
cvmx_core_add_fixed_tlb_mapping(0x4000000, 0x4000000, 0x5000000, CVMX_TLB_PAGEMASK_16M);
|
|
cvmx_core_add_fixed_tlb_mapping(0x6000000, 0x6000000, 0x7000000, CVMX_TLB_PAGEMASK_16M);
|
|
#else
|
|
/* Map entire low 128 Megs, including 0x0 */
|
|
cvmx_core_add_fixed_tlb_mapping(0x0, 0x0, 0x4000000ULL, CVMX_TLB_PAGEMASK_64M);
|
|
#endif
|
|
cvmx_core_add_fixed_tlb_mapping(0x8000000ULL, 0x8000000ULL, 0xc000000ULL, CVMX_TLB_PAGEMASK_64M);
|
|
|
|
if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
|
|
{
|
|
for (base_addr = 0x20000000ULL; base_addr < (cvmx_sysinfo_get()->system_dram_size + 0x10000000ULL); base_addr += 0x20000000ULL)
|
|
{
|
|
if (0 > cvmx_core_add_fixed_tlb_mapping(base_addr, base_addr, base_addr + 0x10000000ULL, CVMX_TLB_PAGEMASK_256M))
|
|
{
|
|
printf("ERROR adding 1-1 TLB mapping for address 0x%llx\n", (unsigned long long)base_addr);
|
|
/* Exit from here, as expected memory mappings aren't set
|
|
up if this fails */
|
|
exit(-1);
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Create 1-1 mapping for next 256 megs
|
|
** bottom page is not valid */
|
|
cvmx_core_add_fixed_tlb_mapping_bits(0x400000000ULL, 0, 0x410000000ULL | TLB_DIRTY | TLB_VALID | TLB_GLOBAL, CVMX_TLB_PAGEMASK_256M);
|
|
|
|
/* Map from 0.5 up to the installed memory size in 512 MByte chunks. If this loop runs out of memory,
|
|
** the NULL pointer detection can be disabled to free up more TLB entries. */
|
|
if (cvmx_sysinfo_get()->system_dram_size > 0x20000000ULL)
|
|
{
|
|
for (base_addr = 0x20000000ULL; base_addr <= (cvmx_sysinfo_get()->system_dram_size - 0x20000000ULL); base_addr += 0x20000000ULL)
|
|
{
|
|
if (0 > cvmx_core_add_fixed_tlb_mapping(base_addr, base_addr, base_addr + 0x10000000ULL, CVMX_TLB_PAGEMASK_256M))
|
|
{
|
|
printf("ERROR adding 1-1 TLB mapping for address 0x%llx\n", (unsigned long long)base_addr);
|
|
/* Exit from here, as expected memory mappings
|
|
aren't set up if this fails */
|
|
exit(-1);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
|
|
cvmx_sysinfo_t *sys_info_ptr = cvmx_sysinfo_get();
|
|
cvmx_bootmem_init(sys_info_ptr->phy_mem_desc_addr);
|
|
|
|
return(0);
|
|
}
|
|
|
|
void __cvmx_app_exit(void)
|
|
{
|
|
cvmx_debug_finish();
|
|
|
|
if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
|
|
{
|
|
CVMX_BREAK;
|
|
}
|
|
/* Hang forever, until more appropriate stand alone simple executive
|
|
exit() is implemented */
|
|
|
|
while (1);
|
|
}
|
|
|
|
|
|
|