141 lines
5.1 KiB
C
141 lines
5.1 KiB
C
/* $FreeBSD$ */
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/* $NecBSD: if_snreg.h,v 1.3 1999/01/24 01:39:52 kmatsuda Exp $ */
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/* $NetBSD$ */
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/*-
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* Copyright (c) 1997, 1998, 1999
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* Kouichi Matsuda. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Kouichi Matsuda for
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* NetBSD/pc98.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Modified for NetBSD/pc98 1.2.1 from NetBSD/mac68k 1.2D by Kouichi Matsuda.
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* Make adapted for NEC PC-9801-83, 84, PC-9801-103, 104, PC-9801N-25 and
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* PC-9801N-J02R, which uses National Semiconductor DP83934AVQB as
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* Ethernet Controller and National Semiconductor NS46C46 as (64 * 16 bits)
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* Microwire Serial EEPROM.
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*/
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/*
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* XXX: Should not be HERE. (Should be shared with...)
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*/
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/*
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* NEC/SONIC port mappings, offset from iobase.
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*/
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#define SNEC_CTRL 0 /* SONIC control port (word) */
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#define SNEC_CTRLB 1 /* NEC/SONIC control port (byte) */
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#define SNEC_RSVD0 2 /* not used */
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#define SNEC_ADDR 3 /* SONIC, NEC/SONIC register address set port */
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#define SNEC_RSVD1 4 /* not used */
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#define SNEC_RSVD2 5 /* not used */
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#define SNEC_NREGS 6
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/* bank memory size */
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#define SNEC_NMEMS (NBPG * 2)
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/* how many bank */
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#define SNEC_NBANK 0x10
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/* internal buffer size */
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#define SNEC_NBUF (SNEC_NMEMS * SNEC_NBANK)
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/*
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* NEC/SONIC specific internal registers.
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*/
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/*
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* Memory Bank Select Register (MEMBS)
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*/
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#define SNECR_MEMBS 0x80
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#define SNECR_MEMBS_BSEN 0x01 /* enable memory bank select */
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#define SNECR_MEMBS_EBNMSK 0x1c /* encoded bank select number */
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/* Translate bank number to encoded bank select number. */
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#define SNECR_MEMBS_B2EB(bank) (bank << 2)
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#define SNECR_MEMBS_PCMCIABUS 0x80 /* bus type identification */
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/*
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* Memory Base Address Select Register (MEMSEL)
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*/
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#define SNECR_MEMSEL 0x82
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/* Translate base phys address to encoded select number. */
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#define SNECR_MEMSEL_PHYS2EN(maddr) ((maddr >> 13) & 0x0f)
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/*
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* Encoded Irq Select Register (IRQSEL)
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*/
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#define SNECR_IRQSEL 0x84
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/*
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* EEPROM Access Register (EEP)
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*/
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#define SNECR_EEP 0x86
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#define SNECR_EEP_DI 0x10 /* EEPROM Serial Data Input (high) */
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#define SNECR_EEP_CS 0x20 /* EEPROM Chip Select (high) */
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#define SNECR_EEP_SK 0x40 /* EEPROM Serial Data Clock (high) */
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#define SNECR_EEP_DO 0x80 /* EEPROM Serial Data Output (high) */
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/* EEPROM data locations */
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#define SNEC_EEPROM_KEY0 6 /* Station Address Check Sum Key #1 */
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#define SNEC_EEPROM_KEY1 7 /* Station Address Check Sum Key #2 */
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#define SNEC_EEPROM_SA0 8 /* Station Address #1 */
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#define SNEC_EEPROM_SA1 9 /* Station Address #2 */
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#define SNEC_EEPROM_SA2 10 /* Station Address #3 */
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#define SNEC_EEPROM_SA3 11 /* Station Address #4 */
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#define SNEC_EEPROM_SA4 12 /* Station Address #5 */
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#define SNEC_EEPROM_SA5 13 /* Station Address #6 */
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#define SNEC_EEPROM_CKSUM 14 /* Station Address Check Sum */
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#define SNEC_EEPROM_SIZE 32 /* valid EEPROM data (max 128 bytes) */
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/*
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* Bus and Mode Identification Register (IDENT)
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*/
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#define SNECR_IDENT 0x88
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/* Bit 0: Bus Identification. */
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#define SNECR_IDENT_CBUS 0x01 /* on PC-98 C-Bus */
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#define SNECR_IDENT_PCMCIABUS 0x00 /* on PCMCIA Bus */
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/* Bit 2: always 1 */
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#define SNECR_IDENT_MAGIC 0x04
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/* Bit 4: Bus Configuration Mode Identification. */
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#define SNECR_IDENT_PNP 0x10 /* Plug and Play (C-Bus and PCMCIA) */
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#define SNECR_IDENT_LEGACY 0x00 /* Legacy C-Bus */
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#define SNECR_IDENT_LEGACY_CBUS \
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(SNECR_IDENT_LEGACY | SNECR_IDENT_MAGIC | SNECR_IDENT_CBUS)
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#define SNECR_IDENT_PNP_CBUS \
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(SNECR_IDENT_PNP | SNECR_IDENT_MAGIC | SNECR_IDENT_CBUS)
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#define SNECR_IDENT_PNP_PCMCIABUS \
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(SNECR_IDENT_PNP | SNECR_IDENT_MAGIC | SNECR_IDENT_PCMCIABUS)
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/*
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* XXX: parent bus type aliases
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*/
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#define SNEC_TYPE_LEGACY 0
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#define SNEC_TYPE_PNP 1
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