4ad7e9b01a
SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
280 lines
7.3 KiB
C
280 lines
7.3 KiB
C
/*-
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* Copyright (c) 2015 Landon Fuller <landon@landonf.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/bhnd/bhndvar.h>
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#include "bcmavar.h"
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/**
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* Allocate and initialize new core config structure.
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*
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* @param core_index Core index on the bus.
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* @param core_unit Core unit number.
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* @param vendor Core designer.
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* @param device Core identifier (e.g. part number).
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* @param hwrev Core revision.
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*/
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struct bcma_corecfg *
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bcma_alloc_corecfg(u_int core_index, int core_unit, uint16_t vendor,
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uint16_t device, uint8_t hwrev)
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{
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struct bcma_corecfg *cfg;
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cfg = malloc(sizeof(*cfg), M_BHND, M_NOWAIT);
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if (cfg == NULL)
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return NULL;
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cfg->core_info = (struct bhnd_core_info) {
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.vendor = vendor,
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.device = device,
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.hwrev = hwrev,
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.core_idx = core_index,
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.unit = core_unit
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};
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STAILQ_INIT(&cfg->master_ports);
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cfg->num_master_ports = 0;
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STAILQ_INIT(&cfg->dev_ports);
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cfg->num_dev_ports = 0;
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STAILQ_INIT(&cfg->bridge_ports);
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cfg->num_bridge_ports = 0;
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STAILQ_INIT(&cfg->wrapper_ports);
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cfg->num_wrapper_ports = 0;
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return (cfg);
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}
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/**
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* Deallocate the given core config and any associated resources.
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*
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* @param corecfg Core info to be deallocated.
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*/
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void
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bcma_free_corecfg(struct bcma_corecfg *corecfg)
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{
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struct bcma_mport *mport, *mnext;
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struct bcma_sport *sport, *snext;
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STAILQ_FOREACH_SAFE(mport, &corecfg->master_ports, mp_link, mnext) {
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free(mport, M_BHND);
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}
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STAILQ_FOREACH_SAFE(sport, &corecfg->dev_ports, sp_link, snext) {
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bcma_free_sport(sport);
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}
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STAILQ_FOREACH_SAFE(sport, &corecfg->bridge_ports, sp_link, snext) {
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bcma_free_sport(sport);
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}
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STAILQ_FOREACH_SAFE(sport, &corecfg->wrapper_ports, sp_link, snext) {
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bcma_free_sport(sport);
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}
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free(corecfg, M_BHND);
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}
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/**
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* Return the @p cfg port list for @p type.
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*
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* @param cfg The core configuration.
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* @param type The requested port type.
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*/
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struct bcma_sport_list *
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bcma_corecfg_get_port_list(struct bcma_corecfg *cfg, bhnd_port_type type)
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{
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switch (type) {
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case BHND_PORT_DEVICE:
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return (&cfg->dev_ports);
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break;
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case BHND_PORT_BRIDGE:
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return (&cfg->bridge_ports);
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break;
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case BHND_PORT_AGENT:
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return (&cfg->wrapper_ports);
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break;
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}
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}
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/**
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* Populate the resource list and bcma_map RIDs using the maps defined on
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* @p ports.
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*
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* @param bus The requesting bus device.
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* @param dinfo The device info instance to be initialized.
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* @param ports The set of ports to be enumerated
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*/
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static void
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bcma_dinfo_init_resource_info(device_t bus, struct bcma_devinfo *dinfo,
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struct bcma_sport_list *ports)
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{
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struct bcma_map *map;
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struct bcma_sport *port;
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bhnd_addr_t end;
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STAILQ_FOREACH(port, ports, sp_link) {
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STAILQ_FOREACH(map, &port->sp_maps, m_link) {
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/*
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* Create the corresponding device resource list entry.
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*
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* We necessarily skip registration if the region's
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* device memory range is not representable via
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* rman_res_t.
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*
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* When rman_res_t is migrated to uintmax_t, any
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* range should be representable.
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*/
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end = map->m_base + map->m_size;
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if (map->m_base <= RM_MAX_END && end <= RM_MAX_END) {
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map->m_rid = resource_list_add_next(
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&dinfo->resources, SYS_RES_MEMORY,
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map->m_base, end, map->m_size);
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} else if (bootverbose) {
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device_printf(bus,
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"core%u %s%u.%u: region %llx-%llx extends "
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"beyond supported addressable range\n",
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dinfo->corecfg->core_info.core_idx,
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bhnd_port_type_name(port->sp_type),
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port->sp_num, map->m_region_num,
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(unsigned long long) map->m_base,
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(unsigned long long) end);
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}
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}
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}
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}
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/**
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* Allocate and initialize new device info structure, assuming ownership
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* of the provided core configuration.
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*
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* @param bus The requesting bus device.
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* @param corecfg Device core configuration.
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*/
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struct bcma_devinfo *
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bcma_alloc_dinfo(device_t bus, struct bcma_corecfg *corecfg)
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{
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struct bcma_devinfo *dinfo;
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dinfo = malloc(sizeof(struct bcma_devinfo), M_BHND, M_NOWAIT);
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if (dinfo == NULL)
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return NULL;
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dinfo->corecfg = corecfg;
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dinfo->res_agent = NULL;
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dinfo->rid_agent = -1;
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resource_list_init(&dinfo->resources);
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/* The device ports must always be initialized first to ensure that
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* rid 0 maps to the first device port */
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bcma_dinfo_init_resource_info(bus, dinfo, &corecfg->dev_ports);
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bcma_dinfo_init_resource_info(bus, dinfo, &corecfg->bridge_ports);
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bcma_dinfo_init_resource_info(bus, dinfo, &corecfg->wrapper_ports);
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return dinfo;
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}
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/**
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* Deallocate the given device info structure and any associated resources.
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*
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* @param bus The requesting bus device.
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* @param dinfo Device info to be deallocated.
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*/
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void
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bcma_free_dinfo(device_t bus, struct bcma_devinfo *dinfo)
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{
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bcma_free_corecfg(dinfo->corecfg);
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resource_list_free(&dinfo->resources);
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/* Release agent resource, if any */
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if (dinfo->res_agent != NULL) {
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bhnd_release_resource(bus, SYS_RES_MEMORY, dinfo->rid_agent,
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dinfo->res_agent);
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}
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free(dinfo, M_BHND);
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}
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/**
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* Allocate and initialize new slave port descriptor.
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*
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* @param port_num Per-core port number.
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* @param port_type Port type.
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*/
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struct bcma_sport *
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bcma_alloc_sport(bcma_pid_t port_num, bhnd_port_type port_type)
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{
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struct bcma_sport *sport;
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sport = malloc(sizeof(struct bcma_sport), M_BHND, M_NOWAIT);
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if (sport == NULL)
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return NULL;
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sport->sp_num = port_num;
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sport->sp_type = port_type;
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sport->sp_num_maps = 0;
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STAILQ_INIT(&sport->sp_maps);
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return sport;
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}
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/**
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* Deallocate all resources associated with the given port descriptor.
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*
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* @param sport Port descriptor to be deallocated.
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*/
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void
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bcma_free_sport(struct bcma_sport *sport) {
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struct bcma_map *map, *mapnext;
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STAILQ_FOREACH_SAFE(map, &sport->sp_maps, m_link, mapnext) {
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free(map, M_BHND);
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}
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free(sport, M_BHND);
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}
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