b74b6b0a82
This revision adds the following to the Mediatek/Ralink support: - initial support for "clocks" FDT property, currently based on fdt_clock - initial support for "resets" FDT property, currently based on the fdt_reset interface from D5826 - initial support for "pinctrl,bits" functionality via FDT. May be extended in the future to cover a better and fuller pinctrl implementation Approved by: adrian (mentor) Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D5827
157 lines
3.8 KiB
C
157 lines
3.8 KiB
C
/*-
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* Copyright (c) 2016 Stanislav Galabov
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/module.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/fdt/fdt_clock.h>
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#include <mips/mediatek/mtk_sysctl.h>
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#include "fdt_clock_if.h"
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static const struct ofw_compat_data compat_data[] = {
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{ "ralink,rt2880-clock", 1 },
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/* Sentinel */
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{ NULL, 0 }
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};
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static int
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mtk_clock_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "MTK Clock Controller");
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return (0);
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}
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static int
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mtk_clock_attach(device_t dev)
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{
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if (device_get_unit(dev) != 0) {
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device_printf(dev, "Only one clock control allowed\n");
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return (ENXIO);
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}
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fdt_clock_register_provider(dev);
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return (0);
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}
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#define CLOCK_ENABLE 1
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#define CLOCK_DISABLE 0
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static int
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mtk_clock_set(device_t dev, int index, int value)
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{
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uint32_t mask;
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/* Clock config register holds 32 clock gating bits */
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if (index < 0 || index > 31)
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return (EINVAL);
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mask = (1u << index);
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if (value == CLOCK_ENABLE)
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mtk_sysctl_clr_set(SYSCTL_CLKCFG1, 0, mask);
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else
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mtk_sysctl_clr_set(SYSCTL_CLKCFG1, mask, 0);
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return (0);
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}
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static int
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mtk_clock_enable(device_t dev, int index)
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{
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return mtk_clock_set(dev, index, CLOCK_ENABLE);
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}
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static int
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mtk_clock_disable(device_t dev, int index)
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{
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return mtk_clock_set(dev, index, CLOCK_DISABLE);
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}
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static int
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mtk_clock_get_info(device_t dev, int index, struct fdt_clock_info *info)
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{
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uint32_t mask;
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if (index < 0 || index > 31 || info == NULL)
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return (EINVAL);
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if (mtk_sysctl_get(SYSCTL_CLKCFG1) & mask)
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info->flags = FDT_CIFLAG_RUNNING;
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else
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info->flags = 0;
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return (0);
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}
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static device_method_t mtk_clock_methods[] = {
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DEVMETHOD(device_probe, mtk_clock_probe),
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DEVMETHOD(device_attach, mtk_clock_attach),
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/* fdt_clock interface */
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DEVMETHOD(fdt_clock_enable, mtk_clock_enable),
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DEVMETHOD(fdt_clock_disable, mtk_clock_disable),
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DEVMETHOD(fdt_clock_get_info, mtk_clock_get_info),
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DEVMETHOD_END
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};
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static driver_t mtk_clock_driver = {
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"clkctrl",
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mtk_clock_methods,
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0,
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};
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static devclass_t mtk_clock_devclass;
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EARLY_DRIVER_MODULE(mtk_clock, simplebus, mtk_clock_driver, mtk_clock_devclass,
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0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY);
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MODULE_DEPEND(mtk_clock, mtk_sysctl, 1, 1, 1);
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