Dimitry Andric 4e117af10c Fix "Bad machine code" when building world for mips or mips64
Merge commit f5755c0849a5 from llvm git (by Jessica Clarke):

  [Mips] Add glue between CopyFromReg, CopyToReg and RDHWR nodes for TLS

  The MIPS ABI requires the thread pointer be accessed via rdhwr $3, $r29.
  This is currently represented by (CopyToReg $3, (RDHWR $29)) followed by
  a (CopyFromReg $3). However, there is no glue between these, meaning
  scheduling can break those apart. In particular, PR51691 is a report
  where PseudoSELECT_I was moved to between the CopyToReg and CopyFromReg,
  and since its expansion uses branches, it split the def and use of the
  physical register between two basic blocks, resulting in the def being
  eliminated and the use having no def. It also seems possible that a
  similar situation could arise splitting up the CopyToReg from the RDHWR,
  causing the RDHWR to use a destination register other than $3, violating
  the ABI requirement.

  Thus, add glue between all three nodes to ensure they aren't split up
  during instruction selection. No regression test is added since any test
  would be implictly relying on specific scheduling behaviour, so whilst
  it might be testing that glue is preventing reordering today, changes to
  scheduling behaviour could result in the test no longer being able to
  catch a regression here, as the reordering might no longer happen for
  other unrelated reasons.

  Fixes PR51691.

  Reviewed By: atanasyan, dim

  Differential Revision: https://reviews.llvm.org/D111967
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