246 lines
8.7 KiB
C
246 lines
8.7 KiB
C
/* $FreeBSD$ */
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/*-
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* Copyright (c) 2006 ATMEL
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* Copyright (c) 2007 Hans Petter Selasky <hselasky@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* USB Device Port (UDP) register definition, based on
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* "AT91RM9200.h" provided by ATMEL.
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*/
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#ifndef _AT9100_DCI_H_
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#define _AT9100_DCI_H_
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#define AT91_MAX_DEVICES (USB_MIN_DEVICES + 1)
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#define AT91_UDP_FRM 0x00 /* Frame number register */
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#define AT91_UDP_FRM_MASK (0x7FF << 0) /* Frame Number as Defined in
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* the Packet Field Formats */
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#define AT91_UDP_FRM_ERR (0x1 << 16) /* Frame Error */
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#define AT91_UDP_FRM_OK (0x1 << 17) /* Frame OK */
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#define AT91_UDP_GSTATE 0x04 /* Global state register */
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#define AT91_UDP_GSTATE_ADDR (0x1 << 0) /* Addressed state */
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#define AT91_UDP_GSTATE_CONFG (0x1 << 1) /* Configured */
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#define AT91_UDP_GSTATE_ESR (0x1 << 2) /* Enable Send Resume */
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#define AT91_UDP_GSTATE_RSM (0x1 << 3) /* A Resume Has Been Sent to
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* the Host */
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#define AT91_UDP_GSTATE_RMW (0x1 << 4) /* Remote Wake Up Enable */
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#define AT91_UDP_FADDR 0x08 /* Function Address Register */
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#define AT91_UDP_FADDR_MASK (0x7F << 0)/* Function Address Mask */
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#define AT91_UDP_FADDR_EN (0x1 << 8)/* Function Enable */
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#define AT91_UDP_RES0 0x0C /* Reserved 0 */
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#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */
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#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */
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#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */
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#define AT91_UDP_ISR 0x1C /* Interrupt Status Register */
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#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */
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#define AT91_UDP_INT_EP(n) (0x1 <<(n))/* Endpoint "n" Interrupt */
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#define AT91_UDP_INT_RXSUSP (0x1 << 8)/* USB Suspend Interrupt */
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#define AT91_UDP_INT_RXRSM (0x1 << 9)/* USB Resume Interrupt */
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#define AT91_UDP_INT_EXTRSM (0x1 << 10)/* USB External Resume Interrupt */
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#define AT91_UDP_INT_SOFINT (0x1 << 11)/* USB Start Of frame Interrupt */
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#define AT91_UDP_INT_END_BR (0x1 << 12)/* USB End Of Bus Reset Interrupt */
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#define AT91_UDP_INT_WAKEUP (0x1 << 13)/* USB Resume Interrupt */
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#define AT91_UDP_INT_BUS \
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(AT91_UDP_INT_RXSUSP|AT91_UDP_INT_RXRSM| \
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AT91_UDP_INT_END_BR)
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#define AT91_UDP_INT_EPS \
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(AT91_UDP_INT_EP(0)|AT91_UDP_INT_EP(1)| \
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AT91_UDP_INT_EP(2)|AT91_UDP_INT_EP(3)| \
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AT91_UDP_INT_EP(4)|AT91_UDP_INT_EP(5))
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#define AT91_UDP_INT_DEFAULT \
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(AT91_UDP_INT_EPS|AT91_UDP_INT_BUS)
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#define AT91_UDP_RES1 0x24 /* Reserved 1 */
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#define AT91_UDP_RST 0x28 /* Reset Endpoint Register */
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#define AT91_UDP_RST_EP(n) (0x1 << (n))/* Reset Endpoint "n" */
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#define AT91_UDP_RES2 0x2C /* Reserved 2 */
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#define AT91_UDP_CSR(n) (0x30 + (4*(n)))/* Endpoint Control and Status
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* Register */
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#define AT91_UDP_CSR_TXCOMP (0x1 << 0) /* Generates an IN packet with data
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* previously written in the DPR */
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#define AT91_UDP_CSR_RX_DATA_BK0 (0x1 << 1) /* Receive Data Bank 0 */
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#define AT91_UDP_CSR_RXSETUP (0x1 << 2) /* Sends STALL to the Host
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* (Control endpoints) */
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#define AT91_UDP_CSR_ISOERROR (0x1 << 3) /* Isochronous error
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* (Isochronous endpoints) */
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#define AT91_UDP_CSR_STALLSENT (0x1 << 3) /* Stall sent (Control, bulk,
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* interrupt endpoints) */
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#define AT91_UDP_CSR_TXPKTRDY (0x1 << 4) /* Transmit Packet Ready */
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#define AT91_UDP_CSR_FORCESTALL (0x1 << 5) /* Force Stall (used by
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* Control, Bulk and
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* Isochronous endpoints). */
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#define AT91_UDP_CSR_RX_DATA_BK1 (0x1 << 6) /* Receive Data Bank 1 (only
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* used by endpoints with
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* ping-pong attributes). */
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#define AT91_UDP_CSR_DIR (0x1 << 7) /* Transfer Direction */
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#define AT91_UDP_CSR_ET_MASK (0x7 << 8) /* Endpoint transfer type mask */
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#define AT91_UDP_CSR_ET_CTRL (0x0 << 8) /* Control IN+OUT */
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#define AT91_UDP_CSR_ET_ISO (0x1 << 8) /* Isochronous */
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#define AT91_UDP_CSR_ET_BULK (0x2 << 8) /* Bulk */
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#define AT91_UDP_CSR_ET_INT (0x3 << 8) /* Interrupt */
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#define AT91_UDP_CSR_ET_DIR_OUT (0x0 << 8) /* OUT tokens */
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#define AT91_UDP_CSR_ET_DIR_IN (0x4 << 8) /* IN tokens */
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#define AT91_UDP_CSR_DTGLE (0x1 << 11) /* Data Toggle */
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#define AT91_UDP_CSR_EPEDS (0x1 << 15) /* Endpoint Enable Disable */
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#define AT91_UDP_CSR_RXBYTECNT (0x7FF << 16) /* Number Of Bytes Available
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* in the FIFO */
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#define AT91_UDP_FDR(n) (0x50 + (4*(n)))/* Endpoint FIFO Data Register */
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#define AT91_UDP_RES3 0x70 /* Reserved 3 */
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#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */
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#define AT91_UDP_TXVC_DIS (0x1 << 8)
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#define AT91_UDP_EP_MAX 6 /* maximum number of endpoints
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* supported */
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#define AT91_UDP_READ_4(sc, reg) \
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bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
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#define AT91_UDP_WRITE_4(sc, reg, data) \
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bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
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struct at91dci_td;
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typedef uint8_t (at91dci_cmd_t)(struct at91dci_td *td);
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struct at91dci_td {
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bus_space_tag_t io_tag;
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bus_space_handle_t io_hdl;
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struct at91dci_td *obj_next;
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at91dci_cmd_t *func;
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struct usb2_page_cache *pc;
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uint32_t offset;
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uint32_t remainder;
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uint16_t max_packet_size;
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uint8_t status_reg;
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uint8_t fifo_reg;
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uint8_t fifo_bank:1;
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uint8_t error:1;
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uint8_t alt_next:1;
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uint8_t short_pkt:1;
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uint8_t support_multi_buffer:1;
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uint8_t did_stall:1;
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};
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struct at91dci_std_temp {
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at91dci_cmd_t *func;
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struct usb2_page_cache *pc;
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struct at91dci_td *td;
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struct at91dci_td *td_next;
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uint32_t len;
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uint32_t offset;
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uint16_t max_frame_size;
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uint8_t short_pkt;
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/*
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* short_pkt = 0: transfer should be short terminated
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* short_pkt = 1: transfer should not be short terminated
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*/
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uint8_t setup_alt_next;
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};
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struct at91dci_config_desc {
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struct usb2_config_descriptor confd;
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struct usb2_interface_descriptor ifcd;
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struct usb2_endpoint_descriptor endpd;
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} __packed;
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union at91dci_hub_temp {
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uWord wValue;
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struct usb2_port_status ps;
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};
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struct at91dci_ep_flags {
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uint8_t fifo_bank:1; /* hardware specific */
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};
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struct at91dci_flags {
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uint8_t change_connect:1;
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uint8_t change_suspend:1;
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uint8_t status_suspend:1; /* set if suspended */
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uint8_t status_vbus:1; /* set if present */
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uint8_t status_bus_reset:1; /* set if reset complete */
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uint8_t remote_wakeup:1;
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uint8_t self_powered:1;
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uint8_t clocks_off:1;
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uint8_t port_powered:1;
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uint8_t port_enabled:1;
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uint8_t d_pulled_up:1;
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};
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struct at91dci_softc {
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struct usb2_bus sc_bus;
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union at91dci_hub_temp sc_hub_temp;
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LIST_HEAD(, usb2_xfer) sc_interrupt_list_head;
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struct usb2_sw_transfer sc_root_ctrl;
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struct usb2_sw_transfer sc_root_intr;
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struct usb2_device *sc_devices[AT91_MAX_DEVICES];
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struct resource *sc_io_res;
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struct resource *sc_irq_res;
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void *sc_intr_hdl;
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bus_size_t sc_io_size;
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bus_space_tag_t sc_io_tag;
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bus_space_handle_t sc_io_hdl;
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void (*sc_clocks_on) (void *arg);
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void (*sc_clocks_off) (void *arg);
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void *sc_clocks_arg;
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void (*sc_pull_up) (void *arg);
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void (*sc_pull_down) (void *arg);
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void *sc_pull_arg;
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uint8_t sc_rt_addr; /* root HUB address */
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uint8_t sc_dv_addr; /* device address */
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uint8_t sc_conf; /* root HUB config */
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uint8_t sc_hub_idata[1];
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struct at91dci_flags sc_flags;
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struct at91dci_ep_flags sc_ep_flags[AT91_UDP_EP_MAX];
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};
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/* prototypes */
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usb2_error_t at91dci_init(struct at91dci_softc *sc);
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void at91dci_uninit(struct at91dci_softc *sc);
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void at91dci_suspend(struct at91dci_softc *sc);
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void at91dci_resume(struct at91dci_softc *sc);
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void at91dci_interrupt(struct at91dci_softc *sc);
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void at91dci_vbus_interrupt(struct at91dci_softc *sc, uint8_t is_on);
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#endif /* _AT9100_DCI_H_ */
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