Martin Blapp e808cf6260 When reading PHY regs over the i2c bus, the turnaround ACK bit ... is read one clock edge too late. This bit is driven low by slave (as any other input data bits from slave) when the clock is LOW. The current code did read the bit after the clock was driven high again. Reviewed by: luoqi MFC after: 2 weeks		2003-01-10 08:09:58 +00:00
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if_xe_pccard.c	network interface driver changes:	2002-11-14 23:54:55 +00:00
if_xe.c	When reading PHY regs over the i2c bus, the turnaround ACK bit	2003-01-10 08:09:58 +00:00
if_xereg.h
if_xevar.h