e6c8bc291a
LPC devices. Among other things, the LPC serial ports now appear as ACPI devices. - Move the info for the top-level PCI bus into the PCI emulation code and add ResourceProducer entries for the memory ranges decoded by the bus for memory BARs. - Add a framework to allow each PCI emulation driver to optionally write an entry into the DSDT under the \_SB_.PCI0 namespace. The LPC driver uses this to write a node for the LPC bus (\_SB_.PCI0.ISA). - Add a linker set to allow any LPC devices to write entries into the DSDT below the LPC node. - Move the existing DSDT block for the RTC to the RTC driver. - Add DSDT nodes for the AT PIC, the 8254 ISA timer, and the LPC UART devices. - Add a "SuperIO" device under the LPC node to claim "system resources" aling with a linker set to allow various drivers to add IO or memory ranges that should be claimed as a system resource. - Add system resource entries for the extended RTC IO range, the registers used for ACPI power management, the ELCR, PCI interrupt routing register, and post data register. - Add various helper routines for generating DSDT entries. Reviewed by: neel (earlier version)
384 lines
8.8 KiB
C
384 lines
8.8 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/time.h>
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#include <stdio.h>
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#include <string.h>
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#include <time.h>
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#include <assert.h>
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#include <machine/vmm.h>
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#include <vmmapi.h>
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#include "acpi.h"
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#include "inout.h"
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#include "pci_lpc.h"
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#include "rtc.h"
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#define IO_RTC 0x70
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#define RTC_SEC 0x00 /* seconds */
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#define RTC_SEC_ALARM 0x01
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#define RTC_MIN 0x02
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#define RTC_MIN_ALARM 0x03
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#define RTC_HRS 0x04
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#define RTC_HRS_ALARM 0x05
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#define RTC_WDAY 0x06
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#define RTC_DAY 0x07
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#define RTC_MONTH 0x08
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#define RTC_YEAR 0x09
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#define RTC_CENTURY 0x32 /* current century */
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#define RTC_STATUSA 0xA
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#define RTCSA_TUP 0x80 /* time update, don't look now */
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#define RTC_STATUSB 0xB
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#define RTCSB_DST 0x01
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#define RTCSB_24HR 0x02
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#define RTCSB_BIN 0x04 /* 0 = BCD, 1 = Binary */
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#define RTCSB_PINTR 0x40 /* 1 = enable periodic clock interrupt */
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#define RTCSB_HALT 0x80 /* stop clock updates */
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#define RTC_INTR 0x0c /* status register C (R) interrupt source */
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#define RTC_STATUSD 0x0d /* status register D (R) Lost Power */
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#define RTCSD_PWR 0x80 /* clock power OK */
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#define RTC_NVRAM_START 0x0e
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#define RTC_NVRAM_END 0x7f
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#define RTC_NVRAM_SZ (128 - RTC_NVRAM_START)
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#define nvoff(x) ((x) - RTC_NVRAM_START)
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#define RTC_DIAG 0x0e
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#define RTC_RSTCODE 0x0f
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#define RTC_EQUIPMENT 0x14
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#define RTC_LMEM_LSB 0x34
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#define RTC_LMEM_MSB 0x35
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#define RTC_HMEM_LSB 0x5b
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#define RTC_HMEM_SB 0x5c
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#define RTC_HMEM_MSB 0x5d
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#define m_64KB (64*1024)
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#define m_16MB (16*1024*1024)
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#define m_4GB (4ULL*1024*1024*1024)
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static int addr;
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static uint8_t rtc_nvram[RTC_NVRAM_SZ];
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/* XXX initialize these to default values as they would be from BIOS */
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static uint8_t status_a, status_b;
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static struct {
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uint8_t hours;
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uint8_t mins;
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uint8_t secs;
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} rtc_alarm;
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static u_char const bin2bcd_data[] = {
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
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0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19,
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0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29,
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0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
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0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
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0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59,
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0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69,
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0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79,
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0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89,
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0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99
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};
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#define bin2bcd(bin) (bin2bcd_data[bin])
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#define rtcout(val) ((status_b & RTCSB_BIN) ? (val) : bin2bcd((val)))
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static void
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timevalfix(struct timeval *t1)
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{
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if (t1->tv_usec < 0) {
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t1->tv_sec--;
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t1->tv_usec += 1000000;
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}
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if (t1->tv_usec >= 1000000) {
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t1->tv_sec++;
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t1->tv_usec -= 1000000;
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}
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}
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static void
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timevalsub(struct timeval *t1, const struct timeval *t2)
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{
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t1->tv_sec -= t2->tv_sec;
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t1->tv_usec -= t2->tv_usec;
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timevalfix(t1);
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}
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static int
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rtc_addr_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
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uint32_t *eax, void *arg)
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{
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if (bytes != 1)
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return (-1);
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if (in) {
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/* straight read of this register will return 0xFF */
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*eax = 0xff;
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return (0);
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}
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switch (*eax & 0x7f) {
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case RTC_SEC:
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case RTC_SEC_ALARM:
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case RTC_MIN:
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case RTC_MIN_ALARM:
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case RTC_HRS:
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case RTC_HRS_ALARM:
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case RTC_WDAY:
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case RTC_DAY:
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case RTC_MONTH:
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case RTC_YEAR:
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case RTC_STATUSA:
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case RTC_STATUSB:
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case RTC_INTR:
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case RTC_STATUSD:
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case RTC_NVRAM_START ... RTC_NVRAM_END:
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break;
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default:
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return (-1);
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}
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addr = *eax & 0x7f;
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return (0);
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}
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static int
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rtc_data_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
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uint32_t *eax, void *arg)
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{
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int hour;
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time_t t;
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struct timeval cur, delta;
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static struct timeval last;
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static struct tm tm;
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if (bytes != 1)
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return (-1);
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gettimeofday(&cur, NULL);
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/*
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* Increment the cached time only once per second so we can guarantee
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* that the guest has at least one second to read the hour:min:sec
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* separately and still get a coherent view of the time.
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*/
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delta = cur;
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timevalsub(&delta, &last);
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if (delta.tv_sec >= 1 && (status_b & RTCSB_HALT) == 0) {
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t = cur.tv_sec;
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localtime_r(&t, &tm);
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last = cur;
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}
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if (in) {
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switch (addr) {
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case RTC_SEC_ALARM:
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*eax = rtc_alarm.secs;
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break;
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case RTC_MIN_ALARM:
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*eax = rtc_alarm.mins;
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break;
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case RTC_HRS_ALARM:
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*eax = rtc_alarm.hours;
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break;
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case RTC_SEC:
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*eax = rtcout(tm.tm_sec);
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return (0);
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case RTC_MIN:
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*eax = rtcout(tm.tm_min);
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return (0);
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case RTC_HRS:
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if (status_b & RTCSB_24HR)
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hour = tm.tm_hour;
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else
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hour = (tm.tm_hour % 12) + 1;
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*eax = rtcout(hour);
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/*
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* If we are representing time in the 12-hour format
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* then set the MSB to indicate PM.
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*/
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if ((status_b & RTCSB_24HR) == 0 && tm.tm_hour >= 12)
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*eax |= 0x80;
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return (0);
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case RTC_WDAY:
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*eax = rtcout(tm.tm_wday + 1);
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return (0);
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case RTC_DAY:
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*eax = rtcout(tm.tm_mday);
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return (0);
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case RTC_MONTH:
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*eax = rtcout(tm.tm_mon + 1);
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return (0);
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case RTC_YEAR:
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*eax = rtcout(tm.tm_year % 100);
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return (0);
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case RTC_STATUSA:
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*eax = status_a;
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return (0);
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case RTC_STATUSB:
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*eax = status_b;
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return (0);
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case RTC_INTR:
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*eax = 0;
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return (0);
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case RTC_STATUSD:
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*eax = RTCSD_PWR;
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return (0);
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case RTC_NVRAM_START ... RTC_NVRAM_END:
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*eax = rtc_nvram[addr - RTC_NVRAM_START];
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return (0);
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default:
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return (-1);
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}
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}
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switch (addr) {
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case RTC_STATUSA:
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status_a = *eax & ~RTCSA_TUP;
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break;
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case RTC_STATUSB:
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/* XXX not implemented yet XXX */
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if (*eax & RTCSB_PINTR)
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return (-1);
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status_b = *eax;
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break;
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case RTC_STATUSD:
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/* ignore write */
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break;
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case RTC_SEC_ALARM:
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rtc_alarm.secs = *eax;
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break;
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case RTC_MIN_ALARM:
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rtc_alarm.mins = *eax;
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break;
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case RTC_HRS_ALARM:
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rtc_alarm.hours = *eax;
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break;
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case RTC_SEC:
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case RTC_MIN:
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case RTC_HRS:
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case RTC_WDAY:
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case RTC_DAY:
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case RTC_MONTH:
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case RTC_YEAR:
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/*
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* Ignore writes to the time of day registers
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*/
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break;
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case RTC_NVRAM_START ... RTC_NVRAM_END:
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rtc_nvram[addr - RTC_NVRAM_START] = *eax;
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break;
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default:
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return (-1);
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}
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return (0);
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}
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void
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rtc_init(struct vmctx *ctx)
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{
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struct timeval cur;
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struct tm tm;
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size_t himem;
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size_t lomem;
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int err;
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err = gettimeofday(&cur, NULL);
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assert(err == 0);
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(void) localtime_r(&cur.tv_sec, &tm);
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memset(rtc_nvram, 0, sizeof(rtc_nvram));
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rtc_nvram[nvoff(RTC_CENTURY)] = bin2bcd((tm.tm_year + 1900) / 100);
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/* XXX init diag/reset code/equipment/checksum ? */
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/*
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* Report guest memory size in nvram cells as required by UEFI.
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* Little-endian encoding.
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* 0x34/0x35 - 64KB chunks above 16MB, below 4GB
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* 0x5b/0x5c/0x5d - 64KB chunks above 4GB
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*/
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err = vm_get_memory_seg(ctx, 0, &lomem, NULL);
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assert(err == 0);
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lomem = (lomem - m_16MB) / m_64KB;
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rtc_nvram[nvoff(RTC_LMEM_LSB)] = lomem;
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rtc_nvram[nvoff(RTC_LMEM_MSB)] = lomem >> 8;
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if (vm_get_memory_seg(ctx, m_4GB, &himem, NULL) == 0) {
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himem /= m_64KB;
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rtc_nvram[nvoff(RTC_HMEM_LSB)] = himem;
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rtc_nvram[nvoff(RTC_HMEM_SB)] = himem >> 8;
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rtc_nvram[nvoff(RTC_HMEM_MSB)] = himem >> 16;
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}
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}
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INOUT_PORT(rtc, IO_RTC, IOPORT_F_INOUT, rtc_addr_handler);
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INOUT_PORT(rtc, IO_RTC + 1, IOPORT_F_INOUT, rtc_data_handler);
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static void
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rtc_dsdt(void)
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{
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dsdt_line("");
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dsdt_line("Device (RTC)");
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dsdt_line("{");
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dsdt_line(" Name (_HID, EisaId (\"PNP0B00\"))");
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dsdt_line(" Name (_CRS, ResourceTemplate ()");
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dsdt_line(" {");
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dsdt_indent(2);
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dsdt_fixed_ioport(IO_RTC, 2);
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dsdt_fixed_irq(8);
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dsdt_unindent(2);
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dsdt_line(" })");
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dsdt_line("}");
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}
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LPC_DSDT(rtc_dsdt);
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SYSRES_IO(0x72, 6);
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