466 lines
12 KiB
C
466 lines
12 KiB
C
/* $NetBSD: i80321_pci.c,v 1.4 2003/07/15 00:24:54 lukem Exp $ */
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/*-
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI configuration support for i80321 I/O Processor chip.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/pcb.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_extern.h>
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#include <machine/pmap.h>
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#include <arm/xscale/i80321/i80321reg.h>
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#include <arm/xscale/i80321/i80321var.h>
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#include <arm/xscale/i80321/i80321_intr.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include <dev/pci/pcireg.h>
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extern struct i80321_softc *i80321_softc;
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struct i80321_pci_softc {
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device_t sc_dev;
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bus_space_tag_t sc_st;
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bus_space_handle_t sc_atu_sh;
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bus_space_tag_t sc_pciio;
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bus_space_tag_t sc_pcimem;
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int sc_busno;
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struct rman sc_mem_rman;
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struct rman sc_io_rman;
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struct rman sc_irq_rman;
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uint32_t sc_mem;
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uint32_t sc_io;
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};
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static int
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i80321_pci_probe(device_t dev)
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{
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device_set_desc(dev, "i80321 PCI bus");
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return (0);
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}
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static int
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i80321_pci_attach(device_t dev)
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{
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uint32_t busno;
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struct i80321_pci_softc *sc = device_get_softc(dev);
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sc->sc_st = i80321_softc->sc_st;
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sc->sc_atu_sh = i80321_softc->sc_atu_sh;
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busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
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busno = PCIXSR_BUSNO(busno);
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if (busno == 0xff)
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busno = 0;
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sc->sc_dev = dev;
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sc->sc_busno = busno;
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sc->sc_pciio = &i80321_softc->sc_pci_iot;
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sc->sc_pcimem = &i80321_softc->sc_pci_memt;
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sc->sc_mem = i80321_softc->sc_owin[0].owin_xlate_lo +
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VERDE_OUT_XLATE_MEM_WIN_SIZE;
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sc->sc_io = i80321_softc->sc_iow_vaddr;
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/* Initialize memory and i/o rmans. */
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sc->sc_io_rman.rm_type = RMAN_ARRAY;
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sc->sc_io_rman.rm_descr = "I80321 PCI I/O Ports";
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if (rman_init(&sc->sc_io_rman) != 0 ||
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rman_manage_region(&sc->sc_io_rman,
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sc->sc_io,
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sc->sc_io +
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VERDE_OUT_XLATE_IO_WIN_SIZE) != 0) {
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panic("i80321_pci_probe: failed to set up I/O rman");
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}
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "I80321 PCI Memory";
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if (rman_init(&sc->sc_mem_rman) != 0 ||
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rman_manage_region(&sc->sc_mem_rman,
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0, VERDE_OUT_XLATE_MEM_WIN_SIZE) != 0) {
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panic("i80321_pci_probe: failed to set up memory rman");
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}
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sc->sc_irq_rman.rm_type = RMAN_ARRAY;
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sc->sc_irq_rman.rm_descr = "i80321 PCI IRQs";
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if (rman_init(&sc->sc_irq_rman) != 0 ||
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rman_manage_region(&sc->sc_irq_rman, 26, 32) != 0)
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panic("i80321_pci_probe: failed to set up IRQ rman");
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device_add_child(dev, "pci",busno);
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return (bus_generic_attach(dev));
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}
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static int
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i80321_pci_maxslots(device_t dev)
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{
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return (PCI_SLOTMAX);
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}
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static int
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i80321_pci_conf_setup(struct i80321_pci_softc *sc, int bus, int slot, int func,
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int reg, uint32_t *addr)
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{
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uint32_t busno;
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busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
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busno = PCIXSR_BUSNO(busno);
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if (busno == 0xff)
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busno = 0;
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/*
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* If the bus # is the same as our own, then use Type 0 cycles,
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* else use Type 1.
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*
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* XXX We should filter out all non-private devices here!
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* XXX How does private space interact with PCI-PCI bridges?
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*/
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if (bus == busno) {
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if (slot > (31 - 16))
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return (1);
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/*
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* NOTE: PCI-X requires that that devices updated their
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* PCIXSR on every config write with the device number
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* specified in AD[15:11]. If we don't set this field,
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* each device could end of thinking it is at device 0,
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* which can cause a number of problems. Doing this
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* unconditionally should be OK when only PCI devices
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* are present.
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*/
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bus &= 0xff;
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slot &= 0x1f;
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func &= 0x07;
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*addr = (1U << (slot + 16)) |
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(slot << 11) | (func << 8) | reg;
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} else {
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*addr = (bus << 16) | (slot << 11) | (func << 8) | reg | 1;
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}
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return (0);
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}
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static u_int32_t
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i80321_pci_read_config(device_t dev, int bus, int slot, int func, int reg,
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int bytes)
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{
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struct i80321_pci_softc *sc = device_get_softc(dev);
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uint32_t isr;
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uint32_t addr;
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u_int32_t ret = 0;
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vm_offset_t va;
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int err = 0;
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if (i80321_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr))
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return (-1);
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bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_OCCAR,
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addr/* & ~3*/);
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va = sc->sc_atu_sh;
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switch (bytes) {
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case 1:
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err = badaddr_read((void*)(va + ATU_OCCDR + (reg & 3)), 1, &ret);
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break;
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case 2:
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err = badaddr_read((void*)(va + ATU_OCCDR + (reg & 3)), 2, &ret);
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break;
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case 4:
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err = badaddr_read((void *)(va + ATU_OCCDR), 4, &ret);
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break;
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default:
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printf("i803218_read_config: invalid size %d\n", bytes);
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ret = -1;
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}
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if (err) {
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isr = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_ATUISR);
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bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_ATUISR,
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isr & (ATUISR_P_SERR_DET|ATUISR_PMA|ATUISR_PTAM|
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ATUISR_PTAT|ATUISR_PMPE));
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return (-1);
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}
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return (ret);
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}
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static void
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i80321_pci_write_config(device_t dev, int bus, int slot, int func, int reg,
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u_int32_t data, int bytes)
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{
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struct i80321_pci_softc *sc = device_get_softc(dev);
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uint32_t addr;
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if (i80321_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr))
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return;
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bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_OCCAR,
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addr);
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switch (bytes) {
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case 1:
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bus_space_write_1(sc->sc_st, sc->sc_atu_sh, ATU_OCCDR +
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(reg & 3), data);
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break;
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case 2:
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bus_space_write_2(sc->sc_st, sc->sc_atu_sh, ATU_OCCDR +
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(reg & 3), data);
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break;
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case 4:
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bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_OCCDR, data);
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break;
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default:
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printf("i80321_pci_write_config: Invalid size : %d\n", bytes);
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}
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}
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static int
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i80321_pci_route_interrupt(device_t pcib, device_t dev, int pin)
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{
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int bus;
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int device;
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int func;
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uint32_t busno;
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struct i80321_pci_softc *sc = device_get_softc(pcib);
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bus = pci_get_bus(dev);
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device = pci_get_slot(dev);
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func = pci_get_function(dev);
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busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
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busno = PCIXSR_BUSNO(busno);
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if (busno == 0xff)
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busno = 0;
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if (bus != busno)
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goto no_mapping;
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switch (device) {
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/* IQ31244 PCI */
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case 1: /* PCIX-PCIX bridge */
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/*
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* The S-ATA chips are behind the bridge, and all of
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* the S-ATA interrupts are wired together.
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*/
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return (ICU_INT_XINT(2));
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case 2: /* PCI slot */
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/* All pins are wired together. */
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return (ICU_INT_XINT(3));
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case 3: /* i82546 dual Gig-E */
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if (pin == 1 || pin == 2)
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return (ICU_INT_XINT(0));
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goto no_mapping;
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/* IQ80321 PCI */
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case 4: /* i82544 Gig-E */
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case 8: /*
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* Apparently you can set the device for the ethernet adapter
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* to 8 with a jumper, so handle that as well
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*/
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if (pin == 1)
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return (ICU_INT_XINT(0));
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goto no_mapping;
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case 6: /* S-PCI-X slot */
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if (pin == 1)
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return (ICU_INT_XINT(2));
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if (pin == 2)
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return (ICU_INT_XINT(3));
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goto no_mapping;
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default:
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no_mapping:
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printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
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}
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return (0);
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}
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static int
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i80321_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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struct i80321_pci_softc *sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_BUS:
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*result = sc->sc_busno;
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return (0);
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}
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return (ENOENT);
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}
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static int
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i80321_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
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{
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struct i80321_pci_softc * sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_BUS:
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sc->sc_busno = result;
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return (0);
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}
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return (ENOENT);
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}
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static struct resource *
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i80321_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct i80321_pci_softc *sc = device_get_softc(bus);
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struct resource *rv;
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struct rman *rm;
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bus_space_tag_t bt = NULL;
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bus_space_handle_t bh = 0;
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switch (type) {
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case SYS_RES_IRQ:
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rm = &sc->sc_irq_rman;
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break;
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case SYS_RES_MEMORY:
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rm = &sc->sc_mem_rman;
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bt = sc->sc_pcimem;
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bh = (start >= 0x80000000 && start < 0x84000000) ? 0x80000000 :
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sc->sc_mem;
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start &= (0x1000000 - 1);
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end &= (0x1000000 - 1);
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break;
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case SYS_RES_IOPORT:
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rm = &sc->sc_io_rman;
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bt = sc->sc_pciio;
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bh = sc->sc_io;
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start = start - 0x90000000 + sc->sc_io;
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end = end - 0x90000000 + sc->sc_io;
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break;
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default:
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return (NULL);
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}
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rv = rman_reserve_resource(rm, start, end, count, flags, child);
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if (rv == NULL)
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return (NULL);
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if (type != SYS_RES_IRQ) {
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bh += (rman_get_start(rv));
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rman_set_bustag(rv, bt);
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rman_set_bushandle(rv, bh);
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if (flags & RF_ACTIVE) {
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if (bus_activate_resource(child, type, *rid, rv)) {
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rman_release_resource(rv);
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return (NULL);
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}
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}
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}
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return (rv);
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}
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static int
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i80321_pci_activate_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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u_long p;
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int error;
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if (type == SYS_RES_MEMORY) {
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error = bus_space_map(rman_get_bustag(r),
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rman_get_bushandle(r), rman_get_size(r), 0, &p);
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if (error)
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return (error);
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rman_set_bushandle(r, p);
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}
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return (rman_activate_resource(r));
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}
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static int
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i80321_pci_setup_intr(device_t dev, device_t child,
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struct resource *ires, int flags, driver_intr_t *intr, void *arg,
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void **cookiep)
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{
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return (BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
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intr, arg, cookiep));
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}
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static int
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i80321_pci_teardown_intr(device_t dev, device_t child, struct resource *res,
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void *cookie)
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{
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return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
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}
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static device_method_t i80321_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, i80321_pci_probe),
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DEVMETHOD(device_attach, i80321_pci_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, i80321_read_ivar),
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DEVMETHOD(bus_write_ivar, i80321_write_ivar),
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DEVMETHOD(bus_alloc_resource, i80321_pci_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, i80321_pci_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, i80321_pci_setup_intr),
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DEVMETHOD(bus_teardown_intr, i80321_pci_teardown_intr),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, i80321_pci_maxslots),
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DEVMETHOD(pcib_read_config, i80321_pci_read_config),
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DEVMETHOD(pcib_write_config, i80321_pci_write_config),
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DEVMETHOD(pcib_route_interrupt, i80321_pci_route_interrupt),
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{0, 0}
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};
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static driver_t i80321_pci_driver = {
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"pcib",
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i80321_pci_methods,
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sizeof(struct i80321_pci_softc),
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};
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static devclass_t i80321_pci_devclass;
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DRIVER_MODULE(ipci, iq, i80321_pci_driver, i80321_pci_devclass, 0, 0);
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