554c9209e3
RockChip clocks register have a write mask in the upper 16 bits, if a 1 is present the corresponding bit in the lower 16 ones is set. Use this instead of always setting the mask to 0xFFFF0000. This avoids a read of the register. While here add some debug printf useful for debuging clock problems MFC after: 1 week |
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acpica | ||
arm64 | ||
cavium | ||
cloudabi32 | ||
cloudabi64 | ||
conf | ||
coresight | ||
include | ||
linux | ||
qualcomm | ||
rockchip |