555 lines
14 KiB
C
555 lines
14 KiB
C
/* $NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93
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* JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta
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* $FreeBSD$
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*/
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/*
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* machAsmDefs.h --
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*
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* Macros used when writing assembler programs.
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*
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* Copyright (C) 1989 Digital Equipment Corporation.
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* Permission to use, copy, modify, and distribute this software and
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* its documentation for any purpose and without fee is hereby granted,
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* provided that the above copyright notice appears in all copies.
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* Digital Equipment Corporation makes no representations about the
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* suitability of this software for any purpose. It is provided "as is"
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* without express or implied warranty.
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*
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* from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h,
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* v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL)
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*/
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#ifndef _MACHINE_ASM_H_
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#define _MACHINE_ASM_H_
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#ifndef NO_REG_DEFS
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#include <machine/regdef.h>
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#endif
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#include <machine/endian.h>
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#undef __FBSDID
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#if !defined(lint) && !defined(STRIP_FBSDID)
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#define __FBSDID(s) .ident s
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#else
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#define __FBSDID(s) /* nothing */
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#endif
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/*
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* Define -pg profile entry code.
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* Must always be noreorder, must never use a macro instruction
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* Final addiu to t9 must always equal the size of this _KERN_MCOUNT
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*/
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#define _KERN_MCOUNT \
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.set push; \
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.set noreorder; \
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.set noat; \
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subu sp,sp,16; \
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sw t9,12(sp); \
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move AT,ra; \
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lui t9,%hi(_mcount); \
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addiu t9,t9,%lo(_mcount); \
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jalr t9; \
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nop; \
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lw t9,4(sp); \
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addiu sp,sp,8; \
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addiu t9,t9,40; \
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.set pop;
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#ifdef GPROF
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#define MCOUNT _KERN_MCOUNT
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#else
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#define MCOUNT
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#endif
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#define _C_LABEL(x) x
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/*
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* Endian-independent assembly-code aliases for unaligned memory accesses.
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*/
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#if BYTE_ORDER == LITTLE_ENDIAN
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#define LWLO lwl
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#define LWHI lwr
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#define SWLO swl
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#define SWHI swr
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#endif
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#if BYTE_ORDER == BIG_ENDIAN
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#define LWLO lwr
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#define LWHI lwl
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#define SWLO swr
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#define SWHI swl
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#endif
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#ifdef USE_AENT
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#define AENT(x) \
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.aent x, 0
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#else
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#define AENT(x)
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#endif
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/*
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* WARN_REFERENCES: create a warning if the specified symbol is referenced
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*/
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#define WARN_REFERENCES(_sym,_msg) \
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.section .gnu.warning. ## _sym ; .ascii _msg ; .text
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/*
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* These are temp registers whose names can be used in either the old
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* or new ABI, although they map to different physical registers. In
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* the old ABI, they map to t4-t7, and in the new ABI, they map to a4-a7.
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*
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* Because they overlap with the last 4 arg regs in the new ABI, ta0-ta3
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* should be used only when we need more than t0-t3.
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*/
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#if defined(__mips_n32) || defined(__mips_n64)
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#define ta0 $8
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#define ta1 $9
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#define ta2 $10
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#define ta3 $11
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#else
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#define ta0 $12
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#define ta1 $13
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#define ta2 $14
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#define ta3 $15
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#endif /* __mips_n32 || __mips_n64 */
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#ifdef __ELF__
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# define _C_LABEL(x) x
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#else
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# define _C_LABEL(x) _ ## x
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#endif
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/*
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* WEAK_ALIAS: create a weak alias.
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*/
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#define WEAK_ALIAS(alias,sym) \
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.weak alias; \
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alias = sym
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/*
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* STRONG_ALIAS: create a strong alias.
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*/
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#define STRONG_ALIAS(alias,sym) \
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.globl alias; \
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alias = sym
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#define GLOBAL(sym) \
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.globl sym; sym:
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#define ENTRY(sym) \
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.text; .globl sym; .ent sym; sym:
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#define ASM_ENTRY(sym) \
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.text; .globl sym; .type sym,@function; sym:
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/*
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* LEAF
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* A leaf routine does
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* - call no other function,
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* - never use any register that callee-saved (S0-S8), and
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* - not use any local stack storage.
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*/
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#define LEAF(x) \
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.globl _C_LABEL(x); \
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.ent _C_LABEL(x), 0; \
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_C_LABEL(x): ; \
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.frame sp, 0, ra; \
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MCOUNT
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/*
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* LEAF_NOPROFILE
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* No profilable leaf routine.
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*/
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#define LEAF_NOPROFILE(x) \
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.globl _C_LABEL(x); \
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.ent _C_LABEL(x), 0; \
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_C_LABEL(x): ; \
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.frame sp, 0, ra
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/*
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* XLEAF
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* declare alternate entry to leaf routine
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*/
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#define XLEAF(x) \
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.globl _C_LABEL(x); \
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AENT (_C_LABEL(x)); \
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_C_LABEL(x):
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/*
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* NESTED
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* A function calls other functions and needs
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* therefore stack space to save/restore registers.
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*/
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#define NESTED(x, fsize, retpc) \
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.globl _C_LABEL(x); \
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.ent _C_LABEL(x), 0; \
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_C_LABEL(x): ; \
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.frame sp, fsize, retpc; \
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MCOUNT
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/*
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* NESTED_NOPROFILE(x)
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* No profilable nested routine.
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*/
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#define NESTED_NOPROFILE(x, fsize, retpc) \
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.globl _C_LABEL(x); \
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.ent _C_LABEL(x), 0; \
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_C_LABEL(x): ; \
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.frame sp, fsize, retpc
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/*
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* XNESTED
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* declare alternate entry point to nested routine.
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*/
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#define XNESTED(x) \
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.globl _C_LABEL(x); \
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AENT (_C_LABEL(x)); \
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_C_LABEL(x):
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/*
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* END
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* Mark end of a procedure.
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*/
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#define END(x) \
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.end _C_LABEL(x)
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/*
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* IMPORT -- import external symbol
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*/
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#define IMPORT(sym, size) \
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.extern _C_LABEL(sym),size
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/*
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* EXPORT -- export definition of symbol
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*/
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#define EXPORT(x) \
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.globl _C_LABEL(x); \
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_C_LABEL(x):
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/*
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* VECTOR
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* exception vector entrypoint
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* XXX: regmask should be used to generate .mask
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*/
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#define VECTOR(x, regmask) \
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.ent _C_LABEL(x),0; \
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EXPORT(x); \
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#define VECTOR_END(x) \
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EXPORT(x ## End); \
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END(x)
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#define KSEG0TEXT_START
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#define KSEG0TEXT_END
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#define KSEG0TEXT .text
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/*
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* Macros to panic and printf from assembly language.
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*/
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#define PANIC(msg) \
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la a0, 9f; \
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jal _C_LABEL(panic); \
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nop; \
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MSG(msg)
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#define PANIC_KSEG0(msg, reg) PANIC(msg)
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#define PRINTF(msg) \
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la a0, 9f; \
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jal _C_LABEL(printf); \
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nop; \
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MSG(msg)
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#define MSG(msg) \
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.rdata; \
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9: .asciiz msg; \
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.text
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#define ASMSTR(str) \
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.asciiz str; \
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.align 3
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/*
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* Call ast if required
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*/
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#define DO_AST \
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44: \
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la s0, _C_LABEL(disableintr) ;\
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jalr s0 ;\
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nop ;\
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move a0, v0 ;\
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GET_CPU_PCPU(s1) ;\
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lw s3, PC_CURPCB(s1) ;\
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lw s1, PC_CURTHREAD(s1) ;\
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lw s2, TD_FLAGS(s1) ;\
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li s0, TDF_ASTPENDING | TDF_NEEDRESCHED;\
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and s2, s0 ;\
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la s0, _C_LABEL(restoreintr) ;\
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jalr s0 ;\
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nop ;\
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beq s2, zero, 4f ;\
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nop ;\
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la s0, _C_LABEL(ast) ;\
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jalr s0 ;\
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addu a0, s3, U_PCB_REGS ;\
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j 44b ;\
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nop ;\
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4:
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/*
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* XXX retain dialects XXX
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*/
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#define ALEAF(x) XLEAF(x)
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#define NLEAF(x) LEAF_NOPROFILE(x)
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#define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc)
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#define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc)
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/*
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* standard callframe {
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* register_t cf_args[4]; arg0 - arg3
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* register_t cf_sp; frame pointer
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* register_t cf_ra; return address
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* };
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*/
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#define CALLFRAME_SIZ (4 * (4 + 2))
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#define CALLFRAME_SP (4 * 4)
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#define CALLFRAME_RA (4 * 5)
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#define START_FRAME CALLFRAME_SIZ
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/*
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* While it would be nice to be compatible with the SGI
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* REG_L and REG_S macros, because they do not take parameters, it
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* is impossible to use them with the _MIPS_SIM_ABIX32 model.
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*
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* These macros hide the use of mips3 instructions from the
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* assembler to prevent the assembler from generating 64-bit style
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* ABI calls.
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*/
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#if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
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#define REG_L lw
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#define REG_S sw
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#define REG_LI li
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#define REG_PROLOGUE .set push
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#define REG_EPILOGUE .set pop
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#define SZREG 4
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#else
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#define REG_L ld
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#define REG_S sd
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#define REG_LI dli
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#define REG_PROLOGUE .set push ; .set mips3
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#define REG_EPILOGUE .set pop
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#define SZREG 8
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#endif /* _MIPS_BSD_API */
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#define mfc0_macro(data, spr) \
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__asm __volatile ("mfc0 %0, $%1" \
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: "=r" (data) /* outputs */ \
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: "i" (spr)); /* inputs */
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#define mtc0_macro(data, spr) \
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__asm __volatile ("mtc0 %0, $%1" \
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: /* outputs */ \
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: "r" (data), "i" (spr)); /* inputs */
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#define cfc0_macro(data, spr) \
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__asm __volatile ("cfc0 %0, $%1" \
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: "=r" (data) /* outputs */ \
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: "i" (spr)); /* inputs */
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#define ctc0_macro(data, spr) \
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__asm __volatile ("ctc0 %0, $%1" \
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: /* outputs */ \
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: "r" (data), "i" (spr)); /* inputs */
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#define lbu_macro(data, addr) \
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__asm __volatile ("lbu %0, 0x0(%1)" \
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: "=r" (data) /* outputs */ \
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: "r" (addr)); /* inputs */
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#define lb_macro(data, addr) \
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__asm __volatile ("lb %0, 0x0(%1)" \
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: "=r" (data) /* outputs */ \
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: "r" (addr)); /* inputs */
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#define lwl_macro(data, addr) \
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__asm __volatile ("lwl %0, 0x0(%1)" \
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: "=r" (data) /* outputs */ \
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: "r" (addr)); /* inputs */
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#define lwr_macro(data, addr) \
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__asm __volatile ("lwr %0, 0x0(%1)" \
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: "=r" (data) /* outputs */ \
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: "r" (addr)); /* inputs */
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#define ldl_macro(data, addr) \
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__asm __volatile ("ldl %0, 0x0(%1)" \
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: "=r" (data) /* outputs */ \
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: "r" (addr)); /* inputs */
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#define ldr_macro(data, addr) \
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__asm __volatile ("ldr %0, 0x0(%1)" \
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: "=r" (data) /* outputs */ \
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: "r" (addr)); /* inputs */
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#define sb_macro(data, addr) \
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__asm __volatile ("sb %0, 0x0(%1)" \
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: /* outputs */ \
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: "r" (data), "r" (addr)); /* inputs */
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#define swl_macro(data, addr) \
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__asm __volatile ("swl %0, 0x0(%1)" \
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: /* outputs */ \
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: "r" (data), "r" (addr)); /* inputs */
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#define swr_macro(data, addr) \
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__asm __volatile ("swr %0, 0x0(%1)" \
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: /* outputs */ \
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: "r" (data), "r" (addr)); /* inputs */
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#define sdl_macro(data, addr) \
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__asm __volatile ("sdl %0, 0x0(%1)" \
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: /* outputs */ \
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: "r" (data), "r" (addr)); /* inputs */
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#define sdr_macro(data, addr) \
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__asm __volatile ("sdr %0, 0x0(%1)" \
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: /* outputs */ \
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: "r" (data), "r" (addr)); /* inputs */
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#define mfgr_macro(data, gr) \
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__asm __volatile ("move %0, $%1" \
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: "=r" (data) /* outputs */ \
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: "i" (gr)); /* inputs */
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#define dmfc0_macro(data, spr) \
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__asm __volatile ("dmfc0 %0, $%1" \
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: "=r" (data) /* outputs */ \
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: "i" (spr)); /* inputs */
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#define dmtc0_macro(data, spr, sel) \
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__asm __volatile ("dmtc0 %0, $%1, %2" \
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: /* no outputs */ \
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: "r" (data), "i" (spr), "i" (sel)); /* inputs */
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/*
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* The DYNAMIC_STATUS_MASK option adds an additional masking operation
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* when updating the hardware interrupt mask in the status register.
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*
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* This is useful for platforms that need to at run-time mask
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* interrupts based on motherboard configuration or to handle
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* slowly clearing interrupts.
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*
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* XXX this is only currently implemented for mips3.
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*/
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#ifdef MIPS_DYNAMIC_STATUS_MASK
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#define DYNAMIC_STATUS_MASK(sr,scratch) \
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lw scratch, mips_dynamic_status_mask; \
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and sr, sr, scratch
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#define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \
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ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \
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DYNAMIC_STATUS_MASK(sr,scratch1)
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#else
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#define DYNAMIC_STATUS_MASK(sr,scratch)
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#define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1)
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#endif
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#ifdef SMP
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/*
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* FREEBSD_DEVELOPERS_FIXME
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* In multiprocessor case, store/retrieve the pcpu structure
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* address for current CPU in scratch register for fast access.
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*/
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#error "Write GET_CPU_PCPU for SMP"
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#else
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#define GET_CPU_PCPU(reg) \
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lw reg, _C_LABEL(pcpup);
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#endif
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/*
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* Description of the setjmp buffer
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*
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* word 0 magic number (dependant on creator)
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* 1 RA
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* 2 S0
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* 3 S1
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* 4 S2
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* 5 S3
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* 6 S4
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* 7 S5
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* 8 S6
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* 9 S7
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* 10 SP
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* 11 S8
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* 12 signal mask (dependant on magic)
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* 13 (con't)
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* 14 (con't)
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* 15 (con't)
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*
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* The magic number number identifies the jmp_buf and
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* how the buffer was created as well as providing
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* a sanity check
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*
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*/
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#define _JB_MAGIC__SETJMP 0xBADFACED
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#define _JB_MAGIC_SETJMP 0xFACEDBAD
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/* Valid for all jmp_buf's */
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#define _JB_MAGIC 0
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#define _JB_REG_RA 1
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#define _JB_REG_S0 2
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#define _JB_REG_S1 3
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#define _JB_REG_S2 4
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#define _JB_REG_S3 5
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#define _JB_REG_S4 6
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#define _JB_REG_S5 7
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#define _JB_REG_S6 8
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#define _JB_REG_S7 9
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#define _JB_REG_SP 10
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#define _JB_REG_S8 11
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/* Only valid with the _JB_MAGIC_SETJMP magic */
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#define _JB_SIGMASK 12
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#endif /* !_MACHINE_ASM_H_ */
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