bb0d0a8efc
- Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
425 lines
13 KiB
C
425 lines
13 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <sys/rman.h>
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#include <pci/pcivar.h>
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#include <machine/bwx.h>
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#include <machine/swiz.h>
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#include <alpha/pci/ciareg.h>
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#include <alpha/pci/ciavar.h>
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#include "alphapci_if.h"
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#include "pcib_if.h"
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#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
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static devclass_t pcib_devclass;
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static int
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cia_pcib_probe(device_t dev)
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{
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device_set_desc(dev, "2117x PCI host bus adapter");
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device_add_child(dev, "pci", 0);
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return 0;
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}
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static int
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cia_pcib_read_ivar(device_t dev, device_t child, int which, u_long *result)
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{
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switch (which) {
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case PCIB_IVAR_BUS:
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*result = 0;
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return 0;
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}
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return ENOENT;
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}
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static void *
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cia_pcib_cvt_dense(device_t dev, vm_offset_t addr)
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{
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addr &= 0xffffffffUL;
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return (void *) KV(addr | CIA_PCI_DENSE);
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}
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static void *
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cia_pcib_cvt_bwx(device_t dev, vm_offset_t addr)
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{
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if (chipset_bwx) {
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addr &= 0xffffffffUL;
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return (void *) KV(addr | CIA_EV56_BWMEM);
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} else {
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return 0;
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}
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}
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static void
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cia_clear_abort(void)
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{
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/*
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* Some (apparently-common) revisions of EB164 and AlphaStation
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* firmware do the Wrong thing with PCI master and target aborts,
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* which are caused by accesing the configuration space of devices
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* that don't exist (for example).
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*
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* To work around this, we clear the CIA error register's PCI
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* master and target abort bits before touching PCI configuration
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* space and check it afterwards. If it indicates a master or target
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* abort, the device wasn't there so we return 0xffffffff.
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*/
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REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
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alpha_mb();
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alpha_pal_draina();
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}
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static int
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cia_check_abort(void)
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{
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u_int32_t errbits;
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int ba = 0;
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alpha_pal_draina();
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alpha_mb();
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errbits = REGVAL(CIA_CSR_CIA_ERR);
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if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT))
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ba = 1;
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if (errbits) {
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REGVAL(CIA_CSR_CIA_ERR) = errbits;
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alpha_mb();
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alpha_pal_draina();
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}
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return ba;
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}
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#define CIA_BWX_CFGADDR(b, s, f, r) \
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KV(((b) ? CIA_EV56_BWCONF1 : CIA_EV56_BWCONF0) \
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| ((b) << 16) | ((s) << 11) | ((f) << 8) | (r))
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#define BWX_CFGREAD(b, s, f, r, width, type, op) do { \
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vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r); \
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type data; \
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cia_clear_abort(); \
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if (badaddr((caddr_t)va, width)) { \
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cia_check_abort(); \
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return ~0; \
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} \
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data = op(va); \
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if (cia_check_abort()) \
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return ~0; \
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return data; \
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} while (0)
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#define BWX_CFGWRITE(b, s, f, r, data, width, type, op) do { \
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vm_offset_t va = CIA_BWX_CFGADDR(b, s, f, r); \
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cia_clear_abort(); \
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if (badaddr((caddr_t)va, width)) return; \
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op(va, data); \
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cia_check_abort(); \
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return; \
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} while (0)
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#define CIA_SWIZ_CFGOFF(b, s, f, r) \
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(((b) << 16) | ((s) << 11) | ((f) << 8) | (r))
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/* when doing a type 1 pci configuration space access, we
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* must set a bit in the CIA_CSR_CFG register & clear it
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* when we're done
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*/
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#define CIA_TYPE1_SETUP(b,s,old_cfg) if((b)) { \
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do { \
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(s) = splhigh(); \
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(old_cfg) = REGVAL(CIA_CSR_CFG); \
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alpha_mb(); \
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REGVAL(CIA_CSR_CFG) = (old_cfg) | 0x1; \
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alpha_mb(); \
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} while(0); \
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}
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#define CIA_TYPE1_TEARDOWN(b,s,old_cfg) if((b)) { \
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do { \
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alpha_mb(); \
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REGVAL(CIA_CSR_CFG) = (old_cfg); \
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alpha_mb(); \
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splx((s)); \
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} while(0); \
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}
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/*
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* From NetBSD:
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* Some (apparently-common) revisions of EB164 and AlphaStation
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* firmware do the Wrong thing with PCI master and target aborts,
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* which are caused by accesing the configuration space of devices
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* that don't exist (for example).
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*
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* To work around this, we clear the CIA error register's PCI
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* master and target abort bits before touching PCI configuration
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* space and check it afterwards. If it indicates a master or target
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* abort, the device wasn't there so we return ~0
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*/
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#define SWIZ_CFGREAD(b, s, f, r, width, type) do { \
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type val = ~0; \
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int ipl = 0; \
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u_int32_t old_cfg = 0, errbits; \
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vm_offset_t off = CIA_SWIZ_CFGOFF(b, s, f, r); \
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vm_offset_t kv = SPARSE_##width##_ADDRESS(KV(CIA_PCI_CONF), off); \
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REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT; \
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alpha_mb(); \
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CIA_TYPE1_SETUP(b,ipl,old_cfg); \
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if (!badaddr((caddr_t)kv, sizeof(type))) { \
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val = SPARSE_##width##_EXTRACT(off, SPARSE_READ(kv)); \
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} \
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CIA_TYPE1_TEARDOWN(b,ipl,old_cfg); \
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errbits = REGVAL(CIA_CSR_CIA_ERR); \
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if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) \
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val = ~0; \
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if (errbits) { \
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REGVAL(CIA_CSR_CIA_ERR) = errbits; \
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alpha_mb(); \
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alpha_pal_draina(); \
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} \
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return val; \
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} while (0)
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#define SWIZ_CFGWRITE(b, s, f, r, data, width, type) do { \
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int ipl = 0; \
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u_int32_t old_cfg = 0; \
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vm_offset_t off = CIA_SWIZ_CFGOFF(b, s, f, r); \
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vm_offset_t kv = SPARSE_##width##_ADDRESS(KV(CIA_PCI_CONF), off); \
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alpha_mb(); \
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CIA_TYPE1_SETUP(b,ipl,old_cfg); \
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if (!badaddr((caddr_t)kv, sizeof(type))) { \
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SPARSE_WRITE(kv, SPARSE_##width##_INSERT(off, data)); \
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alpha_wmb(); \
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} \
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CIA_TYPE1_TEARDOWN(b,ipl,old_cfg); \
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return; \
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} while (0)
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static u_int32_t
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cia_pcib_swiz_read_config(u_int b, u_int s, u_int f, u_int reg, int width)
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{
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switch (width) {
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case 1:
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SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t);
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break;
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case 2:
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SWIZ_CFGREAD(b, s, f, reg, WORD, u_int16_t);
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break;
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case 4:
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SWIZ_CFGREAD(b, s, f, reg, LONG, u_int32_t);
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}
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return ~0;
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}
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static void
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cia_pcib_swiz_write_config(u_int b, u_int s, u_int f, u_int reg,
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u_int32_t val, int width)
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{
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switch (width) {
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case 1:
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SWIZ_CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t);
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break;
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case 2:
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SWIZ_CFGWRITE(b, s, f, reg, val, WORD, u_int16_t);
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break;
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case 4:
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SWIZ_CFGWRITE(b, s, f, reg, val, LONG, u_int32_t);
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}
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}
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static u_int32_t
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cia_pcib_bwx_read_config(u_int b, u_int s, u_int f, u_int reg, int width)
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{
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switch (width) {
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case 1:
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BWX_CFGREAD(b, s, f, reg, 1, u_int8_t, ldbu);
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break;
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case 2:
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BWX_CFGREAD(b, s, f, reg, 2, u_int16_t, ldwu);
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break;
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case 4:
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BWX_CFGREAD(b, s, f, reg, 4, u_int32_t, ldl);
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}
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return ~0;
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}
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static void
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cia_pcib_bwx_write_config(u_int b, u_int s, u_int f, u_int reg,
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u_int32_t val, u_int width)
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{
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switch (width) {
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case 1:
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BWX_CFGWRITE(b, s, f, reg, val, 1, u_int8_t, stb);
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break;
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case 2:
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BWX_CFGWRITE(b, s, f, reg, val, 2, u_int16_t, stw);
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break;
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case 4:
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BWX_CFGWRITE(b, s, f, reg, val, 4, u_int32_t, stl);
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}
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}
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static int
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cia_pcib_maxslots(device_t dev)
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{
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return 31;
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}
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static u_int32_t
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cia_pcib_read_config(device_t dev, int b, int s, int f,
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int reg, int width)
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{
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if (chipset_bwx)
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return cia_pcib_bwx_read_config(b, s, f, reg, width);
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else
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return cia_pcib_swiz_read_config(b, s, f, reg, width);
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}
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static void
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cia_pcib_write_config(device_t dev, int b, int s, int f,
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int reg, u_int32_t val, int width)
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{
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if (chipset_bwx)
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cia_pcib_bwx_write_config(b, s, f, reg, val, width);
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else
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cia_pcib_swiz_write_config(b, s, f, reg, val, width);
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}
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static device_method_t cia_pcib_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, cia_pcib_probe),
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DEVMETHOD(device_attach, bus_generic_attach),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, cia_pcib_read_ivar),
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DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, alpha_platform_pci_setup_intr),
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DEVMETHOD(bus_teardown_intr, alpha_platform_pci_teardown_intr),
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/* alphapci interface */
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DEVMETHOD(alphapci_cvt_dense, cia_pcib_cvt_dense),
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DEVMETHOD(alphapci_cvt_bwx, cia_pcib_cvt_bwx),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, cia_pcib_maxslots),
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DEVMETHOD(pcib_read_config, cia_pcib_read_config),
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DEVMETHOD(pcib_write_config, cia_pcib_write_config),
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DEVMETHOD(pcib_route_interrupt, alpha_pci_route_interrupt),
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{ 0, 0 }
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};
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static driver_t cia_pcib_driver = {
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"pcib",
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cia_pcib_methods,
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1,
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};
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DRIVER_MODULE(pcib, cia, cia_pcib_driver, pcib_devclass, 0, 0);
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