595d5338fa
We used to put every PLL in normal mode (meaning that the output would be the result of the PLL configuration) instead of slow mode (the output is equal to the external oscillator frequency, 24-26Mhz) but this doesn't work for most of the PLLs as when we put them into normal mode the registers configuring the output frequency haven't been set. Add a normal_mode member in clk_pll_def/clk_pll_sc struct and if it's true we then set the PLL to normal mode. For now only set it to the LPLL and BPLL (Little cluster PLL and Big cluster PLL respectively). Reviewed by: ganbold Differential Revision: https://reviews.freebsd.org/D20174
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