113 lines
3.9 KiB
C
113 lines
3.9 KiB
C
/*
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* Ported to boot 386BSD by Julian Elischer (julian@tfs.com) Sept 1992
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*
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* Mach Operating System
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* Copyright (c) 1992, 1991 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*/
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/*
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* HISTORY
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* $Log: table.c,v $
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* Revision 2.2 92/04/04 11:36:43 rpd
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* Fix Intel Copyright as per B. Davies authorization.
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* [92/04/03 rvb]
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* Taken from 2.5 bootstrap.
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* [92/03/30 rvb]
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*
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* Revision 2.2 91/04/02 14:42:22 mbj
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* Add Intel copyright
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* [90/02/09 rvb]
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*
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*/
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/*
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Copyright 1988, 1989, 1990, 1991, 1992
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by Intel Corporation, Santa Clara, California.
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All Rights Reserved
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Permission to use, copy, modify, and distribute this software and
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its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appears in all
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copies and that both the copyright notice and this permission notice
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appear in supporting documentation, and that the name of Intel
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not be used in advertising or publicity pertaining to distribution
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of the software without specific, written prior permission.
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INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
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IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#define NGDTENT 6
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#define GDTLIMIT 48 /* NGDTENT * 8 */
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/* Segment Descriptor
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*
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* 31 24 19 16 7 0
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* ------------------------------------------------------------
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* | | |B| |A| | | |1|0|E|W|A| |
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* | BASE 31..24 |G|/|0|V| LIMIT |P|DPL| TYPE | BASE 23:16 |
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* | | |D| |L| 19..16| | |1|1|C|R|A| |
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* ------------------------------------------------------------
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* | | |
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* | BASE 15..0 | LIMIT 15..0 |
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* | | |
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* ------------------------------------------------------------
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*/
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struct seg_desc {
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unsigned short limit_15_0;
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unsigned short base_15_0;
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unsigned char base_23_16;
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unsigned char bit_15_8;
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unsigned char bit_23_16;
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unsigned char base_31_24;
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};
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struct seg_desc Gdt[NGDTENT] = {
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{0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, /* 0x0 : null */
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{0xFFFF, 0x0, 0x0, 0x9F, 0xCF, 0x0}, /* 0x08 : kernel code */
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{0xFFFF, 0x0, 0x0, 0x93, 0xCF, 0x0}, /* 0x10 : kernel data */
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{0xFFFF, 0x0000, 0x9, 0x9E, 0x40, 0x0}, /* 0x18 : boot code */
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{0xFFFF, 0x0000, 0x9, 0x92, 0x40, 0x0}, /* 0x20 : boot data */
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{0xFFFF, 0x0000, 0x9, 0x9E, 0x0, 0x0} /* 0x28 : boot code, 16 bits */
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};
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struct pseudo_desc {
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unsigned short limit;
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unsigned short base_low;
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unsigned short base_high;
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};
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struct pseudo_desc Gdtr = { GDTLIMIT, 0x0400, 9 };
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struct pseudo_desc Gdtr2 = { GDTLIMIT, 0xfe00, 9 };
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/* boot is loaded at 0x90000, Gdt is at boot+1024 */
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