930b312319
which is able to manipulate the clock and data lines directly. When an i2c bus is hung by a slave device stuck in the middle of a transaction that didn't complete properly, this function manipulates the clock and data lines in a sequence known to reliably reset slave devices. The most common cause of a hung i2c bus is a system reboot in the middle of an i2c transfer (so it doesnt' happen often, but now there is a way other than power cycling to recover from it).
125 lines
4.6 KiB
C
125 lines
4.6 KiB
C
/*-
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* Copyright (c) 2017 Ian Lepore <ian@freebsd.org>
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* All rights reserved.
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*
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* Development sponsored by Microsemi, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Helper code to recover a hung i2c bus by bit-banging a recovery sequence.
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*
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* An i2c bus can be hung by a slave driving the clock (rare) or data lines low.
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* The most common cause is a partially-completed transaction such as rebooting
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* while a slave is sending a byte of data. Because i2c allows the clock to
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* freeze for any amount of time, the slave device will continue driving the
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* data line until power is removed, or the clock cycles enough times to
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* complete the current byte. After completing any partial byte, a START/STOP
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* sequence resets the slave and the bus is recovered.
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*
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* Any i2c driver which is able to manually set the level of the clock and data
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* lines can use this common code for bus recovery. On many SOCs that have
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* embedded i2c controllers, the i2c pins can be temporarily reassigned as gpio
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* pins to do the bus recovery, then can be assigned back to the i2c hardware.
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <dev/iicbus/iic_recover_bus.h>
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#include <dev/iicbus/iiconf.h>
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int
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iic_recover_bus(struct iicrb_pin_access *pins)
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{
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const u_int timeout_us = 40000;
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const u_int delay_us = 500;
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int i;
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/*
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* Start with clock and data high.
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*/
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pins->setsda(pins->ctx, 1);
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pins->setscl(pins->ctx, 1);
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/*
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* At this point, SCL should be high. If it's not, some slave on the
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* bus is doing clock-stretching and we should wait a while. If that
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* slave is completely locked up there may be no way to recover at all.
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* We wait up to 40 milliseconds, a seriously pessimistic time (even a
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* cheap eeprom has a max post-write delay of only 10ms), and also long
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* enough to allow SMB slaves to timeout normally after 35ms.
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*/
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for (i = 0; i < timeout_us; i += delay_us) {
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if (pins->getscl(pins->ctx))
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break;
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DELAY(delay_us);
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}
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if (i >= timeout_us)
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return (IIC_EBUSERR);
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/*
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* At this point we should be able to control the clock line. Some
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* slave may be part way through a byte transfer, and could be holding
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* the data line low waiting for more clock pulses to finish the byte.
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* Cycle the clock until we see the data line go high, but only up to 9
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* times because if it's not free after 9 clocks we're never going to
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* win this battle. We do 9 max because that's a byte plus an ack/nack
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* bit, after which the slave must not be driving the data line anymore.
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*/
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for (i = 0; ; ++i) {
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if (pins->getsda(pins->ctx))
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break;
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if (i == 9)
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return (IIC_EBUSERR);
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pins->setscl(pins->ctx, 0);
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DELAY(5);
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pins->setscl(pins->ctx, 1);
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DELAY(5);
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}
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/*
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* At this point we should be in control of both the clock and data
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* lines, and both lines should be high. To complete the reset of a
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* slave that was part way through a transaction, we need to do a
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* START/STOP sequence, which leaves both lines high at the end.
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* - START: SDA transitions high->low while SCL remains high.
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* - STOP: SDA transitions low->high while SCL remains high.
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* Note that even though the clock line remains high, we transition the
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* data line no faster than it would change state with a 100khz clock.
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*/
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pins->setsda(pins->ctx, 0);
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DELAY(5);
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pins->setsda(pins->ctx, 1);
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DELAY(5);
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return (0);
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}
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