1148 lines
27 KiB
C
1148 lines
27 KiB
C
/*
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* Intel PCIC or compatible Controller driver
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* May be built using LKM to make a loadable module.
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*-------------------------------------------------------------------------
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*
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* Copyright (c) 1995 Andrew McRae. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* pcic98 : PC9801 original PCMCIA controller code for NS/A,Ne,NX/C,NR/L.
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* by Noriyuki Hosobuchi <yj8n-hsbc@asahi-net.or.jp>
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/select.h>
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#include <sys/interrupt.h>
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#include <machine/clock.h>
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#include <i386/isa/icu.h>
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#include <i386/isa/isa_device.h>
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#include <pccard/i82365.h>
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#ifdef PC98
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#include <pccard/pcic98reg.h>
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#endif
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#include <pccard/cardinfo.h>
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#include <pccard/driver.h>
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#include <pccard/slot.h>
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/*
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* Prototypes for interrupt handler.
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*/
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static inthand2_t pcicintr;
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static int pcic_ioctl __P((struct slot *, int, caddr_t));
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static int pcic_power __P((struct slot *));
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static timeout_t pcic_reset;
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static void pcic_resume(struct slot *);
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static void pcic_disable __P((struct slot *));
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static void pcic_mapirq __P((struct slot *, int));
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static timeout_t pcictimeout;
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static struct callout_handle pcictimeout_ch
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= CALLOUT_HANDLE_INITIALIZER(&pcictimeout_ch);
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#ifdef LKM
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static int pcic_handle __P((struct lkm_table *lkmtp, int cmd));
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#endif
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static int pcic_memory(struct slot *, int);
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static int pcic_io(struct slot *, int);
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static u_int build_freelist(u_int);
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/*
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* Per-slot data table.
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*/
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static struct pcic_slot {
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int slotnum; /* My slot number */
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int index; /* Index register */
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int data; /* Data register */
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int offset; /* Offset value for index */
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char controller; /* Device type */
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char revision; /* Device Revision */
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struct slot *slt; /* Back ptr to slot */
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u_char (*getb)(struct pcic_slot *, int);
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void (*putb)(struct pcic_slot *, int, u_char);
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u_char *regs; /* Pointer to regs in mem */
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} pcic_slots[PCIC_MAX_SLOTS];
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static int pcic_irq;
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static unsigned pcic_imask;
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static struct slot_ctrl cinfo;
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/*
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* Internal inline functions for accessing the PCIC.
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*/
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/*
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* Read a register from the PCIC.
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*/
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static __inline unsigned char
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getb1(struct pcic_slot *sp, int reg)
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{
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outb(sp->index, sp->offset + reg);
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return inb(sp->data);
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}
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static __inline unsigned char
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getb2(struct pcic_slot *sp, int reg)
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{
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return (sp->regs[reg]);
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}
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/*
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* Write a register on the PCIC
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*/
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static __inline void
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putb1(struct pcic_slot *sp, int reg, unsigned char val)
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{
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outb(sp->index, sp->offset + reg);
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outb(sp->data, val);
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}
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static __inline void
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putb2(struct pcic_slot *sp, int reg, unsigned char val)
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{
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sp->regs[reg] = val;
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}
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/*
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* Clear bit(s) of a register.
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*/
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static __inline void
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clrb(struct pcic_slot *sp, int reg, unsigned char mask)
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{
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sp->putb(sp, reg, sp->getb(sp, reg) & ~mask);
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}
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/*
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* Set bit(s) of a register
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*/
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static __inline void
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setb(struct pcic_slot *sp, int reg, unsigned char mask)
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{
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sp->putb(sp, reg, sp->getb(sp, reg) | mask);
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}
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/*
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* Write a 16 bit value to 2 adjacent PCIC registers
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*/
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static __inline void
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putw(struct pcic_slot *sp, int reg, unsigned short word)
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{
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sp->putb(sp, reg, word & 0xFF);
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sp->putb(sp, reg + 1, (word >> 8) & 0xff);
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}
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/*
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* Loadable kernel module interface.
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*/
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#ifdef LKM
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/*
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* This defines the lkm_misc module use by modload
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* to define the module name.
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*/
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MOD_MISC(pcic);
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/*
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* Module handler that processes loads and unloads.
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* Once the module is loaded, the probe routine
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* is called to install the slots (if any).
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*/
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static int
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pcic_handle(struct lkm_table *lkmtp, int cmd)
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{
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int err = 0; /* default = success*/
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switch(cmd) {
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case LKM_E_LOAD:
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/*
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* Don't load twice! (lkmexists() is exported by kern_lkm.c)
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*/
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if (lkmexists(lkmtp))
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return(EEXIST);
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/*
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* Call the probe routine to find the slots. If
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* no slots exist, then don't bother loading the module.
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*/
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if (pcic_probe() == 0)
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return(ENODEV);
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break; /* Success*/
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/*
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* Attempt to unload the slot driver.
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*/
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case LKM_E_UNLOAD:
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printf("Unloading PCIC driver\n");
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err = pcic_unload(lkmtp, cmd);
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break; /* Success*/
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default: /* we only understand load/unload*/
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err = EINVAL;
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break;
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}
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return(err);
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}
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/*
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* External entry point; should generally match name of .o file. The
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* arguments are always the same for all loaded modules. The "load",
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* "unload", and "stat" functions in "DISPATCH" will be called under
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* their respective circumstances unless their value is "lkm_nullcmd".
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* If called, they are called with the same arguments (cmd is included to
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* allow the use of a single function, ver is included for version
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* matching between modules and the kernel loader for the modules).
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*
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* Since we expect to link in the kernel and add external symbols to
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* the kernel symbol name space in a future version, generally all
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* functions used in the implementation of a particular module should
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* be static unless they are expected to be seen in other modules or
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* to resolve unresolved symbols alread existing in the kernel (the
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* second case is not likely to ever occur).
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*
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* The entry point should return 0 unless it is refusing load (in which
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* case it should return an errno from errno.h).
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*/
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int
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pcic_mod(struct lkm_table *lkmtp, int cmd, int ver)
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{
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MOD_DISPATCH(pcic, lkmtp, cmd, ver,
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pcic_handle, pcic_handle, lkm_nullcmd);
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}
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/*
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* pcic_unload - Called when unloading a LKM.
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* Disables interrupts and resets PCIC.
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*/
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static int
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pcic_unload(struct lkm_table *lkmtp, int cmd)
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{
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int slot;
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struct pcic_slot *sp = pcic_slots;
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untimeout(pcictimeout, 0, pcictimeout_ch);
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if (pcic_irq) {
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for (slot = 0; slot < PCIC_MAX_SLOTS; slot++, sp++) {
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if (sp->slt)
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sp->putb(sp, PCIC_STAT_INT, 0);
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}
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unregister_intr(pcic_irq, pcicintr);
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}
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pccard_remove_controller(&cinfo);
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return(0);
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}
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#endif /* LKM */
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#if 0
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static void
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pcic_dump_attributes(unsigned char *scratch, int maxlen)
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{
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int i,j,k;
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i = 0;
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while (scratch[i] != 0xff && i < maxlen) {
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unsigned char link = scratch[i+2];
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/*
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* Dump attribute memory
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*/
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if (scratch[i]) {
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printf("[%02x] ", i);
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for (j = 0; j < 2 * link + 4 && j < 128; j += 2)
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printf("%02x ", scratch[j + i]);
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printf("\n");
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}
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i += 4 + 2 * link;
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}
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}
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#endif
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static void
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nullfunc(void *unused)
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{
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/* empty */
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}
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static u_int
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build_freelist(u_int pcic_mask)
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{
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int irq;
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u_int mask, freemask;
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/* No free IRQs (yet). */
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freemask = 0;
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/* Walk through all of the IRQ's and find any that aren't allocated. */
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for (irq = 1; irq < ICU_LEN; irq++) {
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/*
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* If the PCIC controller can't generate it, don't
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* bother checking to see if it it's free.
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*/
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mask = 1 << irq;
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if (!(mask & pcic_mask)) continue;
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/* See if the IRQ is free. */
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if (register_intr(irq, 0, 0, nullfunc, NULL, irq) == 0) {
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/* Give it back, but add it to the mask */
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INTRMASK(freemask, mask);
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unregister_intr(irq, nullfunc);
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}
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}
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#ifdef PCIC_DEBUG
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printf("Freelist of IRQ's <0x%x>\n", freemask);
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#endif
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return freemask;
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}
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/*
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* entry point from main code to map/unmap memory context.
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*/
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static int
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pcic_memory(struct slot *slt, int win)
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{
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struct pcic_slot *sp = slt->cdata;
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struct mem_desc *mp = &slt->mem[win];
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int reg = mp->window * PCIC_MEMSIZE + PCIC_MEMBASE;
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#ifdef PC98
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if (sp->controller == PCIC_PC98) {
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if (mp->flags & MDF_ACTIVE) {
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/* slot = 0, window = 0, sys_addr = 0xda000, length = 8KB */
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unsigned char x;
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if ((unsigned long)mp->start != 0xda000) {
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printf("sys_addr must be 0xda000. requested address = 0x%x\n",
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mp->start);
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return(EINVAL);
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}
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/* omajinai ??? */
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outb(PCIC98_REG0, 0);
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x = inb(PCIC98_REG1);
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x &= 0xfc;
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x |= 0x02;
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outb(PCIC98_REG1, x);
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outw(PCIC98_REG_PAGOFS, 0);
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if (mp->flags & MDF_ATTR) {
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outb(PCIC98_REG6, inb(PCIC98_REG6) | PCIC98_ATTRMEM);
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}else{
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outb(PCIC98_REG6, inb(PCIC98_REG6) & (~PCIC98_ATTRMEM));
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}
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outb(PCIC98_REG_WINSEL, PCIC98_MAPWIN);
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#if 0
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if (mp->flags & MDF_16BITS == 1) { /* 16bit */
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outb(PCIC98_REG2, inb(PCIC98_REG2) & (~PCIC98_8BIT));
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}else{ /* 8bit */
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outb(PCIC98_REG2, inb(PCIC98_REG2) | PCIC98_8BIT);
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}
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#endif
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}else{
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outb(PCIC98_REG_WINSEL, PCIC98_UNMAPWIN);
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}
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return 0;
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}
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#endif /* PC98 */
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if (mp->flags & MDF_ACTIVE) {
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unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12;
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/*
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* Write the addresses, card offsets and length.
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* The values are all stored as the upper 12 bits of the
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* 24 bit address i.e everything is allocated as 4 Kb chunks.
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*/
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putw(sp, reg, sys_addr & 0xFFF);
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putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
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putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
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#if 0
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printf("card offs = card_adr = 0x%x 0x%x, sys_addr = 0x%x\n",
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mp->card, ((mp->card >> 12) - sys_addr) & 0x3FFF,
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sys_addr);
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#endif
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/*
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* Each 16 bit register has some flags in the upper bits.
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*/
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if (mp->flags & MDF_16BITS)
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setb(sp, reg+1, PCIC_DATA16);
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if (mp->flags & MDF_ZEROWS)
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setb(sp, reg+1, PCIC_ZEROWS);
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if (mp->flags & MDF_WS0)
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setb(sp, reg+3, PCIC_MW0);
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if (mp->flags & MDF_WS1)
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setb(sp, reg+3, PCIC_MW1);
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if (mp->flags & MDF_ATTR)
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setb(sp, reg+5, PCIC_REG);
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if (mp->flags & MDF_WP)
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setb(sp, reg+5, PCIC_WP);
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#if 0
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printf("Slot number %d, reg 0x%x, offs 0x%x\n",
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sp->slotnum, reg, sp->offset);
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printf("Map window to sys addr 0x%x for %d bytes, card 0x%x\n",
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mp->start, mp->size, mp->card);
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printf("regs are: 0x%02x%02x 0x%02x%02x 0x%02x%02x flags 0x%x\n",
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sp->getb(sp, reg), sp->getb(sp, reg+1),
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sp->getb(sp, reg+2), sp->getb(sp, reg+3),
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sp->getb(sp, reg+4), sp->getb(sp, reg+5),
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mp->flags);
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#endif
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/*
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* Enable the memory window. By experiment, we need a delay.
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*/
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setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16);
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DELAY(50);
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} else {
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#if 0
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printf("Unmapping window %d\n", win);
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#endif
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clrb(sp, PCIC_ADDRWINE, 1<<win);
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putw(sp, reg, 0);
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putw(sp, reg+2, 0);
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putw(sp, reg+4, 0);
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}
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return(0);
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}
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|
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/*
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* pcic_io - map or unmap I/O context
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*/
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static int
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pcic_io(struct slot *slt, int win)
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{
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int mask, reg;
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struct pcic_slot *sp = slt->cdata;
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struct io_desc *ip = &slt->io[win];
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#ifdef PC98
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if (sp->controller == PCIC_PC98) {
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unsigned char x;
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#if 0
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if (win =! 0) {
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printf("pcic98:Illegal PCIC I/O window request(%d)!", win);
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return(EINVAL);
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}
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#endif
|
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if (ip->flags & IODF_ACTIVE) {
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unsigned short base;
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x = inb(PCIC98_REG2) & 0x0f;
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if (! (ip->flags & IODF_16BIT))
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x |= PCIC98_8BIT;
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if (ip->size > 16) /* 128bytes mapping */
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x |= PCIC98_MAP128;
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x |= PCIC98_IOMEMORY;
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outb(PCIC98_REG2, x);
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base = 0x80d0;
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outw(PCIC98_REG4, base); /* 98side IO base */
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outw(PCIC98_REG5, ip->start); /* card side IO base */
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|
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#ifdef PCIC_DEBUG
|
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printf("pcic98: IO mapped 0x%04x(98) -> 0x%04x(Card) and width %d bytes\n",
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base, ip->start, ip->size);
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#endif
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ip->start = base;
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|
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}else{
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outb(PCIC98_REG2, inb(PCIC98_REG2) & (~PCIC98_IOMEMORY));
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}
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return 0;
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}
|
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#endif
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switch (win) {
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case 0:
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mask = PCIC_IO0_EN;
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reg = PCIC_IO0;
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break;
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case 1:
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mask = PCIC_IO1_EN;
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reg = PCIC_IO1;
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break;
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default:
|
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panic("Illegal PCIC I/O window request!");
|
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}
|
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if (ip->flags & IODF_ACTIVE) {
|
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unsigned char x, ioctlv;
|
|
|
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#ifdef PCIC_DEBUG
|
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printf("Map I/O 0x%x (size 0x%x) on Window %d\n", ip->start, ip->size, win);
|
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#endif /* PCIC_DEBUG */
|
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putw(sp, reg, ip->start);
|
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putw(sp, reg+2, ip->start+ip->size-1);
|
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x = 0;
|
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if (ip->flags & IODF_ZEROWS)
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x |= PCIC_IO_0WS;
|
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if (ip->flags & IODF_WS)
|
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x |= PCIC_IO_WS;
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if (ip->flags & IODF_CS16)
|
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x |= PCIC_IO_CS16;
|
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if (ip->flags & IODF_16BIT)
|
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x |= PCIC_IO_16BIT;
|
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/*
|
|
* Extract the current flags and merge with new flags.
|
|
* Flags for window 0 in lower nybble, and in upper nybble
|
|
* for window 1.
|
|
*/
|
|
ioctlv = sp->getb(sp, PCIC_IOCTL);
|
|
DELAY(100);
|
|
switch (win) {
|
|
case 0:
|
|
sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0));
|
|
break;
|
|
case 1:
|
|
sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf));
|
|
break;
|
|
}
|
|
DELAY(100);
|
|
setb(sp, PCIC_ADDRWINE, mask);
|
|
DELAY(100);
|
|
} else {
|
|
clrb(sp, PCIC_ADDRWINE, mask);
|
|
DELAY(100);
|
|
putw(sp, reg, 0);
|
|
putw(sp, reg + 2, 0);
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Look for an Intel PCIC (or compatible).
|
|
* For each available slot, allocate a PC-CARD slot.
|
|
*/
|
|
|
|
/*
|
|
* VLSI 82C146 has incompatibilities about the I/O address
|
|
* of slot 1. Assume it's the only PCIC whose vendor ID is 0x84,
|
|
* contact Nate Williams <nate@FreeBSD.org> if incorrect.
|
|
*/
|
|
int
|
|
pcic_probe(void)
|
|
{
|
|
int slotnum, validslots = 0;
|
|
u_int free_irqs;
|
|
struct slot *slt;
|
|
struct pcic_slot *sp;
|
|
unsigned char c;
|
|
static int maybe_vlsi = 0;
|
|
|
|
/* Determine the list of free interrupts */
|
|
free_irqs = build_freelist(PCIC_INT_MASK_ALLOWED);
|
|
|
|
/*
|
|
* Initialise controller information structure.
|
|
*/
|
|
cinfo.mapmem = pcic_memory;
|
|
cinfo.mapio = pcic_io;
|
|
cinfo.ioctl = pcic_ioctl;
|
|
cinfo.power = pcic_power;
|
|
cinfo.mapirq = pcic_mapirq;
|
|
cinfo.reset = pcic_reset;
|
|
cinfo.disable = pcic_disable;
|
|
cinfo.resume = pcic_resume;
|
|
cinfo.maxmem = PCIC_MEM_WIN;
|
|
cinfo.maxio = PCIC_IO_WIN;
|
|
cinfo.irqs = free_irqs;
|
|
cinfo.imask = &pcic_imask;
|
|
|
|
#ifdef LKM
|
|
bzero(pcic_slots, sizeof(pcic_slots));
|
|
#endif
|
|
sp = pcic_slots;
|
|
for (slotnum = 0; slotnum < PCIC_MAX_SLOTS; slotnum++, sp++) {
|
|
/*
|
|
* Initialise the PCIC slot table.
|
|
*/
|
|
sp->getb = getb1;
|
|
sp->putb = putb1;
|
|
if (slotnum < 4) {
|
|
sp->index = PCIC_INDEX_0;
|
|
sp->data = PCIC_DATA_0;
|
|
sp->offset = slotnum * PCIC_SLOT_SIZE;
|
|
} else {
|
|
sp->index = PCIC_INDEX_1;
|
|
sp->data = PCIC_DATA_1;
|
|
sp->offset = (slotnum - 4) * PCIC_SLOT_SIZE;
|
|
}
|
|
/*
|
|
* XXX - Screwed up slot 1 on the VLSI chips. According to
|
|
* the Linux PCMCIA code from David Hinds, working chipsets
|
|
* return 0x84 from their (correct) ID ports, while the broken
|
|
* ones would need to be probed at the new offset we set after
|
|
* we assume it's broken.
|
|
*/
|
|
if (slotnum == 1 && maybe_vlsi && sp->getb(sp, PCIC_ID_REV) != 0x84) {
|
|
sp->index += 4;
|
|
sp->data += 4;
|
|
sp->offset = PCIC_SLOT_SIZE << 1;
|
|
}
|
|
/*
|
|
* see if there's a PCMCIA controller here
|
|
* Intel PCMCIA controllers use 0x82 and 0x83
|
|
* IBM clone chips use 0x88 and 0x89, apparently
|
|
*/
|
|
c = sp->getb(sp, PCIC_ID_REV);
|
|
sp->revision = -1;
|
|
switch(c) {
|
|
/*
|
|
* 82365 or clones.
|
|
*/
|
|
case 0x82:
|
|
case 0x83:
|
|
sp->controller = PCIC_I82365;
|
|
sp->revision = c & 1;
|
|
/*
|
|
* Now check for VADEM chips.
|
|
*/
|
|
outb(sp->index, 0x0E);
|
|
outb(sp->index, 0x37);
|
|
setb(sp, 0x3A, 0x40);
|
|
c = sp->getb(sp, PCIC_ID_REV);
|
|
if (c & 0x08) {
|
|
switch (sp->revision = c & 7) {
|
|
case 1:
|
|
sp->controller = PCIC_VG365;
|
|
break;
|
|
case 2:
|
|
sp->controller = PCIC_VG465;
|
|
break;
|
|
case 3:
|
|
sp->controller = PCIC_VG468;
|
|
break;
|
|
default:
|
|
sp->controller = PCIC_VG469;
|
|
break;
|
|
}
|
|
clrb(sp, 0x3A, 0x40);
|
|
}
|
|
|
|
/*
|
|
* Check for RICOH RF5C396 PCMCIA Controller
|
|
*/
|
|
c = sp->getb(sp, 0x3a);
|
|
if (c == 0xb2) {
|
|
sp->controller = PCIC_RF5C396;
|
|
}
|
|
|
|
break;
|
|
/*
|
|
* VLSI chips.
|
|
*/
|
|
case 0x84:
|
|
sp->controller = PCIC_VLSI;
|
|
maybe_vlsi = 1;
|
|
break;
|
|
case 0x88:
|
|
case 0x89:
|
|
sp->controller = PCIC_IBM;
|
|
sp->revision = c & 1;
|
|
break;
|
|
case 0x8a:
|
|
sp->controller = PCIC_IBM_KING;
|
|
sp->revision = c & 1;
|
|
break;
|
|
default:
|
|
continue;
|
|
}
|
|
/*
|
|
* Check for Cirrus logic chips.
|
|
*/
|
|
sp->putb(sp, 0x1F, 0);
|
|
c = sp->getb(sp, 0x1F);
|
|
if ((c & 0xC0) == 0xC0) {
|
|
c = sp->getb(sp, 0x1F);
|
|
if ((c & 0xC0) == 0) {
|
|
if (c & 0x20)
|
|
sp->controller = PCIC_PD672X;
|
|
else
|
|
sp->controller = PCIC_PD6710;
|
|
sp->revision = 8 - ((c & 0x1F) >> 2);
|
|
}
|
|
}
|
|
switch(sp->controller) {
|
|
case PCIC_I82365:
|
|
cinfo.name = "Intel 82365";
|
|
break;
|
|
case PCIC_IBM:
|
|
cinfo.name = "IBM PCIC";
|
|
break;
|
|
case PCIC_IBM_KING:
|
|
cinfo.name = "IBM KING PCMCIA Controller";
|
|
break;
|
|
case PCIC_PD672X:
|
|
cinfo.name = "Cirrus Logic PD672X";
|
|
break;
|
|
case PCIC_PD6710:
|
|
cinfo.name = "Cirrus Logic PD6710";
|
|
break;
|
|
case PCIC_VG365:
|
|
cinfo.name = "Vadem 365";
|
|
break;
|
|
case PCIC_VG465:
|
|
cinfo.name = "Vadem 465";
|
|
break;
|
|
case PCIC_VG468:
|
|
cinfo.name = "Vadem 468";
|
|
break;
|
|
case PCIC_VG469:
|
|
cinfo.name = "Vadem 469";
|
|
break;
|
|
case PCIC_RF5C396:
|
|
cinfo.name = "Ricoh RF5C396";
|
|
break;
|
|
case PCIC_VLSI:
|
|
cinfo.name = "VLSI 82C146";
|
|
break;
|
|
default:
|
|
cinfo.name = "Unknown!";
|
|
break;
|
|
}
|
|
/*
|
|
* OK it seems we have a PCIC or lookalike.
|
|
* Allocate a slot and initialise the data structures.
|
|
*/
|
|
validslots++;
|
|
sp->slotnum = slotnum;
|
|
slt = pccard_alloc_slot(&cinfo);
|
|
if (slt == 0)
|
|
continue;
|
|
slt->cdata = sp;
|
|
sp->slt = slt;
|
|
/*
|
|
* If we haven't allocated an interrupt for the controller,
|
|
* then attempt to get one.
|
|
*/
|
|
if (pcic_irq == 0) {
|
|
pcic_imask = soft_imask;
|
|
pcic_irq = pccard_alloc_intr(free_irqs,
|
|
pcicintr, 0, &pcic_imask, NULL);
|
|
if (pcic_irq < 0)
|
|
printf("pcic: failed to allocate IRQ\n");
|
|
else
|
|
printf("pcic: controller irq %d\n", pcic_irq);
|
|
}
|
|
/*
|
|
* Modem cards send the speaker audio (dialing noises)
|
|
* to the host's speaker. Cirrus Logic PCIC chips must
|
|
* enable this. There is also a Low Power Dynamic Mode bit
|
|
* that claims to reduce power consumption by 30%, so
|
|
* enable it and hope for the best.
|
|
*/
|
|
if (sp->controller == PCIC_PD672X) {
|
|
setb(sp, PCIC_MISC1, PCIC_SPKR_EN);
|
|
setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
|
|
}
|
|
/*
|
|
* Check for a card in this slot.
|
|
*/
|
|
setb(sp, PCIC_POWER, PCIC_PCPWRE| PCIC_DISRST);
|
|
if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) != PCIC_CD) {
|
|
slt->laststate = slt->state = empty;
|
|
} else {
|
|
slt->laststate = slt->state = filled;
|
|
pccard_event(sp->slt, card_inserted);
|
|
}
|
|
/*
|
|
* Assign IRQ for slot changes
|
|
*/
|
|
if (pcic_irq > 0)
|
|
sp->putb(sp, PCIC_STAT_INT, (pcic_irq << 4) | 0xF);
|
|
}
|
|
#ifdef PC98
|
|
if (validslots == 0) {
|
|
sp = pcic_slots;
|
|
slotnum = 0;
|
|
if (inb(PCIC98_REG0) != 0xff) {
|
|
sp->controller = PCIC_PC98;
|
|
sp->revision = 0;
|
|
cinfo.name = "PC98 Original";
|
|
cinfo.maxmem = 1;
|
|
cinfo.maxio = 1;
|
|
/* cinfo.irqs = PCIC_INT_MASK_ALLOWED;*/
|
|
cinfo.irqs = 0x1468;
|
|
validslots++;
|
|
sp->slotnum = slotnum;
|
|
|
|
slt = pccard_alloc_slot(&cinfo);
|
|
if (slt == 0) {
|
|
printf("pcic98: slt == NULL\n");
|
|
goto pcic98_probe_end;
|
|
}
|
|
slt->cdata = sp;
|
|
sp->slt = slt;
|
|
|
|
/* Check for a card in this slot */
|
|
if (inb(PCIC98_REG1) & PCIC98_CARDEXIST) {
|
|
/* PCMCIA card exist */
|
|
slt->laststate = slt->state = filled;
|
|
pccard_event(sp->slt, card_inserted);
|
|
} else {
|
|
slt->laststate = slt->state = empty;
|
|
}
|
|
}
|
|
pcic98_probe_end:
|
|
}
|
|
#endif /* PC98 */
|
|
if (validslots && pcic_irq <= 0)
|
|
pcictimeout_ch = timeout(pcictimeout, 0, hz/2);
|
|
return(validslots);
|
|
}
|
|
|
|
/*
|
|
* ioctl calls - Controller specific ioctls
|
|
*/
|
|
static int
|
|
pcic_ioctl(struct slot *slt, int cmd, caddr_t data)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
switch(cmd) {
|
|
default:
|
|
return(EINVAL);
|
|
/*
|
|
* Get/set PCIC registers
|
|
*/
|
|
case PIOCGREG:
|
|
((struct pcic_reg *)data)->value =
|
|
sp->getb(sp, ((struct pcic_reg *)data)->reg);
|
|
break;
|
|
case PIOCSREG:
|
|
sp->putb(sp, ((struct pcic_reg *)data)->reg,
|
|
((struct pcic_reg *)data)->value);
|
|
break;
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* pcic_power - Enable the power of the slot according to
|
|
* the parameters in the power structure(s).
|
|
*/
|
|
static int
|
|
pcic_power(struct slot *slt)
|
|
{
|
|
unsigned char reg = PCIC_DISRST|PCIC_PCPWRE;
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
switch(sp->controller) {
|
|
#ifdef PC98
|
|
case PCIC_PC98:
|
|
reg = inb(PCIC98_REG6) & (~PCIC98_VPP12V);
|
|
switch(slt->pwr.vpp) {
|
|
default:
|
|
return(EINVAL);
|
|
case 50:
|
|
break;
|
|
case 120:
|
|
reg |= PCIC98_VPP12V;
|
|
break;
|
|
}
|
|
outb(PCIC98_REG6, reg);
|
|
DELAY(100*1000);
|
|
|
|
reg = inb(PCIC98_REG2) & (~PCIC98_VCC3P3V);
|
|
switch(slt->pwr.vcc) {
|
|
default:
|
|
return(EINVAL);
|
|
case 33:
|
|
reg |= PCIC98_VCC3P3V;
|
|
break;
|
|
case 50:
|
|
break;
|
|
}
|
|
outb(PCIC98_REG2, reg);
|
|
DELAY(100*1000);
|
|
return (0);
|
|
#endif
|
|
case PCIC_PD672X:
|
|
case PCIC_PD6710:
|
|
case PCIC_VG365:
|
|
case PCIC_VG465:
|
|
case PCIC_VG468:
|
|
case PCIC_VG469:
|
|
case PCIC_RF5C396:
|
|
case PCIC_VLSI:
|
|
case PCIC_IBM_KING:
|
|
switch(slt->pwr.vpp) {
|
|
default:
|
|
return(EINVAL);
|
|
case 0:
|
|
break;
|
|
case 50:
|
|
case 33:
|
|
reg |= PCIC_VPP_5V;
|
|
break;
|
|
case 120:
|
|
reg |= PCIC_VPP_12V;
|
|
break;
|
|
}
|
|
switch(slt->pwr.vcc) {
|
|
default:
|
|
return(EINVAL);
|
|
case 0:
|
|
break;
|
|
case 33:
|
|
if (sp->controller == PCIC_IBM_KING) {
|
|
reg |= PCIC_VCC_5V_KING;
|
|
break;
|
|
}
|
|
reg |= PCIC_VCC_3V;
|
|
if ((sp->controller == PCIC_VG468) ||
|
|
(sp->controller == PCIC_VG469) ||
|
|
(sp->controller == PCIC_VG465) ||
|
|
(sp->controller == PCIC_VG365))
|
|
setb(sp, 0x2f, 0x03) ;
|
|
else
|
|
setb(sp, 0x16, 0x02);
|
|
break;
|
|
case 50:
|
|
if (sp->controller == PCIC_IBM_KING) {
|
|
reg |= PCIC_VCC_5V_KING;
|
|
break;
|
|
}
|
|
reg |= PCIC_VCC_5V;
|
|
if ((sp->controller == PCIC_VG468) ||
|
|
(sp->controller == PCIC_VG469) ||
|
|
(sp->controller == PCIC_VG465) ||
|
|
(sp->controller == PCIC_VG365))
|
|
clrb(sp, 0x2f, 0x03) ;
|
|
else
|
|
clrb(sp, 0x16, 0x02);
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
sp->putb(sp, PCIC_POWER, reg);
|
|
DELAY(300*1000);
|
|
if (slt->pwr.vcc) {
|
|
reg |= PCIC_OUTENA;
|
|
sp->putb(sp, PCIC_POWER, reg);
|
|
DELAY(100*1000);
|
|
}
|
|
/* Some chips are smarter than us it seems, so if we weren't
|
|
* allowed to use 5V, try 3.3 instead
|
|
*/
|
|
if (!(sp->getb(sp, PCIC_STATUS) & 0x40) && slt->pwr.vcc == 50) {
|
|
slt->pwr.vcc = 33;
|
|
slt->pwr.vpp = 0;
|
|
return (pcic_power(slt));
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* tell the PCIC which irq we want to use. only the following are legal:
|
|
* 3, 4, 5, 7, 9, 10, 11, 12, 14, 15
|
|
*/
|
|
static void
|
|
pcic_mapirq(struct slot *slt, int irq)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
#ifdef PC98
|
|
if (sp->controller == PCIC_PC98) {
|
|
unsigned char x;
|
|
switch (irq) {
|
|
case 3:
|
|
x = PCIC98_INT0; break;
|
|
case 5:
|
|
x = PCIC98_INT1; break;
|
|
case 6:
|
|
x = PCIC98_INT2; break;
|
|
case 10:
|
|
x = PCIC98_INT4; break;
|
|
case 12:
|
|
x = PCIC98_INT5; break;
|
|
case 0: /* disable */
|
|
x = PCIC98_INTDISABLE;
|
|
break;
|
|
default:
|
|
printf("pcic98: illegal irq %d\n", irq);
|
|
return;
|
|
}
|
|
#ifdef PCIC_DEBUG
|
|
printf("pcic98: irq=%d mapped.\n", irq);
|
|
#endif
|
|
outb(PCIC98_REG3, x);
|
|
|
|
return;
|
|
}
|
|
#endif
|
|
if (irq == 0)
|
|
clrb(sp, PCIC_INT_GEN, 0xF);
|
|
else
|
|
sp->putb(sp, PCIC_INT_GEN,
|
|
(sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq);
|
|
}
|
|
|
|
/*
|
|
* pcic_reset - Reset the card and enable initial power.
|
|
*/
|
|
static void
|
|
pcic_reset(void *chan)
|
|
{
|
|
struct slot *slt = chan;
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
#ifdef PC98
|
|
if (sp->controller == PCIC_PC98) {
|
|
outb(PCIC98_REG0, 0);
|
|
outb(PCIC98_REG2, inb(PCIC98_REG2) & (~PCIC98_IOMEMORY));
|
|
outb(PCIC98_REG3, PCIC98_INTDISABLE);
|
|
outb(PCIC98_REG2, inb(PCIC98_REG2) & (~PCIC98_VCC3P3V));
|
|
outb(PCIC98_REG6, inb(PCIC98_REG6) & (~PCIC98_VPP12V));
|
|
outb(PCIC98_REG1, 0);
|
|
|
|
selwakeup(&slt->selp);
|
|
return;
|
|
}
|
|
#endif
|
|
switch (slt->insert_seq) {
|
|
case 0: /* Something funny happended on the way to the pub... */
|
|
return;
|
|
case 1: /* Assert reset */
|
|
clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET);
|
|
slt->insert_seq = 2;
|
|
timeout(pcic_reset, (void *)slt, hz/4);
|
|
return;
|
|
case 2: /* Deassert it again */
|
|
setb(sp, PCIC_INT_GEN, PCIC_CARDRESET|PCIC_IOCARD);
|
|
slt->insert_seq = 3;
|
|
timeout(pcic_reset, (void *)slt, hz/4);
|
|
return;
|
|
case 3: /* Wait if card needs more time */
|
|
if (!sp->getb(sp, PCIC_STATUS) & PCIC_READY) {
|
|
timeout(pcic_reset, (void *)slt, hz/10);
|
|
return;
|
|
}
|
|
}
|
|
slt->insert_seq = 0;
|
|
if (sp->controller == PCIC_PD672X || sp->controller == PCIC_PD6710) {
|
|
sp->putb(sp, PCIC_TIME_SETUP0, 0x1);
|
|
sp->putb(sp, PCIC_TIME_CMD0, 0x6);
|
|
sp->putb(sp, PCIC_TIME_RECOV0, 0x0);
|
|
sp->putb(sp, PCIC_TIME_SETUP1, 1);
|
|
sp->putb(sp, PCIC_TIME_CMD1, 0xf);
|
|
sp->putb(sp, PCIC_TIME_RECOV1, 0);
|
|
}
|
|
selwakeup(&slt->selp);
|
|
}
|
|
|
|
/*
|
|
* pcic_disable - Disable the slot.
|
|
*/
|
|
static void
|
|
pcic_disable(struct slot *slt)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
#ifdef PC98
|
|
if (sp->controller == PCIC_PC98) {
|
|
return;
|
|
}
|
|
#endif
|
|
sp->putb(sp, PCIC_INT_GEN, 0);
|
|
sp->putb(sp, PCIC_POWER, 0);
|
|
}
|
|
|
|
/*
|
|
* PCIC timer. If the controller doesn't have a free IRQ to use
|
|
* or if interrupt steering doesn't work, poll the controller for
|
|
* insertion/removal events.
|
|
*/
|
|
static void
|
|
pcictimeout(void *chan)
|
|
{
|
|
pcicintr(NULL);
|
|
pcictimeout_ch = timeout(pcictimeout, 0, hz/2);
|
|
}
|
|
|
|
/*
|
|
* PCIC Interrupt handler.
|
|
* Check each slot in turn, and read the card status change
|
|
* register. If this is non-zero, then a change has occurred
|
|
* on this card, so send an event to the main code.
|
|
*/
|
|
static void
|
|
pcicintr(void *unused)
|
|
{
|
|
int slot, s;
|
|
unsigned char chg;
|
|
struct pcic_slot *sp = pcic_slots;
|
|
|
|
#ifdef PC98
|
|
if (sp->controller == PCIC_PC98) {
|
|
slot = 0;
|
|
s = splhigh();
|
|
/* Check for a card in this slot */
|
|
if (inb(PCIC98_REG1) & PCIC98_CARDEXIST) {
|
|
if (sp->slt->laststate != filled) {
|
|
pccard_event(sp->slt, card_inserted);
|
|
}
|
|
} else {
|
|
if (sp->slt->laststate != empty) {
|
|
pccard_event(sp->slt, card_removed);
|
|
}
|
|
}
|
|
splx(s);
|
|
return;
|
|
}
|
|
#endif /* PC98 */
|
|
s = splhigh();
|
|
for (slot = 0; slot < PCIC_MAX_SLOTS; slot++, sp++)
|
|
if (sp->slt && (chg = sp->getb(sp, PCIC_STAT_CHG)) != 0)
|
|
if (chg & PCIC_CDTCH) {
|
|
if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) ==
|
|
PCIC_CD) {
|
|
pccard_event(sp->slt, card_inserted);
|
|
} else {
|
|
pccard_event(sp->slt, card_removed);
|
|
}
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* pcic_resume - Suspend/resume support for PCIC
|
|
*/
|
|
static void
|
|
pcic_resume(struct slot *slt)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
if (pcic_irq > 0)
|
|
sp->putb(sp, PCIC_STAT_INT, (pcic_irq << 4) | 0xF);
|
|
if (sp->controller == PCIC_PD672X) {
|
|
setb(sp, PCIC_MISC1, PCIC_SPKR_EN);
|
|
setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
|
|
}
|
|
}
|