67f06b6142
1) Make the driver "quiet" by sticking most boot messages behind bootverbose conditionals. This means that you won't see the sync and wide negotiation, but you will find out if they fail. 2) Add support to the 93cx6 serial eeprom code to read at an abitrary offset. This is needed so that we can access the second half of the eeprom on 3940 cards where the second channel's config is stored. 3) Add flags argument to ahcprobe(). This is used by the pci probe code to tell the generic driver that an adapter should be treated as a channel B device as well as notify it of the presence of external SCB SRAM. These are needed for some motherboard implementations of the aic7870 and for the 3940 controllers. 4) Print "Channel A"/"Channel B" instead of "Single Channel" for the two busses of the 3940. I received many reports of confusion about how the 3940 was probed since most people belived that only one ahc entry was needed. This will hopefully make it clearer. 5) Walk the SCBs to determine just how many their are if external SCB ram is detected. 6) Hard code that external SCB ram is present for the 3940 since it doesn't use the documented reporting facility for reporting the SRAM. :( 255 commands per channel are supported on the 3940. 7) Read the seeprom starting at addres 32 for the second channel of the 3940 so we get the right info for that channel. 8) Clean up printing of the "Disabling tagged queuing message". 9) Queue timeouts if they occur while we are handling a timeout. The code was totally unprotected in this scenario. Reviewed by: Timeout code reviewed by David Greenman <davidg>
180 lines
6.0 KiB
C
180 lines
6.0 KiB
C
/*
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* Interface to the generic driver for the aic7xxx based adaptec
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* SCSI controllers. This is used to implement product specific
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* probe and attach routines.
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*
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* Copyright (c) 1994, 1995 Justin T. Gibbs.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Absolutely no warranty of function or purpose is made by the author
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* Justin T. Gibbs.
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* 4. Modifications may be freely made to this file if the above conditions
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* are met.
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*
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* $Id: aic7xxx.h,v 1.12 1995/08/05 17:32:55 gibbs Exp $
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*/
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#ifndef _AIC7XXX_H_
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#define _AIC7XXX_H_
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#include "ahc.h" /* for NAHC from config */
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#define AHC_NSEG 256 /* number of dma segments supported */
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#define AHC_SCB_MAX 255 /*
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* Up to 255 SCBs on some types of aic7xxx
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* based boards. The aic7870 have 16 internal
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* SCBs, but external SRAM bumps this to 255.
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* The aic7770 family have only 4, and the
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* aic7850 have only 3.
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*/
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/* #define AHCDEBUG */
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extern int bootverbose;
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typedef unsigned long int physaddr;
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extern int ahc_unit;
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struct ahc_dma_seg {
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physaddr addr;
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long len;
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};
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typedef enum {
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AHC_NONE = 0x000,
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AHC_WIDE = 0x002, /* Wide Channel */
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AHC_TWIN = 0x008, /* Twin Channel */
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AHC_AIC7770 = 0x010,
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AHC_AIC7850 = 0x020,
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AHC_AIC7870 = 0x040,
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AHC_AIC78X0 = 0x060, /* PCI Based Controller */
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AHC_274 = 0x110, /* EISA Based Controller */
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AHC_284 = 0x210, /* VL/ISA Based Controller */
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AHC_294 = 0x440, /* PCI Based Controller */
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AHC_394 = 0x840 /* Twin Channel PCI Controller */
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}ahc_type;
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typedef enum {
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AHC_FNONE = 0x00,
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AHC_INIT = 0x01,
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AHC_RUNNING = 0x02,
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AHC_EXTSCB = 0x10, /* External SCBs present */
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AHC_CHNLB = 0x20, /*
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* Second controller on 3940
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* Also encodes the offset in the
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* SEEPROM for CHNLB info (32)
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*/
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}ahc_flag;
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/*
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* The driver keeps up to MAX_SCB scb structures per card in memory. Only the
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* first 26 bytes of the structure are valid for the hardware, the rest used
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* for driver level bookeeping. The "__attribute ((packed))" tags ensure that
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* gcc does not attempt to pad the long ints in the structure to word
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* boundaries since the first 26 bytes of this structure must have the correct
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* offsets for the hardware to find them. The driver is further optimized
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* so that we only have to download the first 19 bytes since as long
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* as we always use S/G, the last fields should be zero anyway.
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*/
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struct scb {
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/* ------------ Begin hardware supported fields ---------------- */
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/*1*/ u_char control;
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#define SCB_NEEDWDTR 0x80 /* Initiate Wide Negotiation */
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#define SCB_DISCENB 0x40 /* Disconnection Enable */
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#define SCB_TE 0x20 /* Tag enable */
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#define SCB_NEEDSDTR 0x10 /* Initiate Sync Negotiation */
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#define SCB_NEEDDMA 0x08 /* Refresh SCB from host ram */
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#define SCB_DIS 0x04
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#define SCB_TAG_TYPE 0x03
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#define SIMPLE_QUEUE 0x00
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#define HEAD_QUEUE 0x01
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#define OR_QUEUE 0x02
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/*2*/ u_char target_channel_lun; /* 4/1/3 bits */
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/*3*/ u_char SG_segment_count;
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/*7*/ physaddr SG_list_pointer __attribute__ ((packed));
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/*11*/ physaddr cmdpointer __attribute__ ((packed));
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/*12*/ u_char cmdlen;
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/*14*/ u_char RESERVED[2]; /* must be zero */
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/*15*/ u_char target_status;
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/*18*/ u_char residual_data_count[3];
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/*19*/ u_char residual_SG_segment_count;
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/*23*/ physaddr data __attribute__ ((packed));
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/*26*/ u_char datalen[3];
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#define SCB_DOWN_SIZE 26 /* amount to actually download */
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#define SCB_UP_SIZE 26 /*
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* amount we need to upload to perform
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* a request sense.
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*/
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/*30*/ physaddr host_scb __attribute__ ((packed));
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/*31*/ u_char next_waiting; /* Used to thread SCBs awaiting
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* selection
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*/
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#define SCB_LIST_NULL 0xff /* SCB list equivelent to NULL */
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#if 0
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/*
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* No real point in transferring this to the
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* SCB registers.
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*/
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unsigned char RESERVED[1];
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#endif
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/*-----------------end of hardware supported fields----------------*/
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struct scb *next; /* in free list */
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struct scsi_xfer *xs; /* the scsi_xfer for this cmd */
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int flags;
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#define SCB_FREE 0x00
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#define SCB_ACTIVE 0x01
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#define SCB_ABORTED 0x02
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#define SCB_DEVICE_RESET 0x04
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#define SCB_IMMED 0x08
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#define SCB_SENSE 0x10
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int position; /* Position in scbarray */
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struct ahc_dma_seg ahc_dma[AHC_NSEG] __attribute__ ((packed));
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struct scsi_sense sense_cmd; /* SCSI command block */
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};
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struct ahc_data {
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ahc_type type;
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ahc_flag flags;
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u_long baseport;
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struct scb *scbarray[AHC_SCB_MAX]; /* Mirror boards scbarray */
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struct scb *free_scb;
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struct scb *timedout_scb;
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int in_timeout;
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int our_id; /* our scsi id */
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int our_id_b; /* B channel scsi id */
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int vect;
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struct scb *immed_ecb; /* an outstanding immediete command */
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struct scsi_link sc_link;
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struct scsi_link sc_link_b; /* Second bus for Twin channel cards */
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u_short needsdtr_orig; /* Targets we initiate sync neg with */
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u_short needwdtr_orig; /* Targets we initiate wide neg with */
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u_short needsdtr; /* Current list of negotiated targets */
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u_short needwdtr; /* Current list of negotiated targets */
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u_short sdtrpending; /* Pending SDTR to these targets */
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u_short wdtrpending; /* Pending WDTR to these targets */
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u_short tagenable; /* Targets that can handle tagqueing */
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u_short discenable; /* Targets allowed to disconnect */
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int numscbs;
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int activescbs;
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u_char maxscbs;
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u_char unpause;
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u_char pause;
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};
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extern struct ahc_data *ahcdata[NAHC];
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int ahcprobe __P((int unit, u_long io_base, ahc_type type, ahc_flag flags));
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int ahc_attach __P((int unit));
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int ahcintr();
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#endif /* _AIC7XXX_H_ */
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