9efd0ba788
Add support for pci deviceID 0x8070 for QLE41xxx product line which supports 10GbE/25GbE/40GbE MFC after:5 days
1454 lines
43 KiB
C
1454 lines
43 KiB
C
/*
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* Copyright (c) 2017-2018 Cavium, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* File : ecore_dcbx.c
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "bcm_osal.h"
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#include "ecore.h"
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#include "ecore_sp_commands.h"
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#include "ecore_dcbx.h"
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#include "ecore_cxt.h"
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#include "ecore_gtt_reg_addr.h"
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#include "ecore_iro.h"
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#ifdef CONFIG_ECORE_ROCE
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#include "ecore_roce.h"
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#endif
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#include "ecore_iov_api.h"
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#define ECORE_DCBX_MAX_MIB_READ_TRY (100)
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#define ECORE_ETH_TYPE_DEFAULT (0)
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#define ECORE_ETH_TYPE_ROCE (0x8915)
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#define ECORE_UDP_PORT_TYPE_ROCE_V2 (0x12B7)
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#define ECORE_ETH_TYPE_FCOE (0x8906)
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#define ECORE_TCP_PORT_ISCSI (0xCBC)
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#define ECORE_DCBX_INVALID_PRIORITY 0xFF
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/* Get Traffic Class from priority traffic class table, 4 bits represent
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* the traffic class corresponding to the priority.
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*/
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#define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
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((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
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static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
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{
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return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
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DCBX_APP_SF_ETHTYPE);
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}
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static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
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{
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u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
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/* Old MFW */
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if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
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return ecore_dcbx_app_ethtype(app_info_bitmap);
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return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
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}
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static bool ecore_dcbx_app_port(u32 app_info_bitmap)
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{
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return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
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DCBX_APP_SF_PORT);
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}
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static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
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{
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u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
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/* Old MFW */
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if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
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return ecore_dcbx_app_port(app_info_bitmap);
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return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
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}
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static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
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{
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bool ethtype;
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if (ieee)
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ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
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else
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ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
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return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT));
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}
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static bool ecore_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
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{
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bool port;
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if (ieee)
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port = ecore_dcbx_ieee_app_port(app_info_bitmap,
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DCBX_APP_SF_IEEE_TCP_PORT);
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else
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port = ecore_dcbx_app_port(app_info_bitmap);
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return !!(port && (proto_id == ECORE_TCP_PORT_ISCSI));
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}
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static bool ecore_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
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{
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bool ethtype;
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if (ieee)
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ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
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else
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ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
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return !!(ethtype && (proto_id == ECORE_ETH_TYPE_FCOE));
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}
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static bool ecore_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
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{
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bool ethtype;
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if (ieee)
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ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
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else
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ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
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return !!(ethtype && (proto_id == ECORE_ETH_TYPE_ROCE));
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}
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static bool ecore_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
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{
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bool port;
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if (ieee)
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port = ecore_dcbx_ieee_app_port(app_info_bitmap,
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DCBX_APP_SF_IEEE_UDP_PORT);
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else
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port = ecore_dcbx_app_port(app_info_bitmap);
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return !!(port && (proto_id == ECORE_UDP_PORT_TYPE_ROCE_V2));
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}
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static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap,
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u16 proto_id, bool ieee)
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{
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bool port;
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if (!p_hwfn->p_dcbx_info->iwarp_port)
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return false;
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if (ieee)
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port = ecore_dcbx_ieee_app_port(app_info_bitmap,
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DCBX_APP_SF_IEEE_TCP_PORT);
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else
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port = ecore_dcbx_app_port(app_info_bitmap);
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return !!(port && (proto_id == p_hwfn->p_dcbx_info->iwarp_port));
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}
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static void
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ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
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struct ecore_dcbx_results *p_data)
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{
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enum dcbx_protocol_type id;
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int i;
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DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n",
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p_data->dcbx_enabled);
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for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
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id = ecore_dcbx_app_update[i].id;
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DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
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"%s info: update %d, enable %d, prio %d, tc %d, num_active_tc %d dscp_enable = %d dscp_val = %d\n",
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ecore_dcbx_app_update[i].name, p_data->arr[id].update,
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p_data->arr[id].enable, p_data->arr[id].priority,
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p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc,
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p_data->arr[id].dscp_enable,
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p_data->arr[id].dscp_val);
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}
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}
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static void
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ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
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struct ecore_hwfn *p_hwfn,
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bool enable, u8 prio, u8 tc,
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enum dcbx_protocol_type type,
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enum ecore_pci_personality personality)
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{
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struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
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/* PF update ramrod data */
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p_data->arr[type].enable = enable;
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p_data->arr[type].priority = prio;
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p_data->arr[type].tc = tc;
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p_data->arr[type].dscp_enable = dscp->enabled;
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if (p_data->arr[type].dscp_enable) {
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u8 i;
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for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
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if (prio == dscp->dscp_pri_map[i]) {
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p_data->arr[type].dscp_val = i;
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break;
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}
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}
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if (enable && p_data->arr[type].dscp_enable)
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p_data->arr[type].update = UPDATE_DCB_DSCP;
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else if (enable)
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p_data->arr[type].update = UPDATE_DCB;
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else
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p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
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/* QM reconf data */
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if (p_hwfn->hw_info.personality == personality)
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p_hwfn->hw_info.offload_tc = tc;
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}
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/* Update app protocol data and hw_info fields with the TLV info */
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static void
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ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
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struct ecore_hwfn *p_hwfn,
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bool enable, u8 prio, u8 tc,
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enum dcbx_protocol_type type)
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{
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enum ecore_pci_personality personality;
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enum dcbx_protocol_type id;
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int i;
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for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
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id = ecore_dcbx_app_update[i].id;
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if (type != id)
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continue;
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personality = ecore_dcbx_app_update[i].personality;
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ecore_dcbx_set_params(p_data, p_hwfn, enable,
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prio, tc, type, personality);
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}
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}
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static enum _ecore_status_t
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ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
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{
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u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
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u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
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enum _ecore_status_t rc = ECORE_SUCCESS;
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/* Bitmap 1 corresponds to priority 0, return priority 0 */
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if (pri_bitmap == 1) {
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*priority = 0;
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return rc;
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}
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/* Choose the highest priority */
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while ((ECORE_MAX_PFC_PRIORITIES == pri) && index) {
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pri_mask = 1 << index;
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if (pri_bitmap & pri_mask)
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pri = index;
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index--;
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}
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if (pri < ECORE_MAX_PFC_PRIORITIES)
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*priority = (u8)pri;
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else
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rc = ECORE_INVAL;
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return rc;
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}
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static bool
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ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
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u32 app_prio_bitmap, u16 id,
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enum dcbx_protocol_type *type, bool ieee)
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{
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if (ecore_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
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*type = DCBX_PROTOCOL_FCOE;
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} else if (ecore_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
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*type = DCBX_PROTOCOL_ROCE;
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} else if (ecore_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
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*type = DCBX_PROTOCOL_ISCSI;
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} else if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
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*type = DCBX_PROTOCOL_ETH;
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} else if (ecore_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
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*type = DCBX_PROTOCOL_ROCE_V2;
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} else if (ecore_dcbx_iwarp_tlv(p_hwfn, app_prio_bitmap, id, ieee)) {
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*type = DCBX_PROTOCOL_IWARP;
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} else {
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*type = DCBX_MAX_PROTOCOL_TYPE;
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DP_ERR(p_hwfn,
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"No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n",
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id, app_prio_bitmap);
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return false;
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}
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return true;
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}
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/* Parse app TLV's to update TC information in hw_info structure for
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* reconfiguring QM. Get protocol specific data for PF update ramrod command.
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*/
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static enum _ecore_status_t
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ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
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struct ecore_dcbx_results *p_data,
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struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
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int count, u8 dcbx_version)
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{
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enum dcbx_protocol_type type;
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u8 tc, priority_map;
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bool enable, ieee;
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u16 protocol_id;
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u8 priority;
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enum _ecore_status_t rc = ECORE_SUCCESS;
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int i;
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DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
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"Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n",
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count, pri_tc_tbl, dcbx_version);
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ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
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/* Parse APP TLV */
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for (i = 0; i < count; i++) {
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protocol_id = GET_MFW_FIELD(p_tbl[i].entry,
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DCBX_APP_PROTOCOL_ID);
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priority_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
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DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n",
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protocol_id, priority_map);
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rc = ecore_dcbx_get_app_priority(priority_map, &priority);
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if (rc == ECORE_INVAL) {
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DP_ERR(p_hwfn, "Invalid priority\n");
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return ECORE_INVAL;
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}
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tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
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if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
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protocol_id, &type,
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ieee)) {
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/* ETH always have the enable bit reset, as it gets
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* vlan information per packet. For other protocols,
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* should be set according to the dcbx_enabled
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* indication, but we only got here if there was an
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* app tlv for the protocol, so dcbx must be enabled.
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*/
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enable = !(type == DCBX_PROTOCOL_ETH);
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ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
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priority, tc, type);
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}
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}
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/* Update ramrod protocol data and hw_info fields
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* with default info when corresponding APP TLV's are not detected.
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* The enabled field has a different logic for ethernet as only for
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* ethernet dcb should disabled by default, as the information arrives
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* from the OS (unless an explicit app tlv was present).
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*/
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tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
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priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
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for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
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if (p_data->arr[type].update)
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continue;
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enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
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ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
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priority, tc, type);
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}
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return ECORE_SUCCESS;
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}
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/* Parse app TLV's to update TC information in hw_info structure for
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* reconfiguring QM. Get protocol specific data for PF update ramrod command.
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*/
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static enum _ecore_status_t
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ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
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{
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struct dcbx_app_priority_feature *p_app;
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struct dcbx_app_priority_entry *p_tbl;
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struct ecore_dcbx_results data = { 0 };
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struct dcbx_ets_feature *p_ets;
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struct ecore_hw_info *p_info;
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u32 pri_tc_tbl, flags;
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u8 dcbx_version;
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int num_entries;
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enum _ecore_status_t rc = ECORE_SUCCESS;
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flags = p_hwfn->p_dcbx_info->operational.flags;
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dcbx_version = GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION);
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p_app = &p_hwfn->p_dcbx_info->operational.features.app;
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p_tbl = p_app->app_pri_tbl;
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p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
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pri_tc_tbl = p_ets->pri_tc_tbl[0];
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p_info = &p_hwfn->hw_info;
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num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
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rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
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num_entries, dcbx_version);
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if (rc != ECORE_SUCCESS)
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return rc;
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p_info->num_active_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
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p_hwfn->qm_info.ooo_tc = GET_MFW_FIELD(p_ets->flags, DCBX_OOO_TC);
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data.pf_id = p_hwfn->rel_pf_id;
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data.dcbx_enabled = !!dcbx_version;
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ecore_dcbx_dp_protocol(p_hwfn, &data);
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OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
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sizeof(struct ecore_dcbx_results));
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return ECORE_SUCCESS;
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}
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static enum _ecore_status_t
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ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
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struct ecore_ptt *p_ptt,
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struct ecore_dcbx_mib_meta_data *p_data,
|
|
enum ecore_mib_read_type type)
|
|
{
|
|
u32 prefix_seq_num, suffix_seq_num;
|
|
int read_count = 0;
|
|
enum _ecore_status_t rc = ECORE_SUCCESS;
|
|
|
|
/* The data is considered to be valid only if both sequence numbers are
|
|
* the same.
|
|
*/
|
|
do {
|
|
if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
|
|
ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
|
|
p_data->addr, p_data->size);
|
|
prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
|
|
suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
|
|
} else {
|
|
ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
|
|
p_data->addr, p_data->size);
|
|
prefix_seq_num = p_data->mib->prefix_seq_num;
|
|
suffix_seq_num = p_data->mib->suffix_seq_num;
|
|
}
|
|
read_count++;
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
|
|
type, read_count, prefix_seq_num, suffix_seq_num);
|
|
} while ((prefix_seq_num != suffix_seq_num) &&
|
|
(read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
|
|
|
|
if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
|
|
DP_ERR(p_hwfn,
|
|
"MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
|
|
type, read_count, prefix_seq_num, suffix_seq_num);
|
|
rc = ECORE_IO;
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_app_prio *p_prio,
|
|
struct ecore_dcbx_results *p_results)
|
|
{
|
|
u8 val;
|
|
|
|
p_prio->roce = ECORE_DCBX_INVALID_PRIORITY;
|
|
p_prio->roce_v2 = ECORE_DCBX_INVALID_PRIORITY;
|
|
p_prio->iscsi = ECORE_DCBX_INVALID_PRIORITY;
|
|
p_prio->fcoe = ECORE_DCBX_INVALID_PRIORITY;
|
|
|
|
if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
|
|
p_results->arr[DCBX_PROTOCOL_ROCE].enable)
|
|
p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
|
|
|
|
if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
|
|
p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
|
|
val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
|
|
p_prio->roce_v2 = val;
|
|
}
|
|
|
|
if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
|
|
p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
|
|
p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
|
|
|
|
if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
|
|
p_results->arr[DCBX_PROTOCOL_FCOE].enable)
|
|
p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
|
|
|
|
if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
|
|
p_results->arr[DCBX_PROTOCOL_ETH].enable)
|
|
p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
|
|
p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
|
|
p_prio->eth);
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
|
|
struct dcbx_app_priority_feature *p_app,
|
|
struct dcbx_app_priority_entry *p_tbl,
|
|
struct ecore_dcbx_params *p_params, bool ieee)
|
|
{
|
|
struct ecore_app_entry *entry;
|
|
u8 pri_map;
|
|
int i;
|
|
|
|
p_params->app_willing = GET_MFW_FIELD(p_app->flags, DCBX_APP_WILLING);
|
|
p_params->app_valid = GET_MFW_FIELD(p_app->flags, DCBX_APP_ENABLED);
|
|
p_params->app_error = GET_MFW_FIELD(p_app->flags, DCBX_APP_ERROR);
|
|
p_params->num_app_entries = GET_MFW_FIELD(p_app->flags,
|
|
DCBX_APP_NUM_ENTRIES);
|
|
for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
|
|
entry = &p_params->app_entry[i];
|
|
if (ieee) {
|
|
u8 sf_ieee;
|
|
u32 val;
|
|
|
|
sf_ieee = GET_MFW_FIELD(p_tbl[i].entry,
|
|
DCBX_APP_SF_IEEE);
|
|
switch (sf_ieee) {
|
|
case DCBX_APP_SF_IEEE_RESERVED:
|
|
/* Old MFW */
|
|
val = GET_MFW_FIELD(p_tbl[i].entry,
|
|
DCBX_APP_SF);
|
|
entry->sf_ieee = val ?
|
|
ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
|
|
ECORE_DCBX_SF_IEEE_ETHTYPE;
|
|
break;
|
|
case DCBX_APP_SF_IEEE_ETHTYPE:
|
|
entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
|
|
break;
|
|
case DCBX_APP_SF_IEEE_TCP_PORT:
|
|
entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
|
|
break;
|
|
case DCBX_APP_SF_IEEE_UDP_PORT:
|
|
entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
|
|
break;
|
|
case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
|
|
entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
|
|
break;
|
|
}
|
|
} else {
|
|
entry->ethtype = !(GET_MFW_FIELD(p_tbl[i].entry,
|
|
DCBX_APP_SF));
|
|
}
|
|
|
|
pri_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
|
|
ecore_dcbx_get_app_priority(pri_map, &entry->prio);
|
|
entry->proto_id = GET_MFW_FIELD(p_tbl[i].entry,
|
|
DCBX_APP_PROTOCOL_ID);
|
|
ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
|
|
entry->proto_id,
|
|
&entry->proto_type, ieee);
|
|
}
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"APP params: willing %d, valid %d error = %d\n",
|
|
p_params->app_willing, p_params->app_valid,
|
|
p_params->app_error);
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
|
|
u32 pfc, struct ecore_dcbx_params *p_params)
|
|
{
|
|
u8 pfc_map;
|
|
|
|
p_params->pfc.willing = GET_MFW_FIELD(pfc, DCBX_PFC_WILLING);
|
|
p_params->pfc.max_tc = GET_MFW_FIELD(pfc, DCBX_PFC_CAPS);
|
|
p_params->pfc.enabled = GET_MFW_FIELD(pfc, DCBX_PFC_ENABLED);
|
|
pfc_map = GET_MFW_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
|
|
p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
|
|
p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
|
|
p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
|
|
p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
|
|
p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
|
|
p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
|
|
p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
|
|
p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
|
|
p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
|
|
p_params->pfc.enabled);
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
|
|
struct dcbx_ets_feature *p_ets,
|
|
struct ecore_dcbx_params *p_params)
|
|
{
|
|
u32 bw_map[2], tsa_map[2], pri_map;
|
|
int i;
|
|
|
|
p_params->ets_willing = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_WILLING);
|
|
p_params->ets_enabled = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_ENABLED);
|
|
p_params->ets_cbs = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_CBS);
|
|
p_params->max_ets_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
|
|
p_params->ets_willing, p_params->ets_enabled,
|
|
p_params->ets_cbs, p_ets->pri_tc_tbl[0],
|
|
p_params->max_ets_tc);
|
|
if (p_params->ets_enabled && !p_params->max_ets_tc)
|
|
{
|
|
p_params->max_ets_tc = ECORE_MAX_PFC_PRIORITIES;
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"ETS params: max_ets_tc is forced to %d\n",
|
|
p_params->max_ets_tc);
|
|
}
|
|
/* 8 bit tsa and bw data corresponding to each of the 8 TC's are
|
|
* encoded in a type u32 array of size 2.
|
|
*/
|
|
bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
|
|
bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
|
|
tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
|
|
tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
|
|
pri_map = p_ets->pri_tc_tbl[0];
|
|
for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
|
|
p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
|
|
p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
|
|
p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"elem %d bw_tbl %x tsa_tbl %x\n",
|
|
i, p_params->ets_tc_bw_tbl[i],
|
|
p_params->ets_tc_tsa_tbl[i]);
|
|
}
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
|
|
struct dcbx_app_priority_feature *p_app,
|
|
struct dcbx_app_priority_entry *p_tbl,
|
|
struct dcbx_ets_feature *p_ets,
|
|
u32 pfc, struct ecore_dcbx_params *p_params,
|
|
bool ieee)
|
|
{
|
|
ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
|
|
ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
|
|
ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_get *params)
|
|
{
|
|
struct dcbx_features *p_feat;
|
|
|
|
p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
|
|
ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
|
|
p_feat->app.app_pri_tbl, &p_feat->ets,
|
|
p_feat->pfc, ¶ms->local.params, false);
|
|
params->local.valid = true;
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_get *params)
|
|
{
|
|
struct dcbx_features *p_feat;
|
|
|
|
p_feat = &p_hwfn->p_dcbx_info->remote.features;
|
|
ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
|
|
p_feat->app.app_pri_tbl, &p_feat->ets,
|
|
p_feat->pfc, ¶ms->remote.params,
|
|
false);
|
|
params->remote.valid = true;
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_get *params)
|
|
{
|
|
struct ecore_dcbx_operational_params *p_operational;
|
|
struct ecore_dcbx_results *p_results;
|
|
struct dcbx_features *p_feat;
|
|
bool enabled, err;
|
|
u32 flags;
|
|
bool val;
|
|
|
|
flags = p_hwfn->p_dcbx_info->operational.flags;
|
|
|
|
/* If DCBx version is non zero, then negotiation
|
|
* was successfuly performed
|
|
*/
|
|
p_operational = ¶ms->operational;
|
|
enabled = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) !=
|
|
DCBX_CONFIG_VERSION_DISABLED);
|
|
if (!enabled) {
|
|
p_operational->enabled = enabled;
|
|
p_operational->valid = false;
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n");
|
|
return ECORE_INVAL;
|
|
}
|
|
|
|
p_feat = &p_hwfn->p_dcbx_info->operational.features;
|
|
p_results = &p_hwfn->p_dcbx_info->results;
|
|
|
|
val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
|
|
DCBX_CONFIG_VERSION_IEEE);
|
|
p_operational->ieee = val;
|
|
|
|
val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
|
|
DCBX_CONFIG_VERSION_CEE);
|
|
p_operational->cee = val;
|
|
|
|
val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
|
|
DCBX_CONFIG_VERSION_STATIC);
|
|
p_operational->local = val;
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"Version support: ieee %d, cee %d, static %d\n",
|
|
p_operational->ieee, p_operational->cee,
|
|
p_operational->local);
|
|
|
|
ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
|
|
p_feat->app.app_pri_tbl, &p_feat->ets,
|
|
p_feat->pfc, ¶ms->operational.params,
|
|
p_operational->ieee);
|
|
ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
|
|
p_results);
|
|
err = GET_MFW_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
|
|
p_operational->err = err;
|
|
p_operational->enabled = enabled;
|
|
p_operational->valid = true;
|
|
|
|
return ECORE_SUCCESS;
|
|
}
|
|
|
|
static void ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_get *params)
|
|
{
|
|
struct ecore_dcbx_dscp_params *p_dscp;
|
|
struct dcb_dscp_map *p_dscp_map;
|
|
int i, j, entry;
|
|
u32 pri_map;
|
|
|
|
p_dscp = ¶ms->dscp;
|
|
p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
|
|
p_dscp->enabled = GET_MFW_FIELD(p_dscp_map->flags, DCB_DSCP_ENABLE);
|
|
|
|
/* MFW encodes 64 dscp entries into 8 element array of u32 entries,
|
|
* where each entry holds the 4bit priority map for 8 dscp entries.
|
|
*/
|
|
for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
|
|
pri_map = OSAL_BE32_TO_CPU(p_dscp_map->dscp_pri_map[i]);
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
|
|
entry, pri_map);
|
|
for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
|
|
p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
|
|
(j * 4)) & 0xf;
|
|
}
|
|
}
|
|
|
|
static void ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_get *params)
|
|
{
|
|
struct lldp_config_params_s *p_local;
|
|
|
|
p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
|
|
|
|
OSAL_MEMCPY(params->lldp_local.local_chassis_id,
|
|
p_local->local_chassis_id,
|
|
OSAL_ARRAY_SIZE(p_local->local_chassis_id));
|
|
OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id,
|
|
OSAL_ARRAY_SIZE(p_local->local_port_id));
|
|
}
|
|
|
|
static void ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_get *params)
|
|
{
|
|
struct lldp_status_params_s *p_remote;
|
|
|
|
p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
|
|
|
|
OSAL_MEMCPY(params->lldp_remote.peer_chassis_id,
|
|
p_remote->peer_chassis_id,
|
|
OSAL_ARRAY_SIZE(p_remote->peer_chassis_id));
|
|
OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
|
|
OSAL_ARRAY_SIZE(p_remote->peer_port_id));
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_get *p_params,
|
|
enum ecore_mib_read_type type)
|
|
{
|
|
switch (type) {
|
|
case ECORE_DCBX_REMOTE_MIB:
|
|
ecore_dcbx_get_remote_params(p_hwfn, p_params);
|
|
break;
|
|
case ECORE_DCBX_LOCAL_MIB:
|
|
ecore_dcbx_get_local_params(p_hwfn, p_params);
|
|
break;
|
|
case ECORE_DCBX_OPERATIONAL_MIB:
|
|
ecore_dcbx_get_operational_params(p_hwfn, p_params);
|
|
break;
|
|
case ECORE_DCBX_REMOTE_LLDP_MIB:
|
|
ecore_dcbx_get_remote_lldp_params(p_hwfn, p_params);
|
|
break;
|
|
case ECORE_DCBX_LOCAL_LLDP_MIB:
|
|
ecore_dcbx_get_local_lldp_params(p_hwfn, p_params);
|
|
break;
|
|
default:
|
|
DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
|
|
return ECORE_INVAL;
|
|
}
|
|
|
|
return ECORE_SUCCESS;
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_ptt *p_ptt)
|
|
{
|
|
struct ecore_dcbx_mib_meta_data data;
|
|
enum _ecore_status_t rc = ECORE_SUCCESS;
|
|
|
|
OSAL_MEM_ZERO(&data, sizeof(data));
|
|
data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
|
|
lldp_config_params);
|
|
data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
|
|
data.size = sizeof(struct lldp_config_params_s);
|
|
ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_ptt *p_ptt,
|
|
enum ecore_mib_read_type type)
|
|
{
|
|
struct ecore_dcbx_mib_meta_data data;
|
|
enum _ecore_status_t rc = ECORE_SUCCESS;
|
|
|
|
OSAL_MEM_ZERO(&data, sizeof(data));
|
|
data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
|
|
lldp_status_params);
|
|
data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
|
|
data.size = sizeof(struct lldp_status_params_s);
|
|
rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_ptt *p_ptt,
|
|
enum ecore_mib_read_type type)
|
|
{
|
|
struct ecore_dcbx_mib_meta_data data;
|
|
enum _ecore_status_t rc = ECORE_SUCCESS;
|
|
|
|
OSAL_MEM_ZERO(&data, sizeof(data));
|
|
data.addr = p_hwfn->mcp_info->port_addr +
|
|
offsetof(struct public_port, operational_dcbx_mib);
|
|
data.mib = &p_hwfn->p_dcbx_info->operational;
|
|
data.size = sizeof(struct dcbx_mib);
|
|
rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_ptt *p_ptt,
|
|
enum ecore_mib_read_type type)
|
|
{
|
|
struct ecore_dcbx_mib_meta_data data;
|
|
enum _ecore_status_t rc = ECORE_SUCCESS;
|
|
|
|
OSAL_MEM_ZERO(&data, sizeof(data));
|
|
data.addr = p_hwfn->mcp_info->port_addr +
|
|
offsetof(struct public_port, remote_dcbx_mib);
|
|
data.mib = &p_hwfn->p_dcbx_info->remote;
|
|
data.size = sizeof(struct dcbx_mib);
|
|
rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
|
|
{
|
|
struct ecore_dcbx_mib_meta_data data;
|
|
enum _ecore_status_t rc = ECORE_SUCCESS;
|
|
|
|
OSAL_MEM_ZERO(&data, sizeof(data));
|
|
data.addr = p_hwfn->mcp_info->port_addr +
|
|
offsetof(struct public_port, local_admin_dcbx_mib);
|
|
data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
|
|
data.size = sizeof(struct dcbx_local_params);
|
|
ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
|
|
data.addr, data.size);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
|
|
{
|
|
struct ecore_dcbx_mib_meta_data data;
|
|
|
|
data.addr = p_hwfn->mcp_info->port_addr +
|
|
offsetof(struct public_port, dcb_dscp_map);
|
|
data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
|
|
data.size = sizeof(struct dcb_dscp_map);
|
|
ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
|
|
}
|
|
|
|
static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_ptt *p_ptt,
|
|
enum ecore_mib_read_type type)
|
|
{
|
|
enum _ecore_status_t rc = ECORE_INVAL;
|
|
|
|
switch (type) {
|
|
case ECORE_DCBX_OPERATIONAL_MIB:
|
|
ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
|
|
rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
|
|
break;
|
|
case ECORE_DCBX_REMOTE_MIB:
|
|
rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
|
|
break;
|
|
case ECORE_DCBX_LOCAL_MIB:
|
|
rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
|
|
break;
|
|
case ECORE_DCBX_REMOTE_LLDP_MIB:
|
|
rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
|
|
break;
|
|
case ECORE_DCBX_LOCAL_LLDP_MIB:
|
|
rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
|
|
break;
|
|
default:
|
|
DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
/*
|
|
* Read updated MIB.
|
|
* Reconfigure QM and invoke PF update ramrod command if operational MIB
|
|
* change is detected.
|
|
*/
|
|
enum _ecore_status_t
|
|
ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
|
|
enum ecore_mib_read_type type)
|
|
{
|
|
enum _ecore_status_t rc = ECORE_SUCCESS;
|
|
|
|
rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
|
|
if (rc)
|
|
return rc;
|
|
|
|
if (type == ECORE_DCBX_OPERATIONAL_MIB) {
|
|
ecore_dcbx_get_dscp_params(p_hwfn, &p_hwfn->p_dcbx_info->get);
|
|
|
|
rc = ecore_dcbx_process_mib_info(p_hwfn);
|
|
if (!rc) {
|
|
/* reconfigure tcs of QM queues according
|
|
* to negotiation results
|
|
*/
|
|
ecore_qm_reconf(p_hwfn, p_ptt);
|
|
|
|
/* update storm FW with negotiation results */
|
|
ecore_sp_pf_update_dcbx(p_hwfn);
|
|
|
|
#ifdef CONFIG_ECORE_ROCE
|
|
/* for roce PFs, we may want to enable/disable DPM
|
|
* when DCBx change occurs
|
|
*/
|
|
if (ECORE_IS_ROCE_PERSONALITY(p_hwfn))
|
|
ecore_roce_dpm_dcbx(p_hwfn, p_ptt);
|
|
#endif
|
|
}
|
|
}
|
|
|
|
ecore_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);
|
|
|
|
if (type == ECORE_DCBX_OPERATIONAL_MIB) {
|
|
struct ecore_dcbx_results *p_data;
|
|
u16 val;
|
|
|
|
/* Update the DSCP to TC mapping bit if required */
|
|
if (p_hwfn->p_dcbx_info->dscp_nig_update) {
|
|
ecore_wr(p_hwfn, p_ptt, NIG_REG_DSCP_TO_TC_MAP_ENABLE,
|
|
0x1);
|
|
p_hwfn->p_dcbx_info->dscp_nig_update = false;
|
|
}
|
|
|
|
/* Configure in NIG which protocols support EDPM and should
|
|
* honor PFC.
|
|
*/
|
|
p_data = &p_hwfn->p_dcbx_info->results;
|
|
val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
|
|
(0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);
|
|
val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
|
|
val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
|
|
ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
|
|
}
|
|
|
|
OSAL_DCBX_AEN(p_hwfn, type);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
|
|
{
|
|
OSAL_BUILD_BUG_ON(ECORE_LLDP_CHASSIS_ID_STAT_LEN !=
|
|
LLDP_CHASSIS_ID_STAT_LEN);
|
|
OSAL_BUILD_BUG_ON(ECORE_LLDP_PORT_ID_STAT_LEN !=
|
|
LLDP_PORT_ID_STAT_LEN);
|
|
OSAL_BUILD_BUG_ON(ECORE_DCBX_MAX_APP_PROTOCOL !=
|
|
DCBX_MAX_APP_PROTOCOL);
|
|
|
|
p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
|
|
sizeof(*p_hwfn->p_dcbx_info));
|
|
if (!p_hwfn->p_dcbx_info) {
|
|
DP_NOTICE(p_hwfn, true,
|
|
"Failed to allocate `struct ecore_dcbx_info'");
|
|
return ECORE_NOMEM;
|
|
}
|
|
|
|
p_hwfn->p_dcbx_info->iwarp_port =
|
|
p_hwfn->pf_params.rdma_pf_params.iwarp_port;
|
|
|
|
return ECORE_SUCCESS;
|
|
}
|
|
|
|
void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn)
|
|
{
|
|
OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
|
|
p_hwfn->p_dcbx_info = OSAL_NULL;
|
|
}
|
|
|
|
static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
|
|
struct ecore_dcbx_results *p_src,
|
|
enum dcbx_protocol_type type)
|
|
{
|
|
p_data->dcb_enable_flag = p_src->arr[type].enable;
|
|
p_data->dcb_priority = p_src->arr[type].priority;
|
|
p_data->dcb_tc = p_src->arr[type].tc;
|
|
p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
|
|
p_data->dscp_val = p_src->arr[type].dscp_val;
|
|
}
|
|
|
|
/* Set pf update ramrod command params */
|
|
void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
|
|
struct pf_update_ramrod_data *p_dest)
|
|
{
|
|
struct protocol_dcb_data *p_dcb_data;
|
|
u8 update_flag;
|
|
|
|
p_dest->pf_id = p_src->pf_id;
|
|
|
|
update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
|
|
p_dest->update_fcoe_dcb_data_mode = update_flag;
|
|
|
|
update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
|
|
p_dest->update_roce_dcb_data_mode = update_flag;
|
|
|
|
update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
|
|
p_dest->update_rroce_dcb_data_mode = update_flag;
|
|
|
|
update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
|
|
p_dest->update_iscsi_dcb_data_mode = update_flag;
|
|
update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
|
|
p_dest->update_eth_dcb_data_mode = update_flag;
|
|
update_flag = p_src->arr[DCBX_PROTOCOL_IWARP].update;
|
|
p_dest->update_iwarp_dcb_data_mode = update_flag;
|
|
|
|
p_dcb_data = &p_dest->fcoe_dcb_data;
|
|
ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
|
|
p_dcb_data = &p_dest->roce_dcb_data;
|
|
ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE);
|
|
p_dcb_data = &p_dest->rroce_dcb_data;
|
|
ecore_dcbx_update_protocol_data(p_dcb_data, p_src,
|
|
DCBX_PROTOCOL_ROCE_V2);
|
|
p_dcb_data = &p_dest->iscsi_dcb_data;
|
|
ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
|
|
p_dcb_data = &p_dest->eth_dcb_data;
|
|
ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
|
|
p_dcb_data = &p_dest->iwarp_dcb_data;
|
|
ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_IWARP);
|
|
}
|
|
|
|
enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_get *p_get,
|
|
enum ecore_mib_read_type type)
|
|
{
|
|
struct ecore_ptt *p_ptt;
|
|
enum _ecore_status_t rc;
|
|
|
|
if (IS_VF(p_hwfn->p_dev))
|
|
return ECORE_INVAL;
|
|
|
|
p_ptt = ecore_ptt_acquire(p_hwfn);
|
|
if (!p_ptt) {
|
|
rc = ECORE_TIMEOUT;
|
|
DP_ERR(p_hwfn, "rc = %d\n", rc);
|
|
return rc;
|
|
}
|
|
|
|
rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
|
|
if (rc != ECORE_SUCCESS)
|
|
goto out;
|
|
|
|
rc = ecore_dcbx_get_params(p_hwfn, p_get, type);
|
|
|
|
out:
|
|
ecore_ptt_release(p_hwfn, p_ptt);
|
|
return rc;
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
|
|
u32 *pfc, struct ecore_dcbx_params *p_params)
|
|
{
|
|
u8 pfc_map = 0;
|
|
int i;
|
|
|
|
*pfc &= ~DCBX_PFC_ERROR_MASK;
|
|
|
|
if (p_params->pfc.willing)
|
|
*pfc |= DCBX_PFC_WILLING_MASK;
|
|
else
|
|
*pfc &= ~DCBX_PFC_WILLING_MASK;
|
|
|
|
if (p_params->pfc.enabled)
|
|
*pfc |= DCBX_PFC_ENABLED_MASK;
|
|
else
|
|
*pfc &= ~DCBX_PFC_ENABLED_MASK;
|
|
|
|
*pfc &= ~DCBX_PFC_CAPS_MASK;
|
|
*pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_OFFSET;
|
|
|
|
for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
|
|
if (p_params->pfc.prio[i])
|
|
pfc_map |= (1 << i);
|
|
*pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
|
|
*pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_OFFSET);
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
|
|
struct dcbx_ets_feature *p_ets,
|
|
struct ecore_dcbx_params *p_params)
|
|
{
|
|
u8 *bw_map, *tsa_map;
|
|
u32 val;
|
|
int i;
|
|
|
|
if (p_params->ets_willing)
|
|
p_ets->flags |= DCBX_ETS_WILLING_MASK;
|
|
else
|
|
p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
|
|
|
|
if (p_params->ets_cbs)
|
|
p_ets->flags |= DCBX_ETS_CBS_MASK;
|
|
else
|
|
p_ets->flags &= ~DCBX_ETS_CBS_MASK;
|
|
|
|
if (p_params->ets_enabled)
|
|
p_ets->flags |= DCBX_ETS_ENABLED_MASK;
|
|
else
|
|
p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
|
|
|
|
p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
|
|
p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_OFFSET;
|
|
|
|
bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
|
|
tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
|
|
p_ets->pri_tc_tbl[0] = 0;
|
|
for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
|
|
bw_map[i] = p_params->ets_tc_bw_tbl[i];
|
|
tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
|
|
/* Copy the priority value to the corresponding 4 bits in the
|
|
* traffic class table.
|
|
*/
|
|
val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
|
|
p_ets->pri_tc_tbl[0] |= val;
|
|
}
|
|
for (i = 0; i < 2; i++) {
|
|
p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
|
|
p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
|
|
}
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
|
|
"flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n",
|
|
p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0],
|
|
p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0],
|
|
p_ets->tc_tsa_tbl[1]);
|
|
}
|
|
|
|
static void
|
|
ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
|
|
struct dcbx_app_priority_feature *p_app,
|
|
struct ecore_dcbx_params *p_params, bool ieee)
|
|
{
|
|
u32 *entry;
|
|
int i;
|
|
|
|
if (p_params->app_willing)
|
|
p_app->flags |= DCBX_APP_WILLING_MASK;
|
|
else
|
|
p_app->flags &= ~DCBX_APP_WILLING_MASK;
|
|
|
|
if (p_params->app_valid)
|
|
p_app->flags |= DCBX_APP_ENABLED_MASK;
|
|
else
|
|
p_app->flags &= ~DCBX_APP_ENABLED_MASK;
|
|
|
|
p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
|
|
p_app->flags |= (u32)p_params->num_app_entries <<
|
|
DCBX_APP_NUM_ENTRIES_OFFSET;
|
|
|
|
for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
|
|
entry = &p_app->app_pri_tbl[i].entry;
|
|
*entry = 0;
|
|
if (ieee) {
|
|
*entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
|
|
switch (p_params->app_entry[i].sf_ieee) {
|
|
case ECORE_DCBX_SF_IEEE_ETHTYPE:
|
|
*entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
|
|
DCBX_APP_SF_IEEE_OFFSET);
|
|
*entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
|
|
DCBX_APP_SF_OFFSET);
|
|
break;
|
|
case ECORE_DCBX_SF_IEEE_TCP_PORT:
|
|
*entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
|
|
DCBX_APP_SF_IEEE_OFFSET);
|
|
*entry |= ((u32)DCBX_APP_SF_PORT <<
|
|
DCBX_APP_SF_OFFSET);
|
|
break;
|
|
case ECORE_DCBX_SF_IEEE_UDP_PORT:
|
|
*entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
|
|
DCBX_APP_SF_IEEE_OFFSET);
|
|
*entry |= ((u32)DCBX_APP_SF_PORT <<
|
|
DCBX_APP_SF_OFFSET);
|
|
break;
|
|
case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
|
|
*entry |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
|
|
DCBX_APP_SF_IEEE_OFFSET;
|
|
*entry |= ((u32)DCBX_APP_SF_PORT <<
|
|
DCBX_APP_SF_OFFSET);
|
|
break;
|
|
}
|
|
} else {
|
|
*entry &= ~DCBX_APP_SF_MASK;
|
|
if (p_params->app_entry[i].ethtype)
|
|
*entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
|
|
DCBX_APP_SF_OFFSET);
|
|
else
|
|
*entry |= ((u32)DCBX_APP_SF_PORT <<
|
|
DCBX_APP_SF_OFFSET);
|
|
}
|
|
*entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
|
|
*entry |= ((u32)p_params->app_entry[i].proto_id <<
|
|
DCBX_APP_PROTOCOL_ID_OFFSET);
|
|
*entry &= ~DCBX_APP_PRI_MAP_MASK;
|
|
*entry |= ((u32)(p_params->app_entry[i].prio) <<
|
|
DCBX_APP_PRI_MAP_OFFSET);
|
|
}
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags);
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
|
|
struct dcbx_local_params *local_admin,
|
|
struct ecore_dcbx_set *params)
|
|
{
|
|
bool ieee = false;
|
|
|
|
local_admin->flags = 0;
|
|
OSAL_MEMCPY(&local_admin->features,
|
|
&p_hwfn->p_dcbx_info->operational.features,
|
|
sizeof(local_admin->features));
|
|
|
|
if (params->enabled) {
|
|
local_admin->config = params->ver_num;
|
|
ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
|
|
} else
|
|
local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
|
|
|
|
if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
|
|
ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
|
|
¶ms->config.params);
|
|
|
|
if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
|
|
ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
|
|
¶ms->config.params);
|
|
|
|
if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
|
|
ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
|
|
¶ms->config.params, ieee);
|
|
|
|
return ECORE_SUCCESS;
|
|
}
|
|
|
|
static enum _ecore_status_t
|
|
ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
|
|
struct dcb_dscp_map *p_dscp_map,
|
|
struct ecore_dcbx_set *p_params)
|
|
{
|
|
int entry, i, j;
|
|
u32 val;
|
|
|
|
OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
|
|
sizeof(*p_dscp_map));
|
|
|
|
p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
|
|
if (p_params->dscp.enabled)
|
|
p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
|
|
|
|
for (i = 0, entry = 0; i < 8; i++) {
|
|
val = 0;
|
|
for (j = 0; j < 8; j++, entry++)
|
|
val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
|
|
(j * 4));
|
|
|
|
p_dscp_map->dscp_pri_map[i] = OSAL_CPU_TO_BE32(val);
|
|
}
|
|
|
|
p_hwfn->p_dcbx_info->dscp_nig_update = true;
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags);
|
|
|
|
return ECORE_SUCCESS;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_ptt *p_ptt,
|
|
struct ecore_dcbx_set *params,
|
|
bool hw_commit)
|
|
{
|
|
struct dcbx_local_params local_admin;
|
|
struct ecore_dcbx_mib_meta_data data;
|
|
struct dcb_dscp_map dscp_map;
|
|
u32 resp = 0, param = 0;
|
|
enum _ecore_status_t rc = ECORE_SUCCESS;
|
|
|
|
if (!hw_commit) {
|
|
OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
|
|
sizeof(p_hwfn->p_dcbx_info->set));
|
|
return ECORE_SUCCESS;
|
|
}
|
|
|
|
/* clear set-parmas cache */
|
|
OSAL_MEMSET(&p_hwfn->p_dcbx_info->set, 0,
|
|
sizeof(struct ecore_dcbx_set));
|
|
|
|
OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
|
|
ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
|
|
|
|
data.addr = p_hwfn->mcp_info->port_addr +
|
|
offsetof(struct public_port, local_admin_dcbx_mib);
|
|
data.local_admin = &local_admin;
|
|
data.size = sizeof(struct dcbx_local_params);
|
|
ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
|
|
|
|
if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
|
|
OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
|
|
ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
|
|
|
|
data.addr = p_hwfn->mcp_info->port_addr +
|
|
offsetof(struct public_port, dcb_dscp_map);
|
|
data.dscp_map = &dscp_map;
|
|
data.size = sizeof(struct dcb_dscp_map);
|
|
ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
|
|
data.size);
|
|
}
|
|
|
|
rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
|
|
1 << DRV_MB_PARAM_LLDP_SEND_OFFSET, &resp, ¶m);
|
|
if (rc != ECORE_SUCCESS)
|
|
DP_NOTICE(p_hwfn, false,
|
|
"Failed to send DCBX update request\n");
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_dcbx_set *params)
|
|
{
|
|
struct ecore_dcbx_get *dcbx_info;
|
|
int rc;
|
|
|
|
if (p_hwfn->p_dcbx_info->set.config.valid) {
|
|
OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
|
|
sizeof(struct ecore_dcbx_set));
|
|
return ECORE_SUCCESS;
|
|
}
|
|
|
|
dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
|
|
sizeof(*dcbx_info));
|
|
if (!dcbx_info) {
|
|
DP_ERR(p_hwfn, "Failed to allocate struct ecore_dcbx_info\n");
|
|
return ECORE_NOMEM;
|
|
}
|
|
|
|
OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info));
|
|
rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
|
|
ECORE_DCBX_OPERATIONAL_MIB);
|
|
if (rc) {
|
|
OSAL_FREE(p_hwfn->p_dev, dcbx_info);
|
|
return rc;
|
|
}
|
|
p_hwfn->p_dcbx_info->set.override_flags = 0;
|
|
|
|
p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
|
|
if (dcbx_info->operational.cee)
|
|
p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
|
|
if (dcbx_info->operational.ieee)
|
|
p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
|
|
if (dcbx_info->operational.local)
|
|
p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
|
|
|
|
p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
|
|
OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
|
|
&dcbx_info->operational.params,
|
|
sizeof(struct ecore_dcbx_admin_params));
|
|
p_hwfn->p_dcbx_info->set.config.valid = true;
|
|
|
|
OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
|
|
sizeof(struct ecore_dcbx_set));
|
|
|
|
OSAL_FREE(p_hwfn->p_dev, dcbx_info);
|
|
|
|
return ECORE_SUCCESS;
|
|
}
|