Alan Cox 605385f843 Add comments explaining why all stores updating a non-kernel page table ... must be globally performed before calling any of the TLB invalidation functions. With one exception, on amd64, this requirement was already met. Fix this one case. Also, as a clarification, change an existing atomic op into a release. (Suggested by: jhb) Reported and reviewed by: ups MFC after: 3 days		2007-11-05 18:13:34 +00:00
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acpica	Handle CPUs with APIC IDs higher than 32 (at least one IBM server uses	2007-05-08 22:01:04 +00:00
amd64	Add comments explaining why all stores updating a non-kernel page table	2007-11-05 18:13:34 +00:00
compile
conf	Move nvram out of DEFAULTS. There really isn't a lot of justification	2007-10-29 22:19:08 +00:00
ia32	Optimize vmmeter locking.	2007-06-10 21:59:14 +00:00
include	- Add constants for the different memory types in the SMAP table.	2007-10-28 21:23:49 +00:00
isa	Split /dev/nvram driver out of isa/clock.c for i386 and amd64. I have not	2007-10-26 03:23:54 +00:00
linux32	Fill in cr2 in the signal context from ksi->ksi_addr.	2007-09-20 13:46:26 +00:00
pci	Make the PCI code aware of PCI domains (aka PCI segments) so we can	2007-09-30 11:05:18 +00:00
Makefile