d8daa2e3f6
It isn't linked into the build because it's missing the TX power and PDADC programming code. This code is mostly based on the ath9k codebase, compared against the Atheros codebase as appropriate. What's implemented: * probe/attach * EEPROM board value programming * RX initial calibration * radio channel programming * general MAC / baseband setup * async fifo setup * open-loop tx power calibration What's missing before it can be enabled by default: * TX power / calibration setting code * closed-loop tx power calibration routines * TSF2 handling * generic timer support from ath9k Obtained from: Atheros, ath9k
63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
/*
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* Copyright (c) 2010 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef _ATH_AR9287_H_
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#define _ATH_AR9287_H_
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#include "ar5416/ar5416.h"
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/*
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* This is a chip thing, but it's used here as part of the
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* ath_hal_9287 struct; so it's convienent to locate the
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* define here.
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*/
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#define AR9287_TX_GAIN_TABLE_SIZE 22
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struct ath_hal_9287 {
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struct ath_hal_5416 ah_5416;
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HAL_INI_ARRAY ah_ini_xmodes;
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HAL_INI_ARRAY ah_ini_rxgain;
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HAL_INI_ARRAY ah_ini_txgain;
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HAL_INI_ARRAY ah_ini_cckFirNormal;
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HAL_INI_ARRAY ah_ini_cckFirJapan2484;
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int PDADCdelta;
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uint32_t originalGain[AR9287_TX_GAIN_TABLE_SIZE];
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};
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#define AH9287(_ah) ((struct ath_hal_9287 *)(_ah))
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#define AR9287_DEFAULT_RXCHAINMASK 3
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#define AR9285_DEFAULT_RXCHAINMASK 1
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#define AR9287_DEFAULT_TXCHAINMASK 3
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#define AR9285_DEFAULT_TXCHAINMASK 1
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#define AR_PHY_CCA_NOM_VAL_9287_2GHZ -112
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#define AR_PHY_CCA_NOM_VAL_9287_5GHZ -112
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#define AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ -127
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#define AR_PHY_CCA_MIN_GOOD_VAL_9287_5GHZ -122
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#define AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ -97
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#define AR_PHY_CCA_MAX_GOOD_VAL_9287_5GHZ -102
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extern HAL_BOOL ar9287RfAttach(struct ath_hal *, HAL_STATUS *);
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extern HAL_BOOL ar9287SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING);
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#endif /* _ATH_AR9287_H_ */
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