661104e49c
Submitted by: "Daniel M. Eischen" <deischen@iworks.InterWorks.org>
2377 lines
63 KiB
C
2377 lines
63 KiB
C
/*
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* Generic driver for the aic7xxx based adaptec SCSI controllers
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* Copyright (c) 1994, 1995 Justin T. Gibbs.
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* All rights reserved.
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*
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* Product specific probe and attach routines can be found in:
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* i386/eisa/aic7770.c 27/284X and aic7770 motherboard controllers
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* pci/aic7870.c 3940, 2940, aic7870 and aic7850 controllers
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*
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* Portions of this driver are based on the FreeBSD 1742 Driver:
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*
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* Written by Julian Elischer (julian@tfs.com)
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* for TRW Financial Systems for use under the MACH(2.5) operating system.
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*
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* TRW Financial Systems, in accordance with their agreement with Carnegie
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* Mellon University, makes this software available to CMU to distribute
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* or use in any manner that they see fit as long as this message is kept with
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* the software. For this reason TFS also grants any other persons or
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* organisations permission to use or modify this software.
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*
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* TFS supplies this software to be publicly redistributed
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* on the understanding that TFS is not responsible for the correct
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* functioning of this software in any circumstances.
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*
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* commenced: Sun Sep 27 18:14:01 PDT 1992
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*
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* $Id: aic7xxx.c,v 1.51 1996/01/03 06:32:10 gibbs Exp $
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*/
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/*
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* TODO:
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* Implement Target Mode
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*
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#include <machine/clock.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <i386/scsi/aic7xxx.h>
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#include <dev/aic7xxx/aic7xxx_reg.h>
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#define PAGESIZ 4096
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#define MAX_TAGS 4;
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#include <sys/kernel.h>
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#define KVTOPHYS(x) vtophys(x)
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#define MIN(a,b) ((a < b) ? a : b)
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#define ALL_TARGETS -1
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struct ahc_data *ahcdata[NAHC];
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u_long ahc_unit = 0;
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static int ahc_debug = AHC_SHOWABORTS|AHC_SHOWMISC;
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/**** bit definitions for SCSIDEF ****/
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#define HSCSIID 0x07 /* our SCSI ID */
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#define HWSCSIID 0x0f /* our SCSI ID if Wide Bus */
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typedef enum {
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list_head,
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list_second,
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}insert_t;
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static u_int32 ahc_adapter_info __P((int unit));
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static void ahcminphys __P((struct buf *bp));
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static int32 ahc_scsi_cmd __P((struct scsi_xfer *xs));
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static struct scsi_adapter ahc_switch =
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{
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ahc_scsi_cmd,
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ahcminphys,
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0,
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0,
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ahc_adapter_info,
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"ahc",
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{ 0, 0 }
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};
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/* the below structure is so we have a default dev struct for our link struct */
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static struct scsi_device ahc_dev =
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{
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NULL, /* Use default error handler */
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NULL, /* have a queue, served by this */
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NULL, /* have no async handler */
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NULL, /* Use default 'done' routine */
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"ahc",
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0,
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{ 0, 0 }
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};
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/*
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* Since the sequencer can disable pausing in a critical section, we
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* must loop until it actually stops.
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* XXX Should add a timeout in here??
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*/
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#define PAUSE_SEQUENCER(ahc) \
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outb(HCNTRL + ahc->baseport, ahc->pause); \
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\
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while ((inb(HCNTRL + ahc->baseport) & PAUSE) == 0) \
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;
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#define UNPAUSE_SEQUENCER(ahc) \
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outb( HCNTRL + ahc->baseport, ahc->unpause )
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/*
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* Restart the sequencer program from address zero
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*/
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#define RESTART_SEQUENCER(ahc) \
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do { \
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outb( SEQCTL + ahc->baseport, SEQRESET|FASTMODE ); \
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} while (inb(SEQADDR0 + ahc->baseport) != 0 && \
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inb(SEQADDR1 + ahc->baseport != 0)); \
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\
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UNPAUSE_SEQUENCER(ahc);
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static u_char ahc_abort_wscb __P((struct ahc_data *ahc, struct scb *scbp,
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u_char prev, u_long iobase,
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u_char timedout_scb, u_int32 xs_error));
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static void ahc_add_waiting_scb __P((u_long iobase, struct scb *scb,
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insert_t where));
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static void ahc_done __P((struct ahc_data *ahc, struct scb *scbp));
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static void ahc_free_scb __P((struct ahc_data *ahc, struct scb *scb,
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int flags));
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static void ahc_getscb __P((u_long iobase, struct scb *scb));
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static struct scb *
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ahc_get_scb __P((struct ahc_data *ahc, int flags));
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static void ahc_loadseq __P((u_long iobase));
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static int ahc_match_scb __P((struct scb *scb, int target, char channel));
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#ifdef AHC_DEBUG
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static void ahc_print_active_scb __P((struct ahc_data *ahc));
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static void ahc_print_scb __P((struct scb *scb));
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#endif
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static int ahc_reset_channel __P((struct ahc_data *ahc, char channel,
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u_char timedout_scb, u_int32 xs_error));
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static int ahc_reset_device __P((struct ahc_data *ahc, int target,
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char channel, u_char timedout_scb,
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u_int32 xs_error));
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static void ahc_reset_current_bus __P((u_long iobase));
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static void ahc_scb_timeout __P((struct ahc_data *ahc, struct scb *scb));
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static void ahc_scsirate __P((struct ahc_data* ahc, u_char *scsirate,
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int period, int offset, int target));
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static void ahc_send_scb __P((struct ahc_data *ahc, struct scb *scb));
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static timeout_t
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ahc_timeout;
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static void ahc_busy_target __P((int target, char channel,
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u_long iobase));
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static void ahc_unbusy_target __P((int target, char channel,
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u_long iobase));
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#ifdef AHC_DEBUG
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static void
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ahc_print_scb(scb)
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struct scb *scb;
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{
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printf("scb:%p control:0x%x tcl:0x%x cmdlen:%d cmdpointer:0x%lx\n"
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,scb
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,scb->control
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,scb->target_channel_lun
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,scb->cmdlen
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,scb->cmdpointer );
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printf(" datlen:%d data:0x%lx segs:0x%x segp:0x%lx\n"
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,scb->datalen
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,scb->data
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,scb->SG_segment_count
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,scb->SG_list_pointer);
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printf(" sg_addr:%lx sg_len:%ld\n"
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,scb->ahc_dma[0].addr
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,scb->ahc_dma[0].len);
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}
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static void
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ahc_print_active_scb(ahc)
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struct ahc_data *ahc;
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{
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int cur_scb_offset;
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u_long iobase = ahc->baseport;
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PAUSE_SEQUENCER(ahc);
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cur_scb_offset = inb(SCBPTR + iobase);
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UNPAUSE_SEQUENCER(ahc);
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ahc_print_scb(ahc->scbarray[cur_scb_offset]);
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}
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#endif
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#define PARERR 0x08
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#define ILLOPCODE 0x04
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#define ILLSADDR 0x02
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#define ILLHADDR 0x01
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static struct {
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u_char errno;
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char *errmesg;
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} hard_error[] = {
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{ ILLHADDR, "Illegal Host Access" },
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{ ILLSADDR, "Illegal Sequencer Address referrenced" },
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{ ILLOPCODE, "Illegal Opcode in sequencer program" },
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{ PARERR, "Sequencer Ram Parity Error" }
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};
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/*
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* Valid SCSIRATE values. (p. 3-17)
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* Provides a mapping of tranfer periods in ns to the proper value to
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* stick in the scsiscfr reg to use that transfer rate.
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*/
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static struct {
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short sxfr;
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/* Rates in Ultra mode have bit 8 of sxfr set */
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#define ULTRA_SXFR 0x100
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short period; /* in ns */
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char *rate;
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} ahc_syncrates[] = {
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{ 0x100, 50, "20.0" },
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{ 0x110, 62, "16.0" },
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{ 0x120, 75, "13.4" },
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{ 0x140, 100, "10.0" },
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{ 0x000, 100, "10.0" },
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{ 0x010, 125, "8.0" },
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{ 0x020, 150, "6.67" },
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{ 0x030, 175, "5.7" },
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{ 0x040, 200, "5.0" },
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{ 0x050, 225, "4.4" },
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{ 0x060, 250, "4.0" },
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{ 0x070, 275, "3.6" }
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};
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static int ahc_num_syncrates =
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sizeof(ahc_syncrates) / sizeof(ahc_syncrates[0]);
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/*
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* Allocate a controller structures for a new device and initialize it.
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* ahc_reset should be called before now since we assume that the card
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* is paused.
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*
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* Sticking the ahc structure into the ahcdata array is an artifact of the
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* need to index by unit. As soon as the upper level scsi code passes
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* pointers instead of units down to us, this will go away.
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*/
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struct ahc_data *
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ahc_alloc(unit, iobase, type, flags)
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int unit;
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u_long iobase;
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ahc_type type;
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ahc_flag flags;
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{
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/*
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* find unit and check we have that many defined
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*/
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struct ahc_data *ahc;
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if (unit >= NAHC) {
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printf("ahc: unit number (%d) too high\n", unit);
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return 0;
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}
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/*
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* Allocate a storage area for us
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*/
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if (ahcdata[unit]) {
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printf("ahc%d: memory already allocated\n", unit);
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return NULL;
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}
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ahc = malloc(sizeof(struct ahc_data), M_TEMP, M_NOWAIT);
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if (!ahc) {
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printf("ahc%d: cannot malloc!\n", unit);
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return NULL;
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}
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bzero(ahc, sizeof(struct ahc_data));
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ahcdata[unit] = ahc;
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ahc->unit = unit;
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ahc->baseport = iobase;
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ahc->type = type;
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ahc->flags = flags;
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ahc->unpause = (inb(HCNTRL + iobase) & IRQMS) | INTEN;
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ahc->pause = ahc->unpause | PAUSE;
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return (ahc);
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}
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void
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ahc_free(ahc)
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struct ahc_data *ahc;
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{
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ahcdata[ahc->unit] = NULL;
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free(ahc, M_DEVBUF);
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return;
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}
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void
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ahc_reset(iobase)
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u_long iobase;
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{
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u_char hcntrl;
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int wait;
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/* Retain the IRQ type accross the chip reset */
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hcntrl = (inb(HCNTRL + iobase) & IRQMS) | INTEN;
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outb(HCNTRL + iobase, CHIPRST | PAUSE);
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/*
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* Ensure that the reset has finished
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*/
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wait = 1000;
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while (wait--) {
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DELAY(1000);
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if(!(inb(HCNTRL + iobase) & CHIPRST))
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break;
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}
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if(wait == 0) {
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printf("ahc at 0x%lx: WARNING - Failed chip reset! "
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"Trying to initialize anyway.\n", iobase);
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}
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outb(HCNTRL + iobase, hcntrl | PAUSE);
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}
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/*
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* Look up the valid period to SCSIRATE conversion in our table.
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*/
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static void
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ahc_scsirate(ahc, scsirate, period, offset, target )
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struct ahc_data *ahc;
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u_char *scsirate;
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short period;
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u_char offset;
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int target;
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{
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int i;
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for (i = 0; i < ahc_num_syncrates; i++) {
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if ((ahc_syncrates[i].period - period) >= 0) {
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/*
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* Watch out for Ultra speeds when ultra is not
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* enabled and vice-versa.
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*/
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if (ahc->type & AHC_ULTRA) {
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if (!(ahc_syncrates[i].sxfr & ULTRA_SXFR)) {
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printf("ahc%d: target %d requests "
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"%sMHz transfers, but adapter "
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"in Ultra mode can only sync at "
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"10MHz or above\n", ahc->unit,
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target, ahc_syncrates[i].rate);
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break; /* Use Async */
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}
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}
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else {
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if (ahc_syncrates[i].sxfr & ULTRA_SXFR) {
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/*
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* This should only happen if the
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* drive is the first to negotiate
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* and chooses a high rate. We'll
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* just move down the table util
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* we hit a non ultra speed.
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*/
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continue;
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}
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}
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*scsirate = (ahc_syncrates[i].sxfr) | (offset & 0x0f);
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if(bootverbose) {
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printf("ahc%d: target %d synchronous at %sMHz,"
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" offset = 0x%x\n", ahc->unit, target,
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ahc_syncrates[i].rate, offset );
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}
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return;
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}
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}
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/* Default to asyncronous transfers. Also reject this SDTR request. */
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*scsirate = 0;
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if(bootverbose) {
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printf("ahc%d: target %d using asyncronous transfers\n",
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ahc->unit, target );
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}
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}
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/*
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* Attach all the sub-devices we can find
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*/
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int
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ahc_attach(ahc)
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struct ahc_data *ahc;
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{
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struct scsibus_data *scbus;
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/*
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* fill in the prototype scsi_link.
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*/
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ahc->sc_link.adapter_unit = ahc->unit;
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ahc->sc_link.adapter_targ = ahc->our_id;
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ahc->sc_link.adapter = &ahc_switch;
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ahc->sc_link.opennings = 2;
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ahc->sc_link.device = &ahc_dev;
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ahc->sc_link.flags = DEBUGLEVEL;
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ahc->sc_link.fordriver = 0;
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/*
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* Prepare the scsibus_data area for the upperlevel
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* scsi code.
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*/
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scbus = scsi_alloc_bus();
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if(!scbus)
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return 0;
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scbus->adapter_link = &ahc->sc_link;
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if(ahc->type & AHC_WIDE)
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scbus->maxtarg = 15;
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/*
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* ask the adapter what subunits are present
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*/
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if(bootverbose)
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printf("ahc%d: Probing channel A\n", ahc->unit);
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scsi_attachdevs(scbus);
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scbus = NULL; /* Upper-level SCSI code owns this now */
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if(ahc->type & AHC_TWIN) {
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/* Configure the second scsi bus */
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ahc->sc_link_b = ahc->sc_link;
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ahc->sc_link_b.adapter_targ = ahc->our_id_b;
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ahc->sc_link_b.adapter_bus = 1;
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ahc->sc_link_b.fordriver = (void *)SELBUSB;
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scbus = scsi_alloc_bus();
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if(!scbus)
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return 0;
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scbus->adapter_link = &ahc->sc_link_b;
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if(ahc->type & AHC_WIDE)
|
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scbus->maxtarg = 15;
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if(bootverbose)
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printf("ahc%d: Probing Channel B\n", ahc->unit);
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scsi_attachdevs(scbus);
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scbus = NULL; /* Upper-level SCSI code owns this now */
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}
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return 1;
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}
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|
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static void
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ahc_send_scb( ahc, scb )
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struct ahc_data *ahc;
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struct scb *scb;
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{
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u_long iobase = ahc->baseport;
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PAUSE_SEQUENCER(ahc);
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outb(QINFIFO + iobase, scb->position);
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UNPAUSE_SEQUENCER(ahc);
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}
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static
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void ahc_getscb(iobase, scb)
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u_long iobase;
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struct scb *scb;
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{
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outb(SCBCNT + iobase, 0x80); /* SCBAUTO */
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insb(SCBARRAY + iobase, scb, SCB_PIO_TRANSFER_SIZE);
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outb(SCBCNT + iobase, 0);
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}
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|
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/*
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* Add this SCB to the "waiting for selection" list.
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*/
|
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static
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void ahc_add_waiting_scb (iobase, scb, where)
|
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u_long iobase;
|
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struct scb *scb;
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insert_t where;
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{
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u_char head, tail;
|
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u_char curscb;
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|
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curscb = inb(SCBPTR + iobase);
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head = inb(WAITING_SCBH + iobase);
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if(head == SCB_LIST_NULL) {
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/* List was empty */
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head = scb->position;
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tail = SCB_LIST_NULL;
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}
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else if (where == list_head) {
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outb(SCBPTR+iobase, scb->position);
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outb(SCB_NEXT_WAITING+iobase, head);
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head = scb->position;
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}
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else /*where == list_second*/ {
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u_char third_scb;
|
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outb(SCBPTR+iobase, head);
|
|
third_scb = inb(SCB_NEXT_WAITING+iobase);
|
|
outb(SCB_NEXT_WAITING+iobase,scb->position);
|
|
outb(SCBPTR+iobase, scb->position);
|
|
outb(SCB_NEXT_WAITING+iobase,third_scb);
|
|
}
|
|
outb(WAITING_SCBH + iobase, head);
|
|
outb(SCBPTR + iobase, curscb);
|
|
}
|
|
|
|
/*
|
|
* Catch an interrupt from the adaptor
|
|
*/
|
|
int
|
|
ahcintr(arg)
|
|
void *arg;
|
|
{
|
|
int intstat;
|
|
u_char status;
|
|
u_long iobase;
|
|
struct scb *scb = NULL;
|
|
struct scsi_xfer *xs = NULL;
|
|
struct ahc_data *ahc = (struct ahc_data *)arg;
|
|
|
|
iobase = ahc->baseport;
|
|
intstat = inb(INTSTAT + iobase);
|
|
/*
|
|
* Is this interrupt for me? or for
|
|
* someone who is sharing my interrupt
|
|
*/
|
|
if (!(intstat & INT_PEND))
|
|
return 0;
|
|
|
|
if (intstat & BRKADRINT) {
|
|
/* We upset the sequencer :-( */
|
|
|
|
/* Lookup the error message */
|
|
int i, error = inb(ERROR + iobase);
|
|
int num_errors = sizeof(hard_error)/sizeof(hard_error[0]);
|
|
for(i = 0; error != 1 && i < num_errors; i++)
|
|
error >>= 1;
|
|
panic("ahc%d: brkadrint, %s at seqaddr = 0x%x\n",
|
|
ahc->unit, hard_error[i].errmesg,
|
|
(inb(SEQADDR1 + iobase) << 8) |
|
|
inb(SEQADDR0 + iobase));
|
|
}
|
|
if (intstat & SEQINT) {
|
|
u_short targ_mask;
|
|
u_char target = (inb(SCSIID + iobase) >> 4) & 0x0f;
|
|
u_char scratch_offset = target;
|
|
char channel =
|
|
inb(SBLKCTL + iobase) & SELBUSB ? 'B': 'A';
|
|
|
|
if (channel == 'B')
|
|
scratch_offset += 8;
|
|
targ_mask = (0x01 << scratch_offset);
|
|
|
|
switch (intstat & SEQINT_MASK) {
|
|
case BAD_PHASE:
|
|
panic("ahc%d:%c:%d: unknown scsi bus phase. "
|
|
"Attempting to continue\n",
|
|
ahc->unit, channel, target);
|
|
break;
|
|
case SEND_REJECT:
|
|
{
|
|
u_char rejbyte = inb(REJBYTE + iobase);
|
|
if(( rejbyte & 0xf0) == 0x20) {
|
|
/* Tagged Message */
|
|
printf("\nahc%d:%c:%d: Tagged message "
|
|
"received without identify. "
|
|
"Disabling tagged commands "
|
|
"for this target.\n",
|
|
ahc->unit, channel, target);
|
|
ahc->tagenable &= ~targ_mask;
|
|
}
|
|
else
|
|
printf("ahc%d:%c:%d: Warning - "
|
|
"unknown message recieved from "
|
|
"target (0x%x). Rejecting\n",
|
|
ahc->unit, channel, target,
|
|
rejbyte);
|
|
break;
|
|
}
|
|
case NO_IDENT:
|
|
panic("ahc%d:%c:%d: Target did not send an IDENTIFY "
|
|
"message. SAVED_TCL == 0x%x\n",
|
|
ahc->unit, channel, target,
|
|
inb(SAVED_TCL + iobase));
|
|
break;
|
|
case NO_MATCH:
|
|
{
|
|
printf("ahc%d:%c:%d: no active SCB for "
|
|
"reconnecting target - "
|
|
"issuing ABORT\n", ahc->unit, channel,
|
|
target);
|
|
printf("SAVED_TCL == 0x%x\n",
|
|
inb(SAVED_TCL + iobase));
|
|
ahc_unbusy_target(target, channel, iobase);
|
|
outb(SCBARRAY + iobase, NEEDDMA);
|
|
outb(CLRSINT1 + iobase, CLRSELTIMEO);
|
|
RESTART_SEQUENCER(ahc);
|
|
break;
|
|
}
|
|
case SDTR_MSG:
|
|
{
|
|
short period;
|
|
u_char offset, rate;
|
|
u_char targ_scratch;
|
|
u_char maxoffset;
|
|
/*
|
|
* Help the sequencer to translate the
|
|
* negotiated transfer rate. Transfer is
|
|
* 1/4 the period in ns as is returned by
|
|
* the sync negotiation message. So, we must
|
|
* multiply by four
|
|
*/
|
|
period = inb(ARG_1 + iobase) << 2;
|
|
offset = inb(ACCUM + iobase);
|
|
targ_scratch = inb(TARG_SCRATCH + iobase
|
|
+ scratch_offset);
|
|
if(targ_scratch & WIDEXFER)
|
|
maxoffset = 0x08;
|
|
else
|
|
maxoffset = 0x0f;
|
|
ahc_scsirate(ahc, &rate, period,
|
|
MIN(offset,maxoffset),
|
|
target);
|
|
/* Preserve the WideXfer flag */
|
|
targ_scratch = rate | (targ_scratch & WIDEXFER);
|
|
outb(TARG_SCRATCH + iobase + scratch_offset,
|
|
targ_scratch);
|
|
outb(SCSIRATE + iobase, targ_scratch);
|
|
if( (targ_scratch & 0x0f) == 0 )
|
|
{
|
|
/*
|
|
* The requested rate was so low
|
|
* that asyncronous transfers are
|
|
* faster (not to mention the
|
|
* controller won't support them),
|
|
* so we issue a message reject to
|
|
* ensure we go to asyncronous
|
|
* transfers.
|
|
*/
|
|
outb(RETURN_1 + iobase, SEND_REJ);
|
|
}
|
|
/* See if we initiated Sync Negotiation */
|
|
else if(ahc->sdtrpending & targ_mask)
|
|
{
|
|
/*
|
|
* Don't send an SDTR back to
|
|
* the target
|
|
*/
|
|
outb(RETURN_1 + iobase, 0);
|
|
}
|
|
else{
|
|
/*
|
|
* Send our own SDTR in reply
|
|
*/
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWMISC)
|
|
printf("Sending SDTR!!\n");
|
|
#endif
|
|
outb(RETURN_1 + iobase, SEND_SDTR);
|
|
}
|
|
/*
|
|
* Negate the flags
|
|
*/
|
|
ahc->needsdtr &= ~targ_mask;
|
|
ahc->sdtrpending &= ~targ_mask;
|
|
break;
|
|
}
|
|
case WDTR_MSG:
|
|
{
|
|
u_char scratch, bus_width;
|
|
|
|
bus_width = inb(ARG_1 + iobase);
|
|
|
|
scratch = inb(TARG_SCRATCH + iobase
|
|
+ scratch_offset);
|
|
|
|
if(ahc->wdtrpending & targ_mask)
|
|
{
|
|
/*
|
|
* Don't send a WDTR back to the
|
|
* target, since we asked first.
|
|
*/
|
|
outb(RETURN_1 + iobase, 0);
|
|
switch(bus_width)
|
|
{
|
|
case BUS_8_BIT:
|
|
scratch &= 0x7f;
|
|
break;
|
|
case BUS_16_BIT:
|
|
if(bootverbose)
|
|
printf("ahc%d: target "
|
|
"%d using 16Bit "
|
|
"transfers\n",
|
|
ahc->unit,
|
|
target);
|
|
scratch |= 0x80;
|
|
break;
|
|
case BUS_32_BIT:
|
|
/*
|
|
* How can we do 32bit
|
|
* transfers on a 16bit
|
|
* bus?
|
|
*/
|
|
outb(RETURN_1 + iobase,
|
|
SEND_REJ);
|
|
printf("ahc%d: target "
|
|
"%d requested 32Bit "
|
|
"transfers. "
|
|
"Rejecting...\n",
|
|
ahc->unit, target);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
else {
|
|
/*
|
|
* Send our own WDTR in reply
|
|
*/
|
|
switch(bus_width)
|
|
{
|
|
case BUS_8_BIT:
|
|
scratch &= 0x7f;
|
|
break;
|
|
case BUS_32_BIT:
|
|
/* Negotiate 16_BITS */
|
|
bus_width = BUS_16_BIT;
|
|
case BUS_16_BIT:
|
|
if(bootverbose)
|
|
printf("ahc%d: target "
|
|
"%d using 16Bit "
|
|
"transfers\n",
|
|
ahc->unit,
|
|
target);
|
|
scratch |= 0x80;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
outb(RETURN_1 + iobase,
|
|
bus_width | SEND_WDTR);
|
|
}
|
|
ahc->needwdtr &= ~targ_mask;
|
|
ahc->wdtrpending &= ~targ_mask;
|
|
outb(TARG_SCRATCH + iobase + scratch_offset,
|
|
scratch);
|
|
outb(SCSIRATE + iobase, scratch);
|
|
break;
|
|
}
|
|
case REJECT_MSG:
|
|
{
|
|
/*
|
|
* What we care about here is if we had an
|
|
* outstanding SDTR or WDTR message for this
|
|
* target. If we did, this is a signal that
|
|
* the target is refusing negotiation.
|
|
*/
|
|
|
|
u_char targ_scratch;
|
|
|
|
targ_scratch = inb(TARG_SCRATCH + iobase
|
|
+ scratch_offset);
|
|
|
|
if(ahc->wdtrpending & targ_mask){
|
|
/* note 8bit xfers and clear flag */
|
|
targ_scratch &= 0x7f;
|
|
ahc->needwdtr &= ~targ_mask;
|
|
ahc->wdtrpending &= ~targ_mask;
|
|
printf("ahc%d:%c:%d: refuses "
|
|
"WIDE negotiation. Using "
|
|
"8bit transfers\n",
|
|
ahc->unit, channel, target);
|
|
}
|
|
else if(ahc->sdtrpending & targ_mask){
|
|
/* note asynch xfers and clear flag */
|
|
targ_scratch &= 0xf0;
|
|
ahc->needsdtr &= ~targ_mask;
|
|
ahc->sdtrpending &= ~targ_mask;
|
|
printf("ahc%d:%c:%d: refuses "
|
|
"syncronous negotiation. Using "
|
|
"asyncronous transfers\n",
|
|
ahc->unit, channel, target);
|
|
}
|
|
else {
|
|
/*
|
|
* Otherwise, we ignore it.
|
|
*/
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWMISC)
|
|
printf("ahc%d:%c:%d: Message
|
|
reject -- ignored\n",
|
|
ahc->unit, channel,
|
|
target);
|
|
#endif
|
|
break;
|
|
}
|
|
outb(TARG_SCRATCH + iobase + scratch_offset,
|
|
targ_scratch);
|
|
outb(SCSIRATE + iobase, targ_scratch);
|
|
break;
|
|
}
|
|
case BAD_STATUS:
|
|
{
|
|
int scb_index;
|
|
|
|
/* The sequencer will notify us when a command
|
|
* has an error that would be of interest to
|
|
* the kernel. This allows us to leave the sequencer
|
|
* running in the common case of command completes
|
|
* without error.
|
|
*/
|
|
|
|
scb_index = inb(SCBPTR + iobase);
|
|
scb = ahc->scbarray[scb_index];
|
|
|
|
/*
|
|
* Set the default return value to 0 (don't
|
|
* send sense). The sense code will change
|
|
* this if needed and this reduces code
|
|
* duplication.
|
|
*/
|
|
outb(RETURN_1 + iobase, 0);
|
|
if (!scb || !(scb->flags & SCB_ACTIVE)) {
|
|
printf("ahc%d:%c:%d: ahcintr - referenced scb "
|
|
"not valid during seqint 0x%x scb(%d)\n",
|
|
ahc->unit, channel, target, intstat,
|
|
scb_index);
|
|
goto clear;
|
|
}
|
|
|
|
xs = scb->xs;
|
|
|
|
ahc_getscb(iobase, scb);
|
|
|
|
#ifdef AHC_DEBUG
|
|
if((ahc_debug & AHC_SHOWSCBS)
|
|
&& xs->sc_link->target == DEBUGTARG)
|
|
ahc_print_scb(scb);
|
|
#endif
|
|
xs->status = scb->target_status;
|
|
switch(scb->target_status){
|
|
case SCSI_OK:
|
|
printf("ahc%d: Interrupted for staus of"
|
|
" 0???\n", ahc->unit);
|
|
break;
|
|
case SCSI_CHECK:
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWSENSE)
|
|
{
|
|
sc_print_addr(xs->sc_link);
|
|
printf("requests Check Status\n");
|
|
}
|
|
#endif
|
|
|
|
if((xs->error == XS_NOERROR) &&
|
|
!(scb->flags & SCB_SENSE)) {
|
|
u_char control = scb->control;
|
|
u_short active;
|
|
struct ahc_dma_seg *sg = scb->ahc_dma;
|
|
struct scsi_sense *sc = &(scb->sense_cmd);
|
|
u_char tcl = scb->target_channel_lun;
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWSENSE)
|
|
{
|
|
sc_print_addr(xs->sc_link);
|
|
printf("Sending Sense\n");
|
|
}
|
|
#endif
|
|
bzero(scb, SCB_PIO_TRANSFER_SIZE);
|
|
scb->control |= control & DISCENB;
|
|
scb->flags |= SCB_SENSE;
|
|
sc->op_code = REQUEST_SENSE;
|
|
sc->byte2 = xs->sc_link->lun << 5;
|
|
sc->length = sizeof(struct scsi_sense_data);
|
|
sc->control = 0;
|
|
|
|
sg->addr = KVTOPHYS(&xs->sense);
|
|
sg->len = sizeof(struct scsi_sense_data);
|
|
|
|
scb->target_channel_lun = tcl;
|
|
scb->SG_segment_count = 1;
|
|
scb->SG_list_pointer = KVTOPHYS(sg);
|
|
scb->cmdpointer = KVTOPHYS(sc);
|
|
scb->cmdlen = sizeof(*sc);
|
|
|
|
scb->data = sg->addr;
|
|
scb->datalen = sg->len;
|
|
outb(SCBCNT + iobase, 0x80);
|
|
outsb(SCBARRAY+iobase,scb,SCB_PIO_TRANSFER_SIZE);
|
|
outb(SCBCNT + iobase, 0);
|
|
outb(SCB_NEXT_WAITING+iobase,SCB_LIST_NULL);
|
|
/*
|
|
* Ensure that the target is "BUSY"
|
|
* so we don't get overlapping
|
|
* commands if we happen to be doing
|
|
* tagged I/O.
|
|
*/
|
|
ahc_busy_target(target,channel,iobase);
|
|
|
|
/*
|
|
* Make us the next command to run
|
|
*/
|
|
ahc_add_waiting_scb(iobase, scb,
|
|
list_head);
|
|
outb(RETURN_1 + iobase, SEND_SENSE);
|
|
break;
|
|
}
|
|
/*
|
|
* Clear the SCB_SENSE Flag and have
|
|
* the sequencer do a normal command
|
|
* complete with either a "DRIVER_STUFFUP"
|
|
* error or whatever other error condition
|
|
* we already had.
|
|
*/
|
|
scb->flags &= ~SCB_SENSE;
|
|
if(xs->error == XS_NOERROR)
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
break;
|
|
case SCSI_BUSY:
|
|
xs->error = XS_BUSY;
|
|
sc_print_addr(xs->sc_link);
|
|
printf("Target Busy\n");
|
|
break;
|
|
case SCSI_QUEUE_FULL:
|
|
/*
|
|
* The upper level SCSI code will eventually
|
|
* handle this properly.
|
|
*/
|
|
sc_print_addr(xs->sc_link);
|
|
printf("Queue Full\n");
|
|
xs->error = XS_BUSY;
|
|
break;
|
|
default:
|
|
sc_print_addr(xs->sc_link);
|
|
printf("unexpected targ_status: %x\n",
|
|
scb->target_status);
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
case RESIDUAL:
|
|
{
|
|
int scb_index;
|
|
scb_index = inb(SCBPTR + iobase);
|
|
scb = ahc->scbarray[scb_index];
|
|
xs = scb->xs;
|
|
/*
|
|
* Don't clobber valid resid info with
|
|
* a resid coming from a check sense
|
|
* operation.
|
|
*/
|
|
if(!(scb->flags & SCB_SENSE)) {
|
|
int resid_sgs;
|
|
|
|
/*
|
|
* Remainder of the SG where the transfer
|
|
* stopped.
|
|
*/
|
|
scb->xs->resid =
|
|
(inb(iobase+SCB_RESID_DCNT2)<<16) |
|
|
(inb(iobase+SCB_RESID_DCNT1)<<8) |
|
|
inb(iobase+SCB_RESID_DCNT0);
|
|
|
|
/*
|
|
* Add up the contents of all residual
|
|
* SG segments that are after the SG where
|
|
* the transfer stopped.
|
|
*/
|
|
resid_sgs = inb(SCB_RESID_SGCNT + iobase) - 1;
|
|
while(resid_sgs > 0) {
|
|
int sg;
|
|
|
|
sg = scb->SG_segment_count - resid_sgs;
|
|
scb->xs->resid += scb->ahc_dma[sg].len;
|
|
resid_sgs--;
|
|
}
|
|
|
|
xs->flags |= SCSI_RESID_VALID;
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWMISC) {
|
|
sc_print_addr(xs->sc_link);
|
|
printf("Handled Residual of %ld bytes\n"
|
|
,scb->xs->resid);
|
|
}
|
|
#endif
|
|
}
|
|
break;
|
|
}
|
|
case ABORT_TAG:
|
|
{
|
|
int scb_index;
|
|
scb_index = inb(SCBPTR + iobase);
|
|
scb = ahc->scbarray[scb_index];
|
|
xs = scb->xs;
|
|
/*
|
|
* We didn't recieve a valid tag back from
|
|
* the target on a reconnect.
|
|
*/
|
|
sc_print_addr(xs->sc_link);
|
|
printf("invalid tag recieved -- sending ABORT_TAG\n");
|
|
scb->xs->error = XS_DRIVER_STUFFUP;
|
|
untimeout(ahc_timeout, (caddr_t)scb);
|
|
ahc_done(ahc, scb);
|
|
break;
|
|
}
|
|
case AWAITING_MSG:
|
|
{
|
|
int scb_index;
|
|
scb_index = inb(SCBPTR + iobase);
|
|
scb = ahc->scbarray[scb_index];
|
|
/*
|
|
* This SCB had a zero length command, informing
|
|
* the sequencer that we wanted to send a special
|
|
* message to this target. We only do this for
|
|
* BUS_DEVICE_RESET messages currently.
|
|
*/
|
|
if(scb->flags & SCB_DEVICE_RESET)
|
|
{
|
|
outb(MSG0 + iobase,
|
|
MSG_BUS_DEVICE_RESET);
|
|
outb(MSG_LEN + iobase, 1);
|
|
}
|
|
else
|
|
panic("ahcintr: AWAITING_MSG for an SCB that"
|
|
"does not have a waiting message");
|
|
break;
|
|
}
|
|
case IMMEDDONE:
|
|
{
|
|
/*
|
|
* Take care of device reset messages
|
|
*/
|
|
u_char scbindex = inb(SCBPTR + iobase);
|
|
scb = ahc->scbarray[scbindex];
|
|
if(scb->flags & SCB_DEVICE_RESET) {
|
|
u_char targ_scratch;
|
|
int found;
|
|
/*
|
|
* Go back to async/narrow transfers and
|
|
* renegotiate.
|
|
*/
|
|
ahc_unbusy_target(target, channel, iobase);
|
|
ahc->needsdtr |= ahc->needsdtr_orig & targ_mask;
|
|
ahc->needwdtr |= ahc->needwdtr_orig & targ_mask;
|
|
ahc->sdtrpending &= ~targ_mask;
|
|
ahc->wdtrpending &= ~targ_mask;
|
|
targ_scratch = inb(TARG_SCRATCH + iobase
|
|
+ scratch_offset);
|
|
targ_scratch &= SXFR;
|
|
outb(TARG_SCRATCH + iobase + scratch_offset,
|
|
targ_scratch);
|
|
found = ahc_reset_device(ahc, target,
|
|
channel, SCB_LIST_NULL,
|
|
XS_NOERROR);
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWABORTS) {
|
|
sc_print_addr(scb->xs->sc_link);
|
|
printf("Bus Device Reset delivered. "
|
|
"%d SCBs aborted\n", found);
|
|
}
|
|
#endif
|
|
}
|
|
else
|
|
panic("ahcintr: Immediate complete for "
|
|
"unknown operation.");
|
|
break;
|
|
}
|
|
#if NOT_YET
|
|
/* XXX Fill these in later */
|
|
case MESG_BUFFER_BUSY:
|
|
break;
|
|
case MSGIN_PHASEMIS:
|
|
break;
|
|
#endif
|
|
default:
|
|
printf("ahc: seqint, "
|
|
"intstat == 0x%x, scsisigi = 0x%x\n",
|
|
intstat, inb(SCSISIGI + iobase));
|
|
break;
|
|
}
|
|
clear:
|
|
/*
|
|
* Clear the upper byte that holds SEQINT status
|
|
* codes and clear the SEQINT bit.
|
|
*/
|
|
outb(CLRINT + iobase, CLRSEQINT);
|
|
|
|
/*
|
|
* The sequencer is paused immediately on
|
|
* a SEQINT, so we should restart it when
|
|
* we leave this section.
|
|
*/
|
|
UNPAUSE_SEQUENCER(ahc);
|
|
}
|
|
|
|
|
|
if (intstat & SCSIINT) {
|
|
|
|
int scb_index = inb(SCBPTR + iobase);
|
|
status = inb(SSTAT1 + iobase);
|
|
|
|
scb = ahc->scbarray[scb_index];
|
|
if (!scb || !(scb->flags & SCB_ACTIVE)) {
|
|
printf("ahc%d: ahcintr - referenced scb not "
|
|
"valid during scsiint 0x%x scb(%d)\n",
|
|
ahc->unit, status, scb_index);
|
|
outb(CLRSINT1 + iobase, status);
|
|
UNPAUSE_SEQUENCER(ahc);
|
|
outb(CLRINT + iobase, CLRSCSIINT);
|
|
scb = NULL;
|
|
goto cmdcomplete;
|
|
}
|
|
xs = scb->xs;
|
|
|
|
if (status & SELTO) {
|
|
u_char waiting;
|
|
u_char flags;
|
|
outb(SCSISEQ + iobase, ENRSELI);
|
|
xs->error = XS_TIMEOUT;
|
|
/*
|
|
* Clear any pending messages for the timed out
|
|
* target, and mark the target as free
|
|
*/
|
|
flags = inb(FLAGS + iobase);
|
|
outb(MSG_LEN + iobase, 0);
|
|
ahc_unbusy_target(xs->sc_link->target,
|
|
((long)xs->sc_link->fordriver & SELBUSB)
|
|
? 'B' : 'A',
|
|
iobase);
|
|
|
|
outb(SCBARRAY + iobase, NEEDDMA);
|
|
|
|
outb(CLRSINT1 + iobase, CLRSELTIMEO);
|
|
|
|
outb(CLRINT + iobase, CLRSCSIINT);
|
|
|
|
/* Shift the waiting for selection queue forward */
|
|
waiting = inb(WAITING_SCBH + iobase);
|
|
outb(SCBPTR + iobase, waiting);
|
|
waiting = inb(SCB_NEXT_WAITING + iobase);
|
|
outb(WAITING_SCBH + iobase, waiting);
|
|
|
|
RESTART_SEQUENCER(ahc);
|
|
}
|
|
|
|
else if (status & SCSIPERR) {
|
|
/*
|
|
* Determine the bus phase and
|
|
* queue an appropriate message
|
|
*/
|
|
char *phase;
|
|
u_char mesg_out = MSG_NOP;
|
|
u_char sigstate = inb(SIGSTATE + iobase);
|
|
|
|
sc_print_addr(xs->sc_link);
|
|
|
|
switch(sigstate) {
|
|
case P_DATAOUT:
|
|
phase = "Data-Out";
|
|
break;
|
|
case P_DATAIN:
|
|
phase = "Data-In";
|
|
mesg_out = MSG_INITIATOR_DET_ERROR;
|
|
break;
|
|
case P_COMMAND:
|
|
phase = "Command";
|
|
break;
|
|
case P_MESGOUT:
|
|
phase = "Message-Out";
|
|
break;
|
|
case P_STATUS:
|
|
phase = "Status";
|
|
mesg_out = MSG_INITIATOR_DET_ERROR;
|
|
break;
|
|
case P_MESGIN:
|
|
phase = "Message-In";
|
|
mesg_out = MSG_MSG_PARITY_ERROR;
|
|
break;
|
|
default:
|
|
phase = "unknown";
|
|
break;
|
|
}
|
|
printf("parity error during %s phase.\n", phase);
|
|
|
|
/*
|
|
* We've set the hardware to assert ATN if we
|
|
* get a parity error on "in" phases, so all we
|
|
* need to do is stuff the message buffer with
|
|
* the appropriate message. In phases have set
|
|
* mesg_out to something other than MSG_NOP.
|
|
*/
|
|
if(mesg_out != MSG_NOP) {
|
|
outb(MSG0 + iobase, mesg_out);
|
|
outb(MSG_LEN + iobase, 1);
|
|
}
|
|
else
|
|
/*
|
|
* Should we allow the target to make
|
|
* this decision for us?
|
|
*/
|
|
scb->xs->error = XS_DRIVER_STUFFUP;
|
|
|
|
outb(CLRSINT1 + iobase, CLRSCSIPERR);
|
|
UNPAUSE_SEQUENCER(ahc);
|
|
|
|
outb(CLRINT + iobase, CLRSCSIINT);
|
|
scb = NULL; /* Don't ahc_done the scb */
|
|
}
|
|
else if (!(status & BUSFREE)) {
|
|
sc_print_addr(xs->sc_link);
|
|
printf("Unknown SCSIINT. Status = 0x%x\n", status);
|
|
outb(CLRSINT1 + iobase, status);
|
|
UNPAUSE_SEQUENCER(ahc);
|
|
outb(CLRINT + iobase, CLRSCSIINT);
|
|
scb = NULL;
|
|
}
|
|
if(scb != NULL) {
|
|
/* We want to process the command */
|
|
untimeout(ahc_timeout, (caddr_t)scb);
|
|
ahc_done(ahc, scb);
|
|
}
|
|
}
|
|
cmdcomplete:
|
|
if (intstat & CMDCMPLT) {
|
|
int scb_index;
|
|
|
|
do {
|
|
scb_index = inb(QOUTFIFO + iobase);
|
|
scb = ahc->scbarray[scb_index];
|
|
if (!scb || !(scb->flags & SCB_ACTIVE)) {
|
|
printf("ahc%d: WARNING "
|
|
"no command for scb %d (cmdcmplt)\n"
|
|
"QOUTCNT == %d\n",
|
|
ahc->unit, scb_index,
|
|
inb(QOUTCNT + iobase));
|
|
outb(CLRINT + iobase, CLRCMDINT);
|
|
continue;
|
|
}
|
|
|
|
outb(CLRINT + iobase, CLRCMDINT);
|
|
untimeout(ahc_timeout, (caddr_t)scb);
|
|
ahc_done(ahc, scb);
|
|
|
|
} while (inb(QOUTCNT + iobase));
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
void
|
|
ahc_eisa_intr(arg)
|
|
void *arg;
|
|
{
|
|
ahcintr(arg);
|
|
}
|
|
|
|
/*
|
|
* We have a scb which has been processed by the
|
|
* adaptor, now we look to see how the operation
|
|
* went.
|
|
*/
|
|
static void
|
|
ahc_done(ahc, scb)
|
|
struct ahc_data *ahc;
|
|
struct scb *scb;
|
|
{
|
|
struct scsi_xfer *xs = scb->xs;
|
|
|
|
SC_DEBUG(xs->sc_link, SDEV_DB2, ("ahc_done\n"));
|
|
/*
|
|
* Put the results of the operation
|
|
* into the xfer and call whoever started it
|
|
*/
|
|
if(scb->flags & SCB_SENSE)
|
|
xs->error = XS_SENSE;
|
|
if ((xs->flags & SCSI_ERR_OK) && !(xs->error == XS_SENSE)) {
|
|
/* All went correctly OR errors expected */
|
|
xs->error = XS_NOERROR;
|
|
}
|
|
xs->flags |= ITSDONE;
|
|
#ifdef AHC_TAGENABLE
|
|
if(xs->cmd->opcode == 0x12 && xs->error == XS_NOERROR)
|
|
{
|
|
struct scsi_inquiry_data *inq_data;
|
|
u_short mask = 0x01 << (xs->sc_link->target |
|
|
(scb->target_channel_lun & 0x08));
|
|
/*
|
|
* Sneak a look at the results of the SCSI Inquiry
|
|
* command and see if we can do Tagged queing. This
|
|
* should really be done by the higher level drivers.
|
|
*/
|
|
inq_data = (struct scsi_inquiry_data *)xs->data;
|
|
if((inq_data->flags & SID_CmdQue) && !(ahc->tagenable & mask))
|
|
{
|
|
printf("ahc%d: target %d Tagged Queuing Device\n",
|
|
ahc->unit, xs->sc_link->target);
|
|
ahc->tagenable |= mask;
|
|
#ifdef QUEUE_FULL_SUPPORTED
|
|
xs->sc_link->opennings += 2;
|
|
#endif
|
|
}
|
|
}
|
|
#endif
|
|
ahc_free_scb(ahc, scb, xs->flags);
|
|
scsi_done(xs);
|
|
}
|
|
|
|
/*
|
|
* Start the board, ready for normal operation
|
|
*/
|
|
int
|
|
ahc_init(ahc)
|
|
struct ahc_data *ahc;
|
|
{
|
|
u_long iobase = ahc->baseport;
|
|
u_char scsi_conf, sblkctl, i;
|
|
int max_targ = 15;
|
|
/*
|
|
* Assume we have a board at this stage and it has been reset.
|
|
*/
|
|
|
|
/* Determine channel configuration and who we are on the scsi bus. */
|
|
switch ( (sblkctl = inb(SBLKCTL + iobase) & 0x0a) ) {
|
|
case 0:
|
|
ahc->our_id = (inb(SCSICONF + iobase) & HSCSIID);
|
|
if(ahc->type == AHC_394)
|
|
printf("Channel %c, SCSI Id=%d, ",
|
|
ahc->flags & AHC_CHNLB ? 'B' : 'A',
|
|
ahc->our_id);
|
|
else
|
|
printf("Single Channel, SCSI Id=%d, ", ahc->our_id);
|
|
outb(FLAGS + iobase, SINGLE_BUS);
|
|
break;
|
|
case 2:
|
|
ahc->our_id = (inb(SCSICONF + 1 + iobase) & HWSCSIID);
|
|
if(ahc->type == AHC_394)
|
|
printf("Wide Channel %c, SCSI Id=%d, ",
|
|
ahc->flags & AHC_CHNLB ? 'B' : 'A',
|
|
ahc->our_id);
|
|
else
|
|
printf("Wide Channel, SCSI Id=%d, ", ahc->our_id);
|
|
ahc->type |= AHC_WIDE;
|
|
outb(FLAGS + iobase, WIDE_BUS);
|
|
break;
|
|
case 8:
|
|
ahc->our_id = (inb(SCSICONF + iobase) & HSCSIID);
|
|
ahc->our_id_b = (inb(SCSICONF + 1 + iobase) & HSCSIID);
|
|
printf("Twin Channel, A SCSI Id=%d, B SCSI Id=%d, ",
|
|
ahc->our_id, ahc->our_id_b);
|
|
ahc->type |= AHC_TWIN;
|
|
outb(FLAGS + iobase, TWIN_BUS);
|
|
break;
|
|
default:
|
|
printf(" Unsupported adapter type. Ignoring\n");
|
|
return(-1);
|
|
}
|
|
|
|
printf("%d SCBs\n", ahc->maxscbs);
|
|
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWMISC) {
|
|
struct scb test;
|
|
printf("ahc%d: hardware scb %ld bytes; kernel scb; "
|
|
"ahc_dma %d bytes\n",
|
|
ahc->unit, (u_long)&(test.next) - (u_long)(&test),
|
|
sizeof(test),
|
|
sizeof(struct ahc_dma_seg));
|
|
}
|
|
#endif /* AHC_DEBUG */
|
|
|
|
/* Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels*/
|
|
if(ahc->type & AHC_TWIN)
|
|
{
|
|
/*
|
|
* The device is gated to channel B after a chip reset,
|
|
* so set those values first
|
|
*/
|
|
outb(SCSIID + iobase, ahc->our_id_b);
|
|
scsi_conf = inb(SCSICONF + 1 + iobase) & (ENSPCHK|STIMESEL);
|
|
outb(SXFRCTL1 + iobase, scsi_conf|ENSTIMER|ACTNEGEN|STPWEN);
|
|
outb(SIMODE1 + iobase, ENSELTIMO|ENSCSIPERR);
|
|
if(ahc->type & AHC_ULTRA)
|
|
outb(SXFRCTL0 + iobase, DFON|SPIOEN|ULTRAEN);
|
|
else
|
|
outb(SXFRCTL0 + iobase, DFON|SPIOEN);
|
|
|
|
/* Reset the bus */
|
|
outb(SCSISEQ + iobase, SCSIRSTO);
|
|
DELAY(1000);
|
|
outb(SCSISEQ + iobase, 0);
|
|
|
|
/* Select Channel A */
|
|
outb(SBLKCTL + iobase, 0);
|
|
}
|
|
outb(SCSIID + iobase, ahc->our_id);
|
|
scsi_conf = inb(SCSICONF + iobase) & (ENSPCHK|STIMESEL);
|
|
outb(SXFRCTL1 + iobase, scsi_conf|ENSTIMER|ACTNEGEN|STPWEN);
|
|
outb(SIMODE1 + iobase, ENSELTIMO|ENSCSIPERR);
|
|
if(ahc->type & AHC_ULTRA)
|
|
outb(SXFRCTL0 + iobase, DFON|SPIOEN|ULTRAEN);
|
|
else
|
|
outb(SXFRCTL0 + iobase, DFON|SPIOEN);
|
|
|
|
/* Reset the bus */
|
|
outb(SCSISEQ + iobase, SCSIRSTO);
|
|
DELAY(1000);
|
|
outb(SCSISEQ + iobase, 0);
|
|
|
|
/*
|
|
* Look at the information that board initialization or
|
|
* the board bios has left us. In the lower four bits of each
|
|
* target's scratch space any value other than 0 indicates
|
|
* that we should initiate syncronous transfers. If it's zero,
|
|
* the user or the BIOS has decided to disable syncronous
|
|
* negotiation to that target so we don't activate the needsdtr
|
|
* flag.
|
|
*/
|
|
ahc->needsdtr_orig = 0;
|
|
ahc->needwdtr_orig = 0;
|
|
|
|
/* Grab the disconnection disable table and invert it for our needs */
|
|
if(ahc->flags & AHC_USEDEFAULTS) {
|
|
printf("ahc%d: Host Adapter Bios disabled. Using default SCSI "
|
|
"device parameters\n", ahc->unit);
|
|
ahc->discenable = 0xff;
|
|
}
|
|
else
|
|
ahc->discenable = ~((inb(DISC_DSB + iobase + 1) << 8)
|
|
| inb(DISC_DSB + iobase));
|
|
|
|
if(!(ahc->type & (AHC_WIDE|AHC_TWIN)))
|
|
max_targ = 7;
|
|
|
|
for(i = 0; i <= max_targ; i++){
|
|
u_char target_settings;
|
|
if (ahc->flags & AHC_USEDEFAULTS) {
|
|
target_settings = 0; /* 10MHz */
|
|
ahc->needsdtr_orig |= (0x01 << i);
|
|
ahc->needwdtr_orig |= (0x01 << i);
|
|
}
|
|
else {
|
|
/* Take the settings leftover in scratch RAM. */
|
|
target_settings = inb(TARG_SCRATCH + i + iobase);
|
|
|
|
if(target_settings & 0x0f){
|
|
ahc->needsdtr_orig |= (0x01 << i);
|
|
/*Default to a asyncronous transfers(0 offset)*/
|
|
target_settings &= 0xf0;
|
|
}
|
|
if(target_settings & 0x80){
|
|
ahc->needwdtr_orig |= (0x01 << i);
|
|
/*
|
|
* We'll set the Wide flag when we
|
|
* are successful with Wide negotiation.
|
|
* Turn it off for now so we aren't
|
|
* confused.
|
|
*/
|
|
target_settings &= 0x7f;
|
|
}
|
|
}
|
|
outb(TARG_SCRATCH+i+iobase,target_settings);
|
|
}
|
|
/*
|
|
* If we are not a WIDE device, forget WDTR. This
|
|
* makes the driver work on some cards that don't
|
|
* leave these fields cleared when the BIOS is not
|
|
* installed.
|
|
*/
|
|
if(!(ahc->type & AHC_WIDE))
|
|
ahc->needwdtr_orig = 0;
|
|
ahc->needsdtr = ahc->needsdtr_orig;
|
|
ahc->needwdtr = ahc->needwdtr_orig;
|
|
ahc->sdtrpending = 0;
|
|
ahc->wdtrpending = 0;
|
|
ahc->tagenable = 0;
|
|
|
|
#ifdef AHC_DEBUG
|
|
/* How did we do? */
|
|
if(ahc_debug & AHC_SHOWMISC)
|
|
printf("NEEDSDTR == 0x%x\nNEEDWDTR == 0x%x\n"
|
|
"DISCENABLE == 0x%x\n", ahc->needsdtr,
|
|
ahc->needwdtr, ahc->discenable);
|
|
#endif
|
|
/*
|
|
* Clear the control byte for every SCB so that the sequencer
|
|
* doesn't get confused and think that one of them is valid
|
|
*/
|
|
for(i = 0; i < ahc->maxscbs; i++) {
|
|
outb(SCBPTR + iobase, i);
|
|
outb(SCBARRAY + iobase, 0);
|
|
}
|
|
|
|
/*
|
|
* Set the number of availible SCBs
|
|
*/
|
|
outb(SCBCOUNT + iobase, ahc->maxscbs);
|
|
|
|
/*
|
|
* 2s compliment of SCBCOUNT
|
|
*/
|
|
i = ahc->maxscbs;
|
|
outb(COMP_SCBCOUNT + iobase, -i & 0xff);
|
|
|
|
/* We don't have any busy targets right now */
|
|
outb( ACTIVE_A + iobase, 0 );
|
|
outb( ACTIVE_B + iobase, 0 );
|
|
|
|
/* We don't have any waiting selections */
|
|
outb( WAITING_SCBH + iobase, SCB_LIST_NULL );
|
|
outb( WAITING_SCBT + iobase, SCB_LIST_NULL );
|
|
|
|
/* Message out buffer starts empty */
|
|
outb(MSG_LEN + iobase, 0x00);
|
|
|
|
/*
|
|
* Load the Sequencer program and Enable the adapter
|
|
* in "fast" mode.
|
|
*/
|
|
if(bootverbose)
|
|
printf("ahc%d: Downloading Sequencer Program...", ahc->unit);
|
|
|
|
ahc_loadseq(iobase);
|
|
|
|
if(bootverbose)
|
|
printf("Done\n");
|
|
|
|
outb(SEQCTL + iobase, FASTMODE);
|
|
|
|
UNPAUSE_SEQUENCER(ahc);
|
|
|
|
/*
|
|
* Note that we are going and return (to probe)
|
|
*/
|
|
ahc->flags = AHC_INIT;
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
ahcminphys(bp)
|
|
struct buf *bp;
|
|
{
|
|
/*
|
|
* Even though the card can transfer up to 16megs per command
|
|
* we are limited by the number of segments in the dma segment
|
|
* list that we can hold. The worst case is that all pages are
|
|
* discontinuous physically, hense the "page per segment" limit
|
|
* enforced here.
|
|
*/
|
|
if (bp->b_bcount > ((AHC_NSEG - 1) * PAGESIZ)) {
|
|
bp->b_bcount = ((AHC_NSEG - 1) * PAGESIZ);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* start a scsi operation given the command and
|
|
* the data address, target, and lun all of which
|
|
* are stored in the scsi_xfer struct
|
|
*/
|
|
static int32
|
|
ahc_scsi_cmd(xs)
|
|
struct scsi_xfer *xs;
|
|
{
|
|
struct scb *scb = NULL;
|
|
struct ahc_dma_seg *sg;
|
|
int seg; /* scatter gather seg being worked on */
|
|
int thiskv;
|
|
physaddr thisphys, nextphys;
|
|
int unit = xs->sc_link->adapter_unit;
|
|
u_short mask = (0x01 << (xs->sc_link->target
|
|
| ((u_long)xs->sc_link->fordriver & 0x08)));
|
|
int bytes_this_seg, bytes_this_page, datalen, flags;
|
|
struct ahc_data *ahc = ahcdata[unit];
|
|
int s;
|
|
|
|
SC_DEBUG(xs->sc_link, SDEV_DB2, ("ahc_scsi_cmd\n"));
|
|
/*
|
|
* get an scb to use. If the transfer
|
|
* is from a buf (possibly from interrupt time)
|
|
* then we can't allow it to sleep
|
|
*/
|
|
flags = xs->flags;
|
|
if (flags & ITSDONE) {
|
|
printf("ahc%d: Already done?", unit);
|
|
xs->flags &= ~ITSDONE;
|
|
}
|
|
if (!(flags & INUSE)) {
|
|
printf("ahc%d: Not in use?", unit);
|
|
xs->flags |= INUSE;
|
|
}
|
|
if (!(scb = ahc_get_scb(ahc, flags))) {
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
return (TRY_AGAIN_LATER);
|
|
}
|
|
SC_DEBUG(xs->sc_link, SDEV_DB3, ("start scb(%p)\n", scb));
|
|
scb->xs = xs;
|
|
if (flags & SCSI_RESET)
|
|
scb->flags |= SCB_DEVICE_RESET|SCB_IMMED;
|
|
/*
|
|
* Put all the arguments for the xfer in the scb
|
|
*/
|
|
|
|
if(ahc->tagenable & mask)
|
|
scb->control |= TAG_ENB;
|
|
if(ahc->discenable & mask)
|
|
scb->control |= DISCENB;
|
|
if((ahc->needwdtr & mask) && !(ahc->wdtrpending & mask))
|
|
{
|
|
scb->control |= NEEDWDTR;
|
|
ahc->wdtrpending |= mask;
|
|
}
|
|
else if((ahc->needsdtr & mask) && !(ahc->sdtrpending & mask))
|
|
{
|
|
scb->control |= NEEDSDTR;
|
|
ahc->sdtrpending |= mask;
|
|
}
|
|
scb->target_channel_lun = ((xs->sc_link->target << 4) & 0xF0) |
|
|
((u_long)xs->sc_link->fordriver & 0x08) |
|
|
(xs->sc_link->lun & 0x07);
|
|
scb->cmdlen = xs->cmdlen;
|
|
scb->cmdpointer = KVTOPHYS(xs->cmd);
|
|
xs->resid = 0;
|
|
xs->status = 0;
|
|
if (xs->datalen) { /* should use S/G only if not zero length */
|
|
scb->SG_list_pointer = KVTOPHYS(scb->ahc_dma);
|
|
sg = scb->ahc_dma;
|
|
seg = 0;
|
|
{
|
|
/*
|
|
* Set up the scatter gather block
|
|
*/
|
|
SC_DEBUG(xs->sc_link, SDEV_DB4,
|
|
("%ld @%p:- ", xs->datalen, xs->data));
|
|
datalen = xs->datalen;
|
|
thiskv = (int) xs->data;
|
|
thisphys = KVTOPHYS(thiskv);
|
|
|
|
while ((datalen) && (seg < AHC_NSEG)) {
|
|
bytes_this_seg = 0;
|
|
|
|
/* put in the base address */
|
|
sg->addr = thisphys;
|
|
|
|
SC_DEBUGN(xs->sc_link, SDEV_DB4, ("0x%lx",
|
|
thisphys));
|
|
|
|
/* do it at least once */
|
|
nextphys = thisphys;
|
|
while ((datalen) && (thisphys == nextphys)) {
|
|
/*
|
|
* This page is contiguous (physically)
|
|
* with the the last, just extend the
|
|
* length
|
|
*/
|
|
/* how far to the end of the page */
|
|
nextphys = (thisphys & (~(PAGESIZ - 1)))
|
|
+ PAGESIZ;
|
|
bytes_this_page = nextphys - thisphys;
|
|
/**** or the data ****/
|
|
bytes_this_page = min(bytes_this_page
|
|
,datalen);
|
|
bytes_this_seg += bytes_this_page;
|
|
datalen -= bytes_this_page;
|
|
|
|
/* get more ready for the next page */
|
|
thiskv = (thiskv & (~(PAGESIZ - 1)))
|
|
+ PAGESIZ;
|
|
if (datalen)
|
|
thisphys = KVTOPHYS(thiskv);
|
|
}
|
|
/*
|
|
* next page isn't contiguous, finish the seg
|
|
*/
|
|
SC_DEBUGN(xs->sc_link, SDEV_DB4,
|
|
("(0x%x)", bytes_this_seg));
|
|
sg->len = bytes_this_seg;
|
|
sg++;
|
|
seg++;
|
|
}
|
|
} /*end of iov/kv decision */
|
|
scb->SG_segment_count = seg;
|
|
|
|
/* Copy the first SG into the data pointer area */
|
|
scb->data = scb->ahc_dma->addr;
|
|
scb->datalen = scb->ahc_dma->len;
|
|
SC_DEBUGN(xs->sc_link, SDEV_DB4, ("\n"));
|
|
if (datalen) {
|
|
/* there's still data, must have run out of segs! */
|
|
printf("ahc_scsi_cmd%d: more than %d DMA segs\n",
|
|
unit, AHC_NSEG);
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
ahc_free_scb(ahc, scb, flags);
|
|
return (HAD_ERROR);
|
|
}
|
|
}
|
|
else {
|
|
/*
|
|
* No data xfer, use non S/G values
|
|
*/
|
|
scb->SG_segment_count = 0;
|
|
scb->SG_list_pointer = 0;
|
|
scb->data = 0;
|
|
scb->datalen = 0;
|
|
}
|
|
|
|
/*
|
|
* Usually return SUCCESSFULLY QUEUED
|
|
*/
|
|
#ifdef AHC_DEBUG
|
|
if((ahc_debug & AHC_SHOWSCBS) && (xs->sc_link->target == DEBUGTARG))
|
|
ahc_print_scb(scb);
|
|
#endif
|
|
s = splbio();
|
|
ahc_send_scb(ahc, scb);
|
|
timeout(ahc_timeout, (caddr_t)scb, (xs->timeout * hz) / 1000);
|
|
splx(s);
|
|
SC_DEBUG(xs->sc_link, SDEV_DB3, ("cmd_sent\n"));
|
|
return (SUCCESSFULLY_QUEUED);
|
|
}
|
|
|
|
|
|
/*
|
|
* Return some information to the caller about
|
|
* the adapter and it's capabilities.
|
|
*/
|
|
static u_int32
|
|
ahc_adapter_info(unit)
|
|
int unit;
|
|
{
|
|
return (2); /* 2 outstanding requests at a time per device */
|
|
}
|
|
|
|
/*
|
|
* A scb (and hence an scb entry on the board is put onto the
|
|
* free list.
|
|
*/
|
|
static void
|
|
ahc_free_scb(ahc, scb, flags)
|
|
struct ahc_data *ahc;
|
|
int flags;
|
|
struct scb *scb;
|
|
{
|
|
unsigned int opri;
|
|
|
|
opri = splbio();
|
|
|
|
scb->flags = SCB_FREE;
|
|
scb->next = ahc->free_scb;
|
|
ahc->free_scb = scb;
|
|
#ifdef AHC_DEBUG
|
|
ahc->activescbs--;
|
|
#endif
|
|
/*
|
|
* If there were none, wake abybody waiting for
|
|
* one to come free, starting with queued entries
|
|
*/
|
|
if (!scb->next) {
|
|
wakeup((caddr_t)&ahc->free_scb);
|
|
}
|
|
splx(opri);
|
|
}
|
|
|
|
/*
|
|
* Get a free scb
|
|
* If there are none, see if we can allocate a
|
|
* new one. Otherwise either return an error or sleep
|
|
*/
|
|
static struct scb *
|
|
ahc_get_scb(ahc, flags)
|
|
struct ahc_data *ahc;
|
|
int flags;
|
|
{
|
|
unsigned opri;
|
|
struct scb *scbp;
|
|
|
|
opri = splbio();
|
|
/*
|
|
* If we can and have to, sleep waiting for one to come free
|
|
* but only if we can't allocate a new one.
|
|
*/
|
|
while (!(scbp = ahc->free_scb)) {
|
|
if (ahc->numscbs < ahc->maxscbs) {
|
|
scbp = (struct scb *) malloc(sizeof(struct scb),
|
|
M_TEMP, M_NOWAIT);
|
|
if (scbp) {
|
|
physaddr scbaddr = KVTOPHYS(scbp);
|
|
u_long iobase = ahc->baseport;
|
|
u_char curscb;
|
|
bzero(scbp, sizeof(struct scb));
|
|
scbp->position = ahc->numscbs;
|
|
ahc->numscbs++;
|
|
scbp->flags = SCB_ACTIVE;
|
|
/*
|
|
* Place in the scbarray
|
|
* Never is removed. Position
|
|
* in ahc->scbarray is the scbarray
|
|
* position on the board we will
|
|
* load it into.
|
|
*/
|
|
ahc->scbarray[scbp->position] = scbp;
|
|
|
|
/*
|
|
* Initialize the host memory location
|
|
* of this SCB down on the board and
|
|
* flag that it should be DMA's before
|
|
* reference. Also set its psuedo
|
|
* next pointer (for use in the psuedo
|
|
* list of SCBs waiting for selection)
|
|
* to SCB_LIST_NULL.
|
|
*/
|
|
scbp->control = NEEDDMA;
|
|
scbp->host_scb = scbaddr;
|
|
scbp->next_waiting = SCB_LIST_NULL;
|
|
PAUSE_SEQUENCER(ahc);
|
|
curscb = inb(SCBPTR + iobase);
|
|
outb(SCBPTR + iobase, scbp->position);
|
|
outb(SCBCNT + iobase, 0x80);
|
|
outsb(SCBARRAY+iobase,scbp,SCB_HARDWARE_SIZE);
|
|
outb(SCBCNT + iobase, 0);
|
|
outb(SCBPTR + iobase, curscb);
|
|
UNPAUSE_SEQUENCER(ahc);
|
|
scbp->control = 0;
|
|
} else {
|
|
printf("ahc%d: Can't malloc SCB\n", ahc->unit);
|
|
}
|
|
break;
|
|
} else {
|
|
if (!(flags & SCSI_NOSLEEP)) {
|
|
tsleep((caddr_t)&ahc->free_scb, PRIBIO,
|
|
"ahcscb", 0);
|
|
continue;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (scbp) {
|
|
/* Get SCB from from free list */
|
|
ahc->free_scb = scbp->next;
|
|
scbp->control = 0;
|
|
scbp->flags = SCB_ACTIVE;
|
|
#ifdef AHC_DEBUG
|
|
ahc->activescbs++;
|
|
if((ahc_debug & AHC_SHOWSCBCNT)
|
|
&& (ahc->activescbs == ahc->maxscbs))
|
|
printf("ahc%d: Max SCBs active\n", ahc->unit);
|
|
#endif
|
|
}
|
|
|
|
splx(opri);
|
|
|
|
return (scbp);
|
|
}
|
|
|
|
static void ahc_loadseq(iobase)
|
|
u_long iobase;
|
|
{
|
|
static unsigned char seqprog[] = {
|
|
# include "aic7xxx_seq.h"
|
|
};
|
|
|
|
outb(SEQCTL + iobase, PERRORDIS|SEQRESET|LOADRAM);
|
|
|
|
outsb(SEQRAM + iobase, seqprog, sizeof(seqprog));
|
|
|
|
outb(SEQCTL + iobase, FASTMODE|SEQRESET);
|
|
do {
|
|
outb(SEQCTL + iobase, SEQRESET|FASTMODE);
|
|
|
|
} while (inb(SEQADDR0 + iobase) != 0 &&
|
|
inb(SEQADDR1 + iobase != 0));
|
|
}
|
|
|
|
static void
|
|
ahc_scb_timeout(ahc, scb)
|
|
struct ahc_data *ahc;
|
|
struct scb *scb;
|
|
{
|
|
u_long iobase = ahc->baseport;
|
|
int found = 0;
|
|
char channel = scb->target_channel_lun & SELBUSB ? 'B': 'A';
|
|
|
|
/*
|
|
* Ensure that the card doesn't do anything
|
|
* behind our back.
|
|
*/
|
|
PAUSE_SEQUENCER(ahc);
|
|
|
|
/*
|
|
* First, determine if we want to do a bus
|
|
* reset or simply a bus device reset.
|
|
* If this is the first time that a transaction
|
|
* has timed out, just schedule a bus device
|
|
* reset. Otherwise, we reset the bus and
|
|
* abort all pending I/Os on that bus.
|
|
*/
|
|
if(scb->flags & SCB_ABORTED)
|
|
{
|
|
/*
|
|
* Been down this road before.
|
|
* Do a full bus reset.
|
|
*/
|
|
found = ahc_reset_channel(ahc, channel, scb->position,
|
|
XS_TIMEOUT);
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWABORTS)
|
|
printf("ahc%d: Issued Channel %c Bus Reset #1. "
|
|
"%d SCBs aborted\n", ahc->unit, channel, found);
|
|
#endif
|
|
}
|
|
else {
|
|
/*
|
|
* Send a Bus Device Reset Message:
|
|
* The target we select to send the message to may
|
|
* be entirely different than the target pointed to
|
|
* by the scb that timed out. If the command is
|
|
* in the QINFIFO or the waiting for selection list,
|
|
* its not tying up the bus and isn't responsible
|
|
* for the delay so we pick off the active command
|
|
* which should be the SCB selected by SCBPTR. If
|
|
* its disconnected or active, we device reset the
|
|
* target scbp points to. Although it may be that
|
|
* this target is not responsible for the delay, it
|
|
* may also be that we're timing out on a command that
|
|
* just takes too much time, so we try the bus device
|
|
* reset there first.
|
|
*/
|
|
u_char active_scb, control;
|
|
struct scb *active_scbp;
|
|
active_scb = inb(SCBPTR + iobase);
|
|
active_scbp = ahc->scbarray[active_scb];
|
|
control = inb(SCBARRAY + iobase);
|
|
|
|
/* Test to see if scbp is disconnected */
|
|
outb(SCBPTR + iobase, scb->position);
|
|
if(inb(SCB_CONTROL + iobase) & DISCONNECTED) {
|
|
scb->flags |= SCB_DEVICE_RESET|SCB_ABORTED;
|
|
scb->SG_segment_count = 0;
|
|
scb->SG_list_pointer = 0;
|
|
scb->data = 0;
|
|
scb->datalen = 0;
|
|
outb(SCBCNT + iobase, 0x80);
|
|
outsb(SCBARRAY+iobase,scb,SCB_PIO_TRANSFER_SIZE);
|
|
outb(SCBCNT + iobase, 0);
|
|
ahc_add_waiting_scb(iobase, scb, list_second);
|
|
timeout(ahc_timeout, (caddr_t)scb, (2 * hz));
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWABORTS) {
|
|
sc_print_addr(scb->xs->sc_link);
|
|
printf("BUS DEVICE RESET message queued.\n");
|
|
}
|
|
#endif
|
|
UNPAUSE_SEQUENCER(ahc);
|
|
}
|
|
/* Is the active SCB really active? */
|
|
else if((active_scbp->flags & SCB_ACTIVE)
|
|
&& (control & NEEDDMA) == NEEDDMA) {
|
|
u_char msg_len = inb(MSG_LEN + iobase);
|
|
if(msg_len) {
|
|
/*
|
|
* If we're in a message phase, tacking on
|
|
* another message may confuse the target totally.
|
|
* The bus is probably wedged, so reset the
|
|
* channel.
|
|
*/
|
|
channel = (active_scbp->target_channel_lun & SELBUSB)
|
|
? 'B': 'A';
|
|
ahc_reset_channel(ahc, channel, scb->position,
|
|
XS_TIMEOUT);
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWABORTS)
|
|
printf("ahc%d: Issued Channel %c Bus Reset #2. "
|
|
"%d SCBs aborted\n", ahc->unit, channel,
|
|
found);
|
|
#endif
|
|
}
|
|
else {
|
|
/*
|
|
* Load the message buffer and assert attention.
|
|
*/
|
|
active_scbp->flags |= SCB_DEVICE_RESET|SCB_ABORTED;
|
|
if(active_scbp != scb)
|
|
untimeout(ahc_timeout, (caddr_t)active_scbp);
|
|
timeout(ahc_timeout, (caddr_t)active_scbp, (2 * hz));
|
|
outb(MSG_LEN + iobase, 1);
|
|
outb(MSG0 + iobase, MSG_BUS_DEVICE_RESET);
|
|
if(active_scbp->target_channel_lun
|
|
!= scb->target_channel_lun) {
|
|
/* Give scb a new lease on life */
|
|
timeout(ahc_timeout, (caddr_t)scb,
|
|
(scb->xs->timeout * hz) / 1000);
|
|
}
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWABORTS) {
|
|
sc_print_addr(active_scbp->xs->sc_link);
|
|
printf("BUS DEVICE RESET message queued.\n");
|
|
}
|
|
#endif
|
|
UNPAUSE_SEQUENCER(ahc);
|
|
}
|
|
}
|
|
else {
|
|
/*
|
|
* No active command to single out, so reset
|
|
* the bus for the timed out target.
|
|
*/
|
|
ahc_reset_channel(ahc, channel, scb->position,
|
|
XS_TIMEOUT);
|
|
#ifdef AHC_DEBUG
|
|
if(ahc_debug & AHC_SHOWABORTS)
|
|
printf("ahc%d: Issued Channel %c Bus Reset #3. "
|
|
"%d SCBs aborted\n", ahc->unit, channel,
|
|
found);
|
|
#endif
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
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ahc_timeout(void *arg1)
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{
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struct scb *scb = (struct scb *)arg1;
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int unit;
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struct ahc_data *ahc;
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int s;
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s = splhigh();
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if (!(scb->flags & SCB_ACTIVE)) {
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/* Previous timeout took care of me already */
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splx(s);
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return;
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}
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unit = scb->xs->sc_link->adapter_unit;
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ahc = ahcdata[unit];
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printf("ahc%d: target %d, lun %d (%s%d) timed out\n", unit
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,scb->xs->sc_link->target
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,scb->xs->sc_link->lun
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,scb->xs->sc_link->device->name
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,scb->xs->sc_link->dev_unit);
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#ifdef SCSIDEBUG
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show_scsi_cmd(scb->xs);
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#endif
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#ifdef AHC_DEBUG
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if (ahc_debug & AHC_SHOWSCBS)
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ahc_print_active_scb(ahc);
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#endif /*AHC_DEBUG */
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/*
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* If it's immediate, don't try to abort it
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*/
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if (scb->flags & SCB_IMMED) {
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scb->xs->retries = 0; /* I MEAN IT ! */
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ahc_done(ahc, scb);
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}
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else {
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/* abort the operation that has timed out */
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ahc_scb_timeout(ahc, scb);
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}
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splx(s);
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}
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/*
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* The device at the given target/channel has been reset. Abort
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* all active and queued scbs for that target/channel.
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*/
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static int
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ahc_reset_device(ahc, target, channel, timedout_scb, xs_error)
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struct ahc_data *ahc;
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int target;
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char channel;
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u_char timedout_scb;
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u_int32 xs_error;
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{
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u_long iobase = ahc->baseport;
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struct scb *scbp;
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u_char active_scb;
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int i = 0;
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int found = 0;
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/* restore this when we're done */
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active_scb = inb(SCBPTR + iobase);
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/*
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* Search the QINFIFO.
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*/
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{
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int saved_queue[AHC_SCB_MAX];
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int queued = inb(QINCNT + iobase);
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for (i = 0; i < (queued - found); i++) {
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saved_queue[i] = inb(QINFIFO + iobase);
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scbp = ahc->scbarray[saved_queue[i]];
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if (ahc_match_scb (scbp, target, channel)){
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/*
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* We found an scb that needs to be aborted.
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*/
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scbp->flags |= SCB_ABORTED;
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scbp->xs->error |= xs_error;
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if(scbp->position != timedout_scb)
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untimeout(ahc_timeout, (caddr_t)scbp);
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ahc_done (ahc, scbp);
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outb(SCBPTR + iobase, scbp->position);
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outb(SCBARRAY + iobase, NEEDDMA);
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i--;
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found++;
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}
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}
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/* Now put the saved scbs back. */
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for (queued = 0; queued < i; queued++) {
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outb (QINFIFO + iobase, saved_queue[queued]);
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}
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}
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/*
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* Search waiting for selection list.
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*/
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{
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u_char next, prev;
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next = inb(WAITING_SCBH + iobase); /* Start at head of list. */
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prev = SCB_LIST_NULL;
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while (next != SCB_LIST_NULL) {
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scbp = ahc->scbarray[next];
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/*
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* Select the SCB.
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*/
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if (ahc_match_scb(scbp, target, channel)) {
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next = ahc_abort_wscb(ahc, scbp, prev,
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iobase, timedout_scb, xs_error);
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found++;
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}
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else {
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outb(SCBPTR + iobase, scbp->position);
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prev = next;
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next = inb(SCB_NEXT_WAITING + iobase);
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}
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}
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}
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/*
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* Go through the entire SCB array now and look for
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* commands for this target that are active. These
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* are other (most likely tagged) commands that
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* were disconnected when the reset occured.
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*/
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for(i = 0; i < ahc->numscbs; i++) {
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scbp = ahc->scbarray[i];
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if((scbp->flags & SCB_ACTIVE)
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&& ahc_match_scb(scbp, target, channel)) {
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/* Ensure the target is "free" */
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ahc_unbusy_target(target, channel, iobase);
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outb(SCBPTR + iobase, scbp->position);
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outb(SCBARRAY + iobase, NEEDDMA);
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scbp->flags |= SCB_ABORTED;
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scbp->xs->error |= xs_error;
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if(scbp->position != timedout_scb)
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untimeout(ahc_timeout, (caddr_t)scbp);
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ahc_done (ahc, scbp);
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found++;
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}
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}
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outb(SCBPTR + iobase, active_scb);
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return found;
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}
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/*
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* Manipulate the waiting for selection list and return the
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* scb that follows the one that we remove.
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*/
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static u_char
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ahc_abort_wscb (ahc, scbp, prev, iobase, timedout_scb, xs_error)
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struct ahc_data *ahc;
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struct scb *scbp;
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u_char prev;
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u_long iobase;
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u_char timedout_scb;
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u_int32 xs_error;
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{
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u_char curscbp, next;
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int target = ((scbp->target_channel_lun >> 4) & 0x0f);
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char channel = (scbp->target_channel_lun & SELBUSB) ? 'B' : 'A';
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/*
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* Select the SCB we want to abort and
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* pull the next pointer out of it.
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*/
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curscbp = inb(SCBPTR + iobase);
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outb(SCBPTR + iobase, scbp->position);
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next = inb(SCB_NEXT_WAITING + iobase);
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/* Clear the necessary fields */
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outb(SCBARRAY + iobase, NEEDDMA);
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outb(SCB_NEXT_WAITING + iobase, SCB_LIST_NULL);
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ahc_unbusy_target(target, channel, iobase);
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/* update the waiting list */
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if( prev == SCB_LIST_NULL )
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/* First in the list */
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outb(WAITING_SCBH + iobase, next);
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else {
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/*
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* Select the scb that pointed to us
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* and update its next pointer.
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*/
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outb(SCBPTR + iobase, prev);
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outb(SCB_NEXT_WAITING + iobase, next);
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}
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/* Update the tale pointer */
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if(inb(WAITING_SCBT + iobase) == scbp->position)
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outb(WAITING_SCBT + iobase, prev);
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/*
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* Point us back at the original scb position
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* and inform the SCSI system that the command
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* has been aborted.
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*/
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outb(SCBPTR + iobase, curscbp);
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scbp->flags |= SCB_ABORTED;
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scbp->xs->error |= xs_error;
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if(scbp->position != timedout_scb)
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untimeout(ahc_timeout, (caddr_t)scbp);
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ahc_done (ahc, scbp);
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return next;
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}
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static void
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ahc_busy_target(target, channel, iobase)
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u_char target;
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char channel;
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u_long iobase;
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{
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u_char active;
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u_long active_port = ACTIVE_A + iobase;
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if(target > 0x07 || channel == 'B') {
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/*
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* targets on the Second channel or
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* above id 7 store info in byte two
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* of HA_ACTIVE
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*/
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active_port++;
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}
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active = inb(active_port);
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active |= (0x01 << (target & 0x07));
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outb(active_port, active);
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}
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static void
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ahc_unbusy_target(target, channel, iobase)
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u_char target;
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char channel;
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u_long iobase;
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{
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u_char active;
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u_long active_port = ACTIVE_A + iobase;
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if(target > 0x07 || channel == 'B') {
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/*
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* targets on the Second channel or
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* above id 7 store info in byte two
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* of HA_ACTIVE
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*/
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active_port++;
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}
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active = inb(active_port);
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active &= ~(0x01 << (target & 0x07));
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outb(active_port, active);
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}
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static void
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ahc_reset_current_bus(iobase)
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u_long iobase;
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{
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outb(SCSISEQ + iobase, SCSIRSTO);
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DELAY(1000);
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outb(SCSISEQ + iobase, 0);
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}
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static int
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ahc_reset_channel(ahc, channel, timedout_scb, xs_error)
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struct ahc_data *ahc;
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char channel;
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u_char timedout_scb;
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u_int32 xs_error;
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{
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u_long iobase = ahc->baseport;
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u_char sblkctl;
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char cur_channel;
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u_long offset, offset_max;
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int found;
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/*
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* Clean up all the state information for the
|
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* pending transactions on this bus.
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*/
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found = ahc_reset_device(ahc, ALL_TARGETS, channel,
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timedout_scb, xs_error);
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if(channel == 'B'){
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ahc->needsdtr |= (ahc->needsdtr_orig & 0xff00);
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ahc->sdtrpending &= 0x00ff;
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outb(ACTIVE_B + iobase, 0);
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offset = TARG_SCRATCH + iobase + 8;
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offset_max = TARG_SCRATCH + iobase + 16;
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}
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else if (ahc->type & AHC_WIDE){
|
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ahc->needsdtr = ahc->needsdtr_orig;
|
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ahc->needwdtr = ahc->needwdtr_orig;
|
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ahc->sdtrpending = 0;
|
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ahc->wdtrpending = 0;
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outb(ACTIVE_A + iobase, 0);
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outb(ACTIVE_B + iobase, 0);
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offset = TARG_SCRATCH + iobase;
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offset_max = TARG_SCRATCH + iobase + 16;
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}
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else{
|
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ahc->needsdtr |= (ahc->needsdtr_orig & 0x00ff);
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ahc->sdtrpending &= 0xff00;
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outb(ACTIVE_A + iobase, 0);
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offset = TARG_SCRATCH + iobase;
|
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offset_max = TARG_SCRATCH + iobase + 8;
|
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}
|
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for(;offset < offset_max;offset++) {
|
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/*
|
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* Revert to async/narrow transfers
|
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* until we renegotiate.
|
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*/
|
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u_char targ_scratch;
|
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targ_scratch = inb(offset);
|
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targ_scratch &= SXFR;
|
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outb(offset, targ_scratch);
|
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}
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|
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/*
|
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* Reset the bus and unpause/restart the controller
|
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*/
|
|
|
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/* Case 1: Command for another bus is active */
|
|
sblkctl = inb(SBLKCTL + iobase);
|
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cur_channel = (sblkctl & SELBUSB) ? 'B' : 'A';
|
|
if(cur_channel != channel)
|
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{
|
|
/*
|
|
* Stealthily reset the other bus
|
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* without upsetting the current bus
|
|
*/
|
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outb(SBLKCTL + iobase, sblkctl ^ SELBUSB);
|
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ahc_reset_current_bus(iobase);
|
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outb(SBLKCTL + iobase, sblkctl);
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UNPAUSE_SEQUENCER(ahc);
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}
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/* Case 2: A command from this bus is active or we're idle */
|
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else {
|
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ahc_reset_current_bus(iobase);
|
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RESTART_SEQUENCER(ahc);
|
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}
|
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return found;
|
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}
|
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|
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static int
|
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ahc_match_scb (scb, target, channel)
|
|
struct scb *scb;
|
|
int target;
|
|
char channel;
|
|
{
|
|
int targ = (scb->target_channel_lun >> 4) & 0x0f;
|
|
char chan = (scb->target_channel_lun & SELBUSB) ? 'B' : 'A';
|
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|
|
if (target == ALL_TARGETS)
|
|
return (chan == channel);
|
|
else
|
|
return ((chan == channel) && (targ == target));
|
|
}
|