bb5c955e8d
This is an AR9331 part based on the AP121 reference design but with 32MB RAM. Yes, it has 4MB flash and it has no USB, so clever hacks are required to get it up and working. But boot/work it does.
88 lines
2.4 KiB
Plaintext
88 lines
2.4 KiB
Plaintext
#
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# This file adds to the values in AR933X_BASE.hints
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#
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# $FreeBSD$
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# mdiobus on arge1
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hint.argemdio.0.at="nexus0"
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hint.argemdio.0.maddr=0x1a000000
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hint.argemdio.0.msize=0x1000
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hint.argemdio.0.order=0
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# Embedded Atheros Switch
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hint.arswitch.0.at="mdio0"
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# XXX this should really say it's an AR933x switch, as there
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# are some vlan specific differences here!
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hint.arswitch.0.is_7240=1
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hint.arswitch.0.numphys=4
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hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY
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hint.arswitch.0.is_rgmii=0
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hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII
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# arge0 - MII, autoneg, phy(4)
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hint.arge.0.phymask=0x10 # PHY4
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hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus
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hint.arge.0.eeprommac=0x1fff0000
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# arge1 - GMII, 1000/full
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hint.arge.1.phymask=0x0 # No directly mapped PHYs
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hint.arge.1.media=1000
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hint.arge.1.fduplex=1
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hint.arge.1.eeprommac=0x1fff0006
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# Where the ART is - last 64k in the flash
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# 0x9fff1000 ?
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hint.ath.0.eepromaddr=0x1fff0000
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hint.ath.0.eepromsize=16384
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# The TL-WR740N v4 is a default AP121 - it comes with 4MB flash.
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#
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# The boot parameters:
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# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs init=/sbin/init
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# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs),
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# 896k(uImage),64k(NVRAM),64k(ART)
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# bootcmd=bootm 0x9f020000
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#
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# .. so uboot is 128K, there's no ubootenv, and the runtime image starts
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# at 0x9f020000.
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hint.map.0.at="flash/spi0"
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hint.map.0.start=0x00000000
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hint.map.0.end=0x000020000
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hint.map.0.name="uboot"
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hint.map.0.readonly=1
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hint.map.1.at="flash/spi0"
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hint.map.1.start=0x00020000
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hint.map.1.end=0x003e0000
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hint.map.1.name="kernel"
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hint.map.1.readonly=0
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hint.map.2.at="flash/spi0"
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hint.map.2.start=0x003e0000
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hint.map.2.end=0x003f0000
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hint.map.2.name="cfg"
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hint.map.2.readonly=0
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# This is radio calibration section. It is (or should be!) unique
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# for each board, to take into account thermal and electrical differences
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# as well as the regulatory compliance data.
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#
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hint.map.3.at="flash/spi0"
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hint.map.3.start=0x003f0000
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hint.map.3.end=0x0x400000
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hint.map.3.name="art"
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hint.map.3.readonly=1
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# GPIO specific configuration block
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# Don't flip on anything that isn't already enabled.
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# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
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# not used here.
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hint.gpio.0.function_set=0x00000000
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hint.gpio.0.function_clear=0x00000000
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# These are the GPIO LEDs and buttons which can be software controlled.
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# hint.gpio.0.pinmask=0x00fc1803
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