3631682eab
function.
631 lines
18 KiB
C
631 lines
18 KiB
C
/*-
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* Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/imgact.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/cons.h>
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#include <sys/exec.h>
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#include <sys/ucontext.h>
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#include <sys/proc.h>
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#include <sys/kdb.h>
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#include <sys/ptrace.h>
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#include <sys/reboot.h>
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#include <sys/signalvar.h>
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#include <sys/sysctl.h>
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#include <sys/sysent.h>
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#include <sys/sysproto.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/user.h>
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#include <vm/vm.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_pager.h>
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#include <machine/atomic.h>
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#include <machine/cache.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/cpuregs.h>
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#include <machine/cpufunc.h>
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#include <mips/cavium/octeon_pcmap_regs.h>
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#include <machine/hwfunc.h>
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#include <machine/intr_machdep.h>
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#include <machine/locore.h>
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#include <machine/md_var.h>
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#include <machine/pcpu.h>
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#include <machine/pte.h>
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#include <machine/trap.h>
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#include <machine/vmparam.h>
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#include <contrib/octeon-sdk/cvmx.h>
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#include <contrib/octeon-sdk/cvmx-bootmem.h>
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#include <contrib/octeon-sdk/cvmx-ebt3000.h>
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#include <contrib/octeon-sdk/cvmx-helper-cfg.h>
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#include <contrib/octeon-sdk/cvmx-interrupt.h>
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#include <contrib/octeon-sdk/cvmx-version.h>
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#include <mips/cavium/octeon_irq.h>
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#if defined(__mips_n64)
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#define MAX_APP_DESC_ADDR 0xffffffffafffffff
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#else
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#define MAX_APP_DESC_ADDR 0xafffffff
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#endif
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#define OCTEON_CLOCK_DEFAULT (500 * 1000 * 1000)
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struct octeon_feature_description {
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octeon_feature_t ofd_feature;
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const char *ofd_string;
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};
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extern int *edata;
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extern int *end;
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extern char cpu_model[];
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extern char cpu_board[];
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static const struct octeon_feature_description octeon_feature_descriptions[] = {
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{ OCTEON_FEATURE_SAAD, "SAAD" },
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{ OCTEON_FEATURE_ZIP, "ZIP" },
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{ OCTEON_FEATURE_CRYPTO, "CRYPTO" },
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{ OCTEON_FEATURE_DORM_CRYPTO, "DORM_CRYPTO" },
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{ OCTEON_FEATURE_PCIE, "PCIE" },
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{ OCTEON_FEATURE_SRIO, "SRIO" },
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{ OCTEON_FEATURE_KEY_MEMORY, "KEY_MEMORY" },
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{ OCTEON_FEATURE_LED_CONTROLLER, "LED_CONTROLLER" },
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{ OCTEON_FEATURE_TRA, "TRA" },
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{ OCTEON_FEATURE_MGMT_PORT, "MGMT_PORT" },
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{ OCTEON_FEATURE_RAID, "RAID" },
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{ OCTEON_FEATURE_USB, "USB" },
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{ OCTEON_FEATURE_NO_WPTR, "NO_WPTR" },
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{ OCTEON_FEATURE_DFA, "DFA" },
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{ OCTEON_FEATURE_MDIO_CLAUSE_45, "MDIO_CLAUSE_45" },
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{ OCTEON_FEATURE_NPEI, "NPEI" },
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{ OCTEON_FEATURE_ILK, "ILK" },
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{ OCTEON_FEATURE_HFA, "HFA" },
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{ OCTEON_FEATURE_DFM, "DFM" },
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{ OCTEON_FEATURE_CIU2, "CIU2" },
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{ OCTEON_FEATURE_DICI_MODE, "DICI_MODE" },
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{ OCTEON_FEATURE_BIT_EXTRACTOR, "BIT_EXTRACTOR" },
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{ OCTEON_FEATURE_NAND, "NAND" },
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{ OCTEON_FEATURE_MMC, "MMC" },
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{ OCTEON_FEATURE_PKND, "PKND" },
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{ OCTEON_FEATURE_CN68XX_WQE, "CN68XX_WQE" },
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{ 0, NULL }
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};
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static uint64_t octeon_get_ticks(void);
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static unsigned octeon_get_timecount(struct timecounter *tc);
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static void octeon_boot_params_init(register_t ptr);
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static struct timecounter octeon_timecounter = {
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octeon_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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0xffffffffu, /* octeon_mask */
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0, /* frequency */
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"Octeon", /* name */
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900, /* quality (adjusted in code) */
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};
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void
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platform_cpu_init()
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{
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/* Nothing special yet */
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}
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/*
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* Perform a board-level soft-reset.
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*/
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void
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platform_reset(void)
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{
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cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
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}
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/*
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* octeon_debug_symbol
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*
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* Does nothing.
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* Used to mark the point for simulator to begin tracing
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*/
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void
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octeon_debug_symbol(void)
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{
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}
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/*
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* octeon_ciu_reset
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*
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* Shutdown all CIU to IP2, IP3 mappings
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*/
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void
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octeon_ciu_reset(void)
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{
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uint64_t cvmctl;
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/* Disable all CIU interrupts by default */
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cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), 0);
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cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), 0);
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cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), 0);
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cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2+1), 0);
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#ifdef SMP
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/* Enable the MBOX interrupts. */
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cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1),
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(1ull << (OCTEON_IRQ_MBOX0 - 8)) |
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(1ull << (OCTEON_IRQ_MBOX1 - 8)));
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#endif
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/*
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* Move the Performance Counter interrupt to OCTEON_PMC_IRQ
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*/
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cvmctl = mips_rd_cvmctl();
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cvmctl &= ~(7 << 7);
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cvmctl |= (OCTEON_PMC_IRQ + 2) << 7;
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mips_wr_cvmctl(cvmctl);
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}
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static void
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octeon_memory_init(void)
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{
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vm_paddr_t phys_end;
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int64_t addr;
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unsigned i, j;
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phys_end = round_page(MIPS_KSEG0_TO_PHYS((vm_offset_t)&end));
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if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
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/* Simulator we limit to 96 meg */
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phys_avail[0] = phys_end;
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phys_avail[1] = 96 << 20;
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dump_avail[0] = phys_avail[0];
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dump_avail[1] = phys_avail[1];
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realmem = physmem = btoc(phys_avail[1] - phys_avail[0]);
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return;
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}
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/*
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* Allocate memory from bootmem 1MB at a time and merge
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* adjacent entries.
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*/
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i = 0;
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while (i < PHYS_AVAIL_ENTRIES) {
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/*
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* If there is less than 2MB of memory available in 128-byte
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* blocks, do not steal any more memory. We need to leave some
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* memory for the command queues to be allocated out of.
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*/
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if (cvmx_bootmem_available_mem(128) < 2 << 20)
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break;
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addr = cvmx_bootmem_phy_alloc(1 << 20, phys_end,
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~(vm_paddr_t)0, PAGE_SIZE, 0);
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if (addr == -1)
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break;
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/*
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* The SDK needs to be able to easily map any memory that might
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* come to it e.g. in the form of an mbuf. Because on !n64 we
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* can't direct-map some addresses and we don't want to manage
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* temporary mappings within the SDK, don't feed memory that
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* can't be direct-mapped to the kernel.
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*/
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#if !defined(__mips_n64)
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if (!MIPS_DIRECT_MAPPABLE(addr + (1 << 20) - 1))
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continue;
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#endif
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physmem += btoc(1 << 20);
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if (i > 0 && phys_avail[i - 1] == addr) {
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phys_avail[i - 1] += 1 << 20;
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continue;
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}
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phys_avail[i + 0] = addr;
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phys_avail[i + 1] = addr + (1 << 20);
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i += 2;
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}
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for (j = 0; j < i; j++)
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dump_avail[j] = phys_avail[j];
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realmem = physmem;
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}
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void
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platform_start(__register_t a0, __register_t a1, __register_t a2 __unused,
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__register_t a3)
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{
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const struct octeon_feature_description *ofd;
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uint64_t platform_counter_freq;
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/*
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* XXX
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* octeon_boot_params_init() should be called before anything else,
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* certainly before any output; we may find out from the boot
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* descriptor's flags that we're supposed to use the PCI or UART1
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* consoles rather than UART0. No point doing that reorganization
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* until we actually intercept UART_DEV_CONSOLE for the UART1 case
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* and somehow handle the PCI console, which we lack code for
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* entirely.
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*/
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mips_postboot_fixup();
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/* Initialize pcpu stuff */
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mips_pcpu0_init();
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mips_timer_early_init(OCTEON_CLOCK_DEFAULT);
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cninit();
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octeon_ciu_reset();
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octeon_boot_params_init(a3);
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/*
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* XXX
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* We can certainly parse command line arguments or U-Boot environment
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* to determine whether to bootverbose / single user / ... I think
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* stass has patches to add support for loader things to U-Boot even.
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*/
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bootverbose = 1;
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/*
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* For some reason on the cn38xx simulator ebase register is set to
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* 0x80001000 at bootup time. Move it back to the default, but
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* when we move to having support for multiple executives, we need
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* to rethink this.
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*/
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mips_wr_ebase(0x80000000);
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octeon_memory_init();
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init_param1();
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init_param2(physmem);
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mips_cpu_init();
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pmap_bootstrap();
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mips_proc0_init();
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mutex_init();
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kdb_init();
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#ifdef KDB
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if (boothowto & RB_KDB)
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kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
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#endif
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cpu_clock = cvmx_sysinfo_get()->cpu_clock_hz;
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platform_counter_freq = cpu_clock;
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octeon_timecounter.tc_frequency = cpu_clock;
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platform_timecounter = &octeon_timecounter;
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mips_timer_init_params(platform_counter_freq, 0);
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set_cputicker(octeon_get_ticks, cpu_clock, 0);
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#ifdef SMP
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/*
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* Clear any pending IPIs.
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*/
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cvmx_write_csr(CVMX_CIU_MBOX_CLRX(0), 0xffffffff);
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#endif
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printf("Octeon SDK: %s\n", OCTEON_SDK_VERSION_STRING);
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printf("Available Octeon features:");
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for (ofd = octeon_feature_descriptions; ofd->ofd_string != NULL; ofd++)
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if (octeon_has_feature(ofd->ofd_feature))
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printf(" %s", ofd->ofd_string);
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printf("\n");
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}
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static uint64_t
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octeon_get_ticks(void)
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{
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uint64_t cvmcount;
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CVMX_MF_CYCLE(cvmcount);
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return (cvmcount);
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}
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static unsigned
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octeon_get_timecount(struct timecounter *tc)
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{
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return ((unsigned)octeon_get_ticks());
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}
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static int
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sysctl_machdep_led_display(SYSCTL_HANDLER_ARGS)
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{
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size_t buflen;
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char buf[9];
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int error;
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if (req->newptr == NULL)
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return (EINVAL);
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if (cvmx_sysinfo_get()->led_display_base_addr == 0)
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return (ENODEV);
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/*
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* Revision 1.x of the EBT3000 only supports 4 characters, but
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* other devices support 8.
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*/
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if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
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cvmx_sysinfo_get()->board_rev_major == 1)
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buflen = 4;
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else
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buflen = 8;
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if (req->newlen > buflen)
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return (E2BIG);
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error = SYSCTL_IN(req, buf, req->newlen);
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if (error != 0)
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return (error);
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buf[req->newlen] = '\0';
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ebt3000_str_write(buf);
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return (0);
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}
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SYSCTL_PROC(_machdep, OID_AUTO, led_display, CTLTYPE_STRING | CTLFLAG_WR,
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NULL, 0, sysctl_machdep_led_display, "A",
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"String to display on LED display");
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/**
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* version of printf that works better in exception context.
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*
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* @param format
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*
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* XXX If this function weren't in cvmx-interrupt.c, we'd use the SDK version.
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*/
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void cvmx_safe_printf(const char *format, ...)
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{
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char buffer[256];
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char *ptr = buffer;
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int count;
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va_list args;
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va_start(args, format);
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#ifndef __U_BOOT__
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count = vsnprintf(buffer, sizeof(buffer), format, args);
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#else
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count = vsprintf(buffer, format, args);
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#endif
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va_end(args);
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while (count-- > 0)
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{
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cvmx_uart_lsr_t lsrval;
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/* Spin until there is room */
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do
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{
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lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0));
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#if !defined(CONFIG_OCTEON_SIM_SPEED)
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if (lsrval.s.temt == 0)
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cvmx_wait(10000); /* Just to reduce the load on the system */
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#endif
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}
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while (lsrval.s.temt == 0);
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if (*ptr == '\n')
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cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r');
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cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++);
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}
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}
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/* impSTART: This stuff should move back into the Cavium SDK */
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/*
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****************************************************************************************
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*
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* APP/BOOT DESCRIPTOR STUFF
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*
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****************************************************************************************
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*/
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/* Define the struct that is initialized by the bootloader used by the
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* startup code.
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*
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* Copyright (c) 2004, 2005, 2006 Cavium Networks.
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
|
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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#define OCTEON_CURRENT_DESC_VERSION 6
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#define OCTEON_ARGV_MAX_ARGS (64)
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#define OCTOEN_SERIAL_LEN 20
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typedef struct {
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/* Start of block referenced by assembly code - do not change! */
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uint32_t desc_version;
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uint32_t desc_size;
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uint64_t stack_top;
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uint64_t heap_base;
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uint64_t heap_end;
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uint64_t entry_point; /* Only used by bootloader */
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uint64_t desc_vaddr;
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/* End of This block referenced by assembly code - do not change! */
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uint32_t exception_base_addr;
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uint32_t stack_size;
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uint32_t heap_size;
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uint32_t argc; /* Argc count for application */
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uint32_t argv[OCTEON_ARGV_MAX_ARGS];
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|
uint32_t flags;
|
|
uint32_t core_mask;
|
|
uint32_t dram_size; /**< DRAM size in megabyes */
|
|
uint32_t phy_mem_desc_addr; /**< physical address of free memory descriptor block*/
|
|
uint32_t debugger_flags_base_addr; /**< used to pass flags from app to debugger */
|
|
uint32_t eclock_hz; /**< CPU clock speed, in hz */
|
|
uint32_t dclock_hz; /**< DRAM clock speed, in hz */
|
|
uint32_t spi_clock_hz; /**< SPI4 clock in hz */
|
|
uint16_t board_type;
|
|
uint8_t board_rev_major;
|
|
uint8_t board_rev_minor;
|
|
uint16_t chip_type;
|
|
uint8_t chip_rev_major;
|
|
uint8_t chip_rev_minor;
|
|
char board_serial_number[OCTOEN_SERIAL_LEN];
|
|
uint8_t mac_addr_base[6];
|
|
uint8_t mac_addr_count;
|
|
uint64_t cvmx_desc_vaddr;
|
|
} octeon_boot_descriptor_t;
|
|
|
|
cvmx_bootinfo_t *octeon_bootinfo;
|
|
|
|
static octeon_boot_descriptor_t *app_desc_ptr;
|
|
|
|
static void
|
|
octeon_process_app_desc_ver_6(void)
|
|
{
|
|
/* XXX Why is 0x00000000ffffffffULL a bad value? */
|
|
if (app_desc_ptr->cvmx_desc_vaddr == 0 ||
|
|
app_desc_ptr->cvmx_desc_vaddr == 0xfffffffful)
|
|
panic("Bad octeon_bootinfo %p", octeon_bootinfo);
|
|
|
|
octeon_bootinfo =
|
|
(cvmx_bootinfo_t *)(intptr_t)app_desc_ptr->cvmx_desc_vaddr;
|
|
octeon_bootinfo =
|
|
(cvmx_bootinfo_t *) ((intptr_t)octeon_bootinfo | MIPS_KSEG0_START);
|
|
if (octeon_bootinfo->major_version != 1)
|
|
panic("Incompatible CVMX descriptor from bootloader: %d.%d %p",
|
|
(int) octeon_bootinfo->major_version,
|
|
(int) octeon_bootinfo->minor_version, octeon_bootinfo);
|
|
|
|
cvmx_sysinfo_minimal_initialize(octeon_bootinfo->phy_mem_desc_addr,
|
|
octeon_bootinfo->board_type,
|
|
octeon_bootinfo->board_rev_major,
|
|
octeon_bootinfo->board_rev_minor,
|
|
octeon_bootinfo->eclock_hz);
|
|
memcpy(cvmx_sysinfo_get()->mac_addr_base,
|
|
octeon_bootinfo->mac_addr_base, 6);
|
|
cvmx_sysinfo_get()->mac_addr_count = octeon_bootinfo->mac_addr_count;
|
|
cvmx_sysinfo_get()->compact_flash_common_base_addr =
|
|
octeon_bootinfo->compact_flash_common_base_addr;
|
|
cvmx_sysinfo_get()->compact_flash_attribute_base_addr =
|
|
octeon_bootinfo->compact_flash_attribute_base_addr;
|
|
cvmx_sysinfo_get()->core_mask = octeon_bootinfo->core_mask;
|
|
cvmx_sysinfo_get()->led_display_base_addr =
|
|
octeon_bootinfo->led_display_base_addr;
|
|
memcpy(cvmx_sysinfo_get()->board_serial_number,
|
|
octeon_bootinfo->board_serial_number,
|
|
sizeof cvmx_sysinfo_get()->board_serial_number);
|
|
}
|
|
|
|
static void
|
|
octeon_boot_params_init(register_t ptr)
|
|
{
|
|
if (ptr == 0 || ptr >= MAX_APP_DESC_ADDR)
|
|
panic("app descriptor passed at invalid address %#jx",
|
|
(uintmax_t)ptr);
|
|
|
|
app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
|
|
if (app_desc_ptr->desc_version < 6)
|
|
panic("Your boot code is too old to be supported.");
|
|
octeon_process_app_desc_ver_6();
|
|
|
|
KASSERT(octeon_bootinfo != NULL, ("octeon_bootinfo should be set"));
|
|
|
|
if (cvmx_sysinfo_get()->led_display_base_addr != 0) {
|
|
/*
|
|
* Revision 1.x of the EBT3000 only supports 4 characters, but
|
|
* other devices support 8.
|
|
*/
|
|
if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
|
|
cvmx_sysinfo_get()->board_rev_major == 1)
|
|
ebt3000_str_write("FBSD");
|
|
else
|
|
ebt3000_str_write("FreeBSD!");
|
|
}
|
|
|
|
if (cvmx_sysinfo_get()->phy_mem_desc_addr == (uint64_t)0)
|
|
panic("Your boot loader did not supply a memory descriptor.");
|
|
cvmx_bootmem_init(cvmx_sysinfo_get()->phy_mem_desc_addr);
|
|
|
|
octeon_feature_init();
|
|
|
|
__cvmx_helper_cfg_init();
|
|
|
|
printf("Boot Descriptor Ver: %u -> %u/%u",
|
|
app_desc_ptr->desc_version, octeon_bootinfo->major_version,
|
|
octeon_bootinfo->minor_version);
|
|
printf(" CPU clock: %uMHz Core Mask: %#x\n",
|
|
cvmx_sysinfo_get()->cpu_clock_hz / 1000000,
|
|
cvmx_sysinfo_get()->core_mask);
|
|
printf(" Board Type: %u Revision: %u/%u\n",
|
|
cvmx_sysinfo_get()->board_type,
|
|
cvmx_sysinfo_get()->board_rev_major,
|
|
cvmx_sysinfo_get()->board_rev_minor);
|
|
|
|
printf(" Mac Address %02X.%02X.%02X.%02X.%02X.%02X (%d)\n",
|
|
octeon_bootinfo->mac_addr_base[0],
|
|
octeon_bootinfo->mac_addr_base[1],
|
|
octeon_bootinfo->mac_addr_base[2],
|
|
octeon_bootinfo->mac_addr_base[3],
|
|
octeon_bootinfo->mac_addr_base[4],
|
|
octeon_bootinfo->mac_addr_base[5],
|
|
octeon_bootinfo->mac_addr_count);
|
|
|
|
#if defined(OCTEON_BOARD_CAPK_0100ND)
|
|
strcpy(cpu_board, "CAPK-0100ND");
|
|
if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_CN3010_EVB_HS5) {
|
|
printf("Compiled for CAPK-0100ND, but board type is %s\n",
|
|
cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
|
|
strcat(cpu_board, " hardwired, but type is ");
|
|
strcat(cpu_board,
|
|
cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
|
|
}
|
|
#else
|
|
strcpy(cpu_board,
|
|
cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
|
|
printf("Board: %s\n", cpu_board);
|
|
#endif
|
|
strcpy(cpu_model, octeon_model_get_string(cvmx_get_proc_id()));
|
|
printf("Model: %s\n", cpu_model);
|
|
printf("Serial number: %s\n", cvmx_sysinfo_get()->board_serial_number);
|
|
}
|
|
/* impEND: This stuff should move back into the Cavium SDK */
|