166 lines
3.9 KiB
C
166 lines
3.9 KiB
C
/*
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* Copyright (c) 1994, Paul Richards. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided
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* that the above copyright and these terms are retained. Under no
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* circumstances is the author responsible for the proper functioning
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* of this software, nor does the author assume any responsibility
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* for damages incurred with its use.
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*
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*/
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#include "ic/Am7990.h"
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/*
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* Initialize multicast address hashing registers to accept
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* all multicasts (only used when in promiscuous mode)
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*/
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#if NBPFILTER > 0
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#define MULTI_INIT_ADDR 0xff
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#else
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#define MULTI_INIT_ADDR 0
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#endif
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#define NORMAL 0
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#define NRDRE 3
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#define NTDRE 3
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#define RECVBUFSIZE 1518 /* Packet size rounded to dword boundary */
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#define TRANSBUFSIZE 1518
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#define MBUF_CACHE_LIMIT 0
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#define MEM_SLEW 8
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/* BICC port addresses */
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#define BICC_IOSIZE 16
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#define BICC_RDP 0x0c /* Register Data Port */
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#define BICC_RAP 0x0e /* Register Address Port */
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/* NE2100 port addresses */
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#define NE2100_IOSIZE 24
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#define PCNET_RDP 0x10 /* Register Data Port */
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#define PCNET_RAP 0x12 /* Register Address Port */
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#define PCNET_RESET 0x14
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#define PCNET_IDP 0x16
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#define PCNET_VSW 0x18
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/* DEPCA port addresses */
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#define DEPCA_IOSIZE 16
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#define DEPCA_CTRL 0x00 /* NIC Control and status register */
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#define DEPCA_RDP 0x04 /* Register Data Port */
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#define DEPCA_RAP 0x06 /* Register Address Port */
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#define DEPCA_ADP 0x0c
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/* DEPCA specific defines */
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#define DEPCA_ADDR_ROM_SIZE 32
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/* Chip types */
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#define LANCE 1 /* Am7990 */
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#define C_LANCE 2 /* Am79C90 */
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#define PCnet_ISA 3 /* Am79C960 */
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#define PCnet_ISAplus 4 /* Am79C961 */
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#define PCnet_32 5 /* Am79C965 */
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#define PCnet_PCI 6 /* Am79C970 */
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/* CSR88-89: Chip ID masks */
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#define AMD_MASK 0x003
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#define PART_MASK 0xffff
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#define Am79C960 0x0003
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#define Am79C961 0x2260
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#define Am79C965 0x2430
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#define Am79C970 0x0242
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/* Board types */
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#define UNKNOWN 0
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#define BICC 1
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#define NE2100 2
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#define DEPCA 3
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/* mem_mode values */
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#define DMA_FIXED 1
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#define DMA_MBUF 2
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#define SHMEM 4
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#define MEM_MODES \
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"\20\3SHMEM\2DMA_MBUF\1DMA_FIXED"
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#define CSR0_FLAGS \
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"\20\20ERR\17BABL\16CERR\15MISS\14MERR\13RINT\12TINT\11IDON\
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\10INTR\07INEA\06RXON\05TXON\04TDMD\03STOP\02STRT\01INIT"
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#define INIT_MODE \
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"\20\20PROM\07INTL\06DRTY\05COLL\04DTCR\03LOOP\02DTX\01DRX"
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#define RECV_MD1 \
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"\20\10OWN\7ERR\6FRAM\5OFLO\4CRC\3BUFF\2STP\1ENP"
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#define TRANS_MD1 \
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"\20\10OWN\7ERR\6RES\5MORE\4ONE\3DEF\2STP\1ENP"
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#define TRANS_MD3 \
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"\20\6BUFF\5UFLO\4RES\3LCOL\2LCAR\1RTRY"
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struct nic_info {
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int ident; /* Type of card */
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int ic; /* Type of ic, Am7990, Am79C960 etc. */
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int mem_mode;
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int iobase;
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int mode; /* Mode setting at initialisation */
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};
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struct host_ring_entry {
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struct mds *md;
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union {
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struct mbuf *mbuf;
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char *data;
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}buff;
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};
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#ifdef LNC_KEEP_STATS
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#define LNCSTATS_STRUCT \
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struct lnc_stats { \
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int idon; \
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int rint; \
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int tint; \
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int cerr; \
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int babl; \
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int miss; \
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int merr; \
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int rxoff; \
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int txoff; \
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int terr; \
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int lcol; \
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int lcar; \
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int tbuff; \
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int def; \
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int more; \
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int one; \
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int uflo; \
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int rtry; \
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int rerr; \
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int fram; \
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int oflo; \
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int crc; \
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int rbuff; \
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int drop_packet; \
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int trans_ring_full; \
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} lnc_stats;
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#define LNCSTATS(X) ++(sc->lnc_stats.X);
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#else
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#define LNCSTATS_STRUCT
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#define LNCSTATS(X)
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#endif
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#define NDESC(len2) (1 << len2)
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#define INC_MD_PTR(ptr, no_entries) \
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if (++ptr >= NDESC(no_entries)) \
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ptr = 0;
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#define DEC_MD_PTR(ptr, no_entries) \
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if (--ptr < 0) \
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ptr = NDESC(no_entries) - 1;
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#define RECV_NEXT (sc->recv_ring->base + sc->recv_next)
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#define TRANS_NEXT (sc->trans_ring->base + sc->trans_next)
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