5d83392ac5
hardware send and receive PDU limits. Report these limits to ICL and take them into account when setting the socket's send and receive buffer sizes. The driver used a single hardcoded limit everywhere prior to this change. Sponsored by: Chelsio Communications |
||
|---|---|---|
| .. | ||
| cxgbei_ulp2_ddp.c | ||
| cxgbei_ulp2_ddp.h | ||
| cxgbei.c | ||
| cxgbei.h | ||
| icl_cxgbei.c | ||