18557a86ad
some of which are rather serious: - Use the device sysctl tree instead of rolling our own. - Don't create a bus_dmamap_t to pass to bus_dmamem_alloc(), it is bus_dmamem_alloc() that creates it itself. The DMA map created by the driver was overwritten and its memory was leaked. - Fix resource handling bugs in the error path of ixgb_dma_alloc(). - Don't use vtophys() to get the base address of the TX and RX rings when busdma already gave us the correct address to use! - Remove now useless includes and the alpha_XXX_dmamap() hack. - Don't initialize if_output to ether_output(), ether_ifattach() does it for us already. - Add proper module dependencies on ether and pci. Unfortunately, I'm not lucky enough to own an ixgb(4) card, nor a machine with a bus where to plug it in and I couldn't find anyone able to test these patches, so they are only build-tested and I won't MFC them for 5.4-RELEASE.
380 lines
12 KiB
C
380 lines
12 KiB
C
/*******************************************************************************
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Copyright (c) 2001-2004, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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***************************************************************************/
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/*$FreeBSD$*/
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#ifndef _IXGB_H_DEFINED_
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#define _IXGB_H_DEFINED_
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/kernel.h>
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#include <sys/sockio.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/bpf.h>
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#include <net/if_types.h>
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#include <net/if_vlan_var.h>
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#include <netinet/in_systm.h>
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#include <netinet/in.h>
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#include <netinet/ip.h>
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#include <netinet/tcp.h>
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#include <netinet/udp.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <machine/clock.h>
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#if __FreeBSD_version >= 502000
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#else
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#endif
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#include <sys/proc.h>
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#include <sys/sysctl.h>
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#include <sys/endian.h>
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#include "opt_bdg.h"
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#include <dev/ixgb/ixgb_hw.h>
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#include <dev/ixgb/ixgb_ee.h>
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#include <dev/ixgb/ixgb_ids.h>
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/* Tunables */
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/*
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* TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
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* number of transmit descriptors allocated by the driver. Increasing this
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* value allows the driver to queue more transmits. Each descriptor is 16
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* bytes.
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*/
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#define IXGB_MAX_TXD 256
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/*
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* RxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the
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* number of receive descriptors allocated by the driver. Increasing this
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* value allows the driver to buffer more incoming packets. Each descriptor
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* is 16 bytes. A receive buffer is also allocated for each descriptor. The
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* maximum MTU size is 16110.
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*
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*/
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#define IXGB_MAX_RXD 1024
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/*
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* TxIntDelay Valid Range: 0-65535 (0=off) Default Value: 32 This value
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* delays the generation of transmit interrupts in units of 1.024
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* microseconds. Transmit interrupt reduction can improve CPU efficiency if
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* properly tuned for specific network traffic. If the system is reporting
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* dropped transmits, this value may be set too high causing the driver to
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* run out of available transmit descriptors.
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*/
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#define TIDV 32
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/*
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* RxIntDelay Valid Range: 0-65535 (0=off) Default Value: 72 This value
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* delays the generation of receive interrupts in units of 1.024
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* microseconds. Receive interrupt reduction can improve CPU efficiency if
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* properly tuned for specific network traffic. Increasing this value adds
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* extra latency to frame reception and can end up decreasing the throughput
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* of TCP traffic. If the system is reporting dropped receives, this value
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* may be set too high, causing the driver to run out of available receive
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* descriptors.
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*
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*/
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#define RDTR 72
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/*
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* This parameter controls the maximum no of times the driver will loop in
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* the isr. Minimum Value = 1
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*/
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#define IXGB_MAX_INTR 3
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/*
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* Inform the stack about transmit checksum offload capabilities.
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*/
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#define IXGB_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP)
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/*
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* This parameter controls the duration of transmit watchdog timer.
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*/
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#define IXGB_TX_TIMEOUT 5 /* set to 5 seconds */
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/*
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* This parameter controls when the driver calls the routine to reclaim
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* transmit descriptors.
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*/
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#define IXGB_TX_CLEANUP_THRESHOLD IXGB_MAX_TXD / 8
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/*
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* Flow Control Types.
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* 1. ixgb_fc_none - Flow Control Disabled
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* 2. ixgb_fc_rx_pause - Flow Control Receive Only
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* 3. ixgb_fc_tx_pause - Flow Control Transmit Only
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* 4. ixgb_fc_full - Flow Control Enabled
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*/
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#define FLOW_CONTROL_NONE ixgb_fc_none
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#define FLOW_CONTROL_RX_PAUSE ixgb_fc_rx_pause
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#define FLOW_CONTROL_TX_PAUSE ixgb_fc_tx_pause
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#define FLOW_CONTROL_FULL ixgb_fc_full
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/*
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* Set the flow control type. Assign one of the above flow control types to be enabled.
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* Default Value: FLOW_CONTROL_FULL
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*/
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#define FLOW_CONTROL FLOW_CONTROL_FULL
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/*
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* Receive Flow control low threshold (when we send a resume frame) (FCRTL)
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* Valid Range: 64 - 262,136 (0x40 - 0x3FFF8, 8 byte granularity) must be
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* less than high threshold by at least 8 bytes Default Value: 163,840
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* (0x28000)
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*/
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#define FCRTL 0x28000
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/*
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* Receive Flow control high threshold (when we send a pause frame) (FCRTH)
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* Valid Range: 1,536 - 262,136 (0x600 - 0x3FFF8, 8 byte granularity) Default
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* Value: 196,608 (0x30000)
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*/
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#define FCRTH 0x30000
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/*
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* Flow control request timeout (how long to pause the link partner's tx)
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* (PAP 15:0) Valid Range: 1 - 65535 Default Value: 256 (0x100)
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*/
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#define FCPAUSE 0x100
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/* Tunables -- End */
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#define IXGB_VENDOR_ID 0x8086
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#define IXGB_MMBA 0x0010 /* Mem base address */
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#define IXGB_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
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#define IOCTL_CMD_TYPE u_long
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#define MAX_NUM_MULTICAST_ADDRESSES 128
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#define PCI_ANY_ID (~0U)
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#define ETHER_ALIGN 2
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/* Defines for printing debug information */
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#define DEBUG_INIT 0
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#define DEBUG_IOCTL 0
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#define DEBUG_HW 0
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#define _SV_ 0
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#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
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#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
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#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
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#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
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#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
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#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
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#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
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#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
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#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
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/* Supported RX Buffer Sizes */
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#define IXGB_RXBUFFER_2048 2048
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#define IXGB_RXBUFFER_4096 4096
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#define IXGB_RXBUFFER_8192 8192
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#define IXGB_RXBUFFER_16384 16384
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#define IXGB_MAX_SCATTER 100
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/*
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* ******************************************************************************
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* vendor_info_array
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*
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* This array contains the list of Subvendor/Subdevice IDs on which the driver
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* should load.
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*
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*****************************************************************************
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*/
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typedef struct _ixgb_vendor_info_t {
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unsigned int vendor_id;
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unsigned int device_id;
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unsigned int subvendor_id;
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unsigned int subdevice_id;
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unsigned int index;
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} ixgb_vendor_info_t;
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struct ixgb_buffer {
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struct mbuf *m_head;
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bus_dmamap_t map; /* bus_dma map for packet */
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};
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struct ixgb_q {
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bus_dmamap_t map; /* bus_dma map for packet */
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int nsegs; /* # of segments/descriptors */
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bus_dma_segment_t segs[IXGB_MAX_SCATTER];
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};
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/*
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* Bus dma allocation structure used by ixgb_dma_malloc and ixgb_dma_free.
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*/
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struct ixgb_dma_alloc {
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bus_addr_t dma_paddr;
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caddr_t dma_vaddr;
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bus_dma_tag_t dma_tag;
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bus_dmamap_t dma_map;
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bus_dma_segment_t dma_seg;
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bus_size_t dma_size;
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int dma_nseg;
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};
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typedef enum _XSUM_CONTEXT_T {
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OFFLOAD_NONE,
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OFFLOAD_TCP_IP,
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OFFLOAD_UDP_IP
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} XSUM_CONTEXT_T;
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/* Our adapter structure */
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struct adapter {
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struct arpcom interface_data;
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struct adapter *next;
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struct adapter *prev;
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struct ixgb_hw hw;
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/* FreeBSD operating-system-specific structures */
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struct ixgb_osdep osdep;
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struct device *dev;
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struct resource *res_memory;
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struct resource *res_ioport;
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struct resource *res_interrupt;
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void *int_handler_tag;
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struct ifmedia media;
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struct callout_handle timer_handle;
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int io_rid;
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u_int8_t unit;
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/* Info about the board itself */
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u_int32_t part_num;
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u_int8_t link_active;
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u_int16_t link_speed;
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u_int16_t link_duplex;
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u_int32_t tx_int_delay;
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u_int32_t tx_abs_int_delay;
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u_int32_t rx_int_delay;
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u_int32_t rx_abs_int_delay;
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int raidc;
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XSUM_CONTEXT_T active_checksum_context;
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/*
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* Transmit definitions
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*
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* We have an array of num_tx_desc descriptors (handled by the
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* controller) paired with an array of tx_buffers (at
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* tx_buffer_area). The index of the next available descriptor is
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* next_avail_tx_desc. The number of remaining tx_desc is
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* num_tx_desc_avail.
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*/
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struct ixgb_dma_alloc txdma; /* bus_dma glue for tx desc */
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struct ixgb_tx_desc *tx_desc_base;
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u_int32_t next_avail_tx_desc;
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u_int32_t oldest_used_tx_desc;
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volatile u_int16_t num_tx_desc_avail;
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u_int16_t num_tx_desc;
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u_int32_t txd_cmd;
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struct ixgb_buffer *tx_buffer_area;
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bus_dma_tag_t txtag; /* dma tag for tx */
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/*
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* Receive definitions
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*
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* we have an array of num_rx_desc rx_desc (handled by the controller),
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* and paired with an array of rx_buffers (at rx_buffer_area). The
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* next pair to check on receive is at offset next_rx_desc_to_check
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*/
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struct ixgb_dma_alloc rxdma; /* bus_dma glue for rx desc */
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struct ixgb_rx_desc *rx_desc_base;
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u_int32_t next_rx_desc_to_check;
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u_int16_t num_rx_desc;
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u_int32_t rx_buffer_len;
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struct ixgb_buffer *rx_buffer_area;
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bus_dma_tag_t rxtag; /* dma tag for Rx */
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u_int32_t next_rx_desc_to_use;
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/* Jumbo frame */
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struct mbuf *fmp;
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struct mbuf *lmp;
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struct sysctl_ctx_list sysctl_ctx;
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struct sysctl_oid *sysctl_tree;
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/* Misc stats maintained by the driver */
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unsigned long dropped_pkts;
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unsigned long mbuf_alloc_failed;
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unsigned long mbuf_cluster_failed;
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unsigned long no_tx_desc_avail1;
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unsigned long no_tx_desc_avail2;
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unsigned long no_tx_map_avail;
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unsigned long no_tx_dma_setup;
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boolean_t in_detach;
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/* Board specific private data */
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#ifdef _SV_
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struct ixgb_sv_stats {
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uint64_t icr_rxdmt0;
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uint64_t icr_rxo;
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uint64_t icr_rxt0;
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uint64_t icr_TXDW;
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} sv_stats;
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unsigned long no_pkts_avail;
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unsigned long clean_tx_interrupts;
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#endif
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struct ixgb_hw_stats stats;
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};
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#endif /* _IXGB_H_DEFINED_ */
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