45d426a34e
mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
910 lines
26 KiB
C
910 lines
26 KiB
C
/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
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/*-
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* $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
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*
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* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
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* $FreeBSD$
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*/
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#ifndef _MACHINE_BUS_H_
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#define _MACHINE_BUS_H_
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#ifdef TARGET_OCTEON
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#include <machine/bus_octeon.h>
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#else
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#include <machine/_bus.h>
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#include <machine/cpufunc.h>
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/*
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* Values for the mips bus space tag, not to be used directly by MI code.
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*/
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#define MIPS_BUS_SPACE_IO 0 /* space is i/o space */
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#define MIPS_BUS_SPACE_MEM 1 /* space is mem space */
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#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
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#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
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#define BUS_SPACE_MAXSIZE 0xFFFFFFFF /* Maximum supported size */
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#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
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#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
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#define BUS_SPACE_MAXADDR 0xFFFFFFFF
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#define BUS_SPACE_UNRESTRICTED (~0)
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/*
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* Map a region of device bus space into CPU virtual address space.
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*/
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__inline int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
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bus_size_t size, int flags, bus_space_handle_t *bshp);
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static __inline int
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bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr,
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bus_size_t size __unused, int flags __unused,
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bus_space_handle_t *bshp)
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{
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*bshp = addr;
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return (0);
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}
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/*
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* Unmap a region of device bus space.
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*/
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void bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t size);
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/*
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* Get a new handle for a subregion of an already-mapped area of bus space.
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*/
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int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
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/*
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* Allocate a region of memory that is accessible to devices in bus space.
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*/
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int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
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bus_addr_t rend, bus_size_t size, bus_size_t align,
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bus_size_t boundary, int flags, bus_addr_t *addrp,
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bus_space_handle_t *bshp);
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/*
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* Free a region of bus space accessible memory.
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*/
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void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t size);
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/*
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* Read a 1, 2, 4, or 8 byte quantity from bus space
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* described by tag/handle/offset.
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*/
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static __inline u_int8_t bus_space_read_1(bus_space_tag_t tag,
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bus_space_handle_t handle,
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bus_size_t offset);
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static __inline u_int16_t bus_space_read_2(bus_space_tag_t tag,
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bus_space_handle_t handle,
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bus_size_t offset);
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static __inline u_int32_t bus_space_read_4(bus_space_tag_t tag,
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bus_space_handle_t handle,
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bus_size_t offset);
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static __inline u_int8_t
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bus_space_read_1(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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if (tag == MIPS_BUS_SPACE_IO)
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return (inb(handle + offset));
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return (readb(handle + offset));
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}
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static __inline u_int16_t
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bus_space_read_2(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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if (tag == MIPS_BUS_SPACE_IO)
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return (inw(handle + offset));
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return (readw(handle + offset));
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}
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static __inline u_int32_t
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bus_space_read_4(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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if (tag == MIPS_BUS_SPACE_IO)
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return (inl(handle + offset));
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return (readl(handle + offset));
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}
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#if 0 /* Cause a link error for bus_space_read_8 */
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#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
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#endif
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/*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle/offset and copy into buffer provided.
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*/
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static __inline void bus_space_read_multi_1(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr,
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size_t count);
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static __inline void bus_space_read_multi_2(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t *addr,
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size_t count);
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static __inline void bus_space_read_multi_4(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr,
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size_t count);
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static __inline void
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bus_space_read_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr, size_t count)
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{
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--)
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*addr++ = inb(bsh + offset);
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else
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while (count--)
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*addr++ = readb(bsh + offset);
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}
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static __inline void
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bus_space_read_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--)
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*addr++ = inw(baddr);
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else
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while (count--)
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*addr++ = readw(baddr);
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}
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static __inline void
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bus_space_read_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--)
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*addr++ = inl(baddr);
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else
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while (count--)
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*addr++ = readl(baddr);
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}
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#if 0 /* Cause a link error for bus_space_read_multi_8 */
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#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
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#endif
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/*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle and starting at `offset' and copy into
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* buffer provided.
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*/
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static __inline void bus_space_read_region_1(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr,
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size_t count);
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static __inline void bus_space_read_region_2(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t *addr,
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size_t count);
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static __inline void bus_space_read_region_4(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr,
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size_t count);
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static __inline void
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bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--) {
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*addr++ = inb(baddr);
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baddr += 1;
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}
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else
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while (count--) {
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*addr++ = readb(baddr);
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baddr += 1;
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}
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}
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static __inline void
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bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--) {
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*addr++ = inw(baddr);
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baddr += 2;
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}
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else
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while (count--) {
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*addr++ = readw(baddr);
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baddr += 2;
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}
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}
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static __inline void
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bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--) {
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*addr++ = inl(baddr);
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baddr += 4;
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}
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else
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while (count--) {
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*addr++ = readb(baddr);
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baddr += 4;
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}
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}
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#if 0 /* Cause a link error for bus_space_read_region_8 */
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#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
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#endif
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/*
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* Write the 1, 2, 4, or 8 byte value `value' to bus space
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* described by tag/handle/offset.
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*/
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static __inline void bus_space_write_1(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t value);
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static __inline void bus_space_write_2(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t value);
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static __inline void bus_space_write_4(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t value);
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static __inline void
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bus_space_write_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t value)
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{
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if (tag == MIPS_BUS_SPACE_IO)
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outb(bsh + offset, value);
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else
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writeb(bsh + offset, value);
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}
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static __inline void
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bus_space_write_2(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t value)
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{
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if (tag == MIPS_BUS_SPACE_IO)
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outw(bsh + offset, value);
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else
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writew(bsh + offset, value);
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}
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static __inline void
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bus_space_write_4(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t value)
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{
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if (tag == MIPS_BUS_SPACE_IO)
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outl(bsh + offset, value);
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else
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writel(bsh + offset, value);
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}
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#if 0 /* Cause a link error for bus_space_write_8 */
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#define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
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#endif
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/*
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* Write `count' 1, 2, 4, or 8 byte quantities from the buffer
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* provided to bus space described by tag/handle/offset.
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*/
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static __inline void bus_space_write_multi_1(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset,
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const u_int8_t *addr,
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size_t count);
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static __inline void bus_space_write_multi_2(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset,
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const u_int16_t *addr,
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size_t count);
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static __inline void bus_space_write_multi_4(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset,
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const u_int32_t *addr,
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size_t count);
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static __inline void
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bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, const u_int8_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--)
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outb(baddr, *addr++);
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else
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while (count--)
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writeb(baddr, *addr++);
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}
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static __inline void
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bus_space_write_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, const u_int16_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--)
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outw(baddr, *addr++);
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else
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while (count--)
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writew(baddr, *addr++);
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}
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static __inline void
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bus_space_write_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, const u_int32_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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if (tag == MIPS_BUS_SPACE_IO)
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while (count--)
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outl(baddr, *addr++);
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else
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while (count--)
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writel(baddr, *addr++);
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}
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#if 0 /* Cause a link error for bus_space_write_multi_8 */
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#define bus_space_write_multi_8(t, h, o, a, c) \
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!!! bus_space_write_multi_8 unimplemented !!!
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#endif
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/*
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* Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
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* to bus space described by tag/handle starting at `offset'.
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*/
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static __inline void bus_space_write_region_1(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset,
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const u_int8_t *addr,
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size_t count);
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static __inline void bus_space_write_region_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
const u_int16_t *addr,
|
|
size_t count);
|
|
static __inline void bus_space_write_region_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
const u_int32_t *addr,
|
|
size_t count);
|
|
|
|
static __inline void
|
|
bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int8_t *addr, size_t count)
|
|
{
|
|
bus_addr_t baddr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
while (count--) {
|
|
outb(baddr, *addr++);
|
|
baddr += 1;
|
|
}
|
|
else
|
|
while (count--) {
|
|
writeb(baddr, *addr++);
|
|
baddr += 1;
|
|
}
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int16_t *addr, size_t count)
|
|
{
|
|
bus_addr_t baddr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
while (count--) {
|
|
outw(baddr, *addr++);
|
|
baddr += 2;
|
|
}
|
|
else
|
|
while (count--) {
|
|
writew(baddr, *addr++);
|
|
baddr += 2;
|
|
}
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int32_t *addr, size_t count)
|
|
{
|
|
bus_addr_t baddr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
while (count--) {
|
|
outl(baddr, *addr++);
|
|
baddr += 4;
|
|
}
|
|
else
|
|
while (count--) {
|
|
writel(baddr, *addr++);
|
|
baddr += 4;
|
|
}
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_write_region_8 */
|
|
#define bus_space_write_region_8 \
|
|
!!! bus_space_write_region_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Write the 1, 2, 4, or 8 byte value `val' to bus space described
|
|
* by tag/handle/offset `count' times.
|
|
*/
|
|
|
|
static __inline void bus_space_set_multi_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
u_int8_t value, size_t count);
|
|
static __inline void bus_space_set_multi_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
u_int16_t value, size_t count);
|
|
static __inline void bus_space_set_multi_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
u_int32_t value, size_t count);
|
|
|
|
static __inline void
|
|
bus_space_set_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int8_t value, size_t count)
|
|
{
|
|
bus_addr_t addr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
while (count--)
|
|
outb(addr, value);
|
|
else
|
|
while (count--)
|
|
writeb(addr, value);
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_set_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int16_t value, size_t count)
|
|
{
|
|
bus_addr_t addr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
while (count--)
|
|
outw(addr, value);
|
|
else
|
|
while (count--)
|
|
writew(addr, value);
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_set_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int32_t value, size_t count)
|
|
{
|
|
bus_addr_t addr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
while (count--)
|
|
outl(addr, value);
|
|
else
|
|
while (count--)
|
|
writel(addr, value);
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_set_multi_8 */
|
|
#define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
|
|
* by tag/handle starting at `offset'.
|
|
*/
|
|
|
|
static __inline void bus_space_set_region_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int8_t value,
|
|
size_t count);
|
|
static __inline void bus_space_set_region_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int16_t value,
|
|
size_t count);
|
|
static __inline void bus_space_set_region_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int32_t value,
|
|
size_t count);
|
|
|
|
static __inline void
|
|
bus_space_set_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int8_t value, size_t count)
|
|
{
|
|
bus_addr_t addr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
for (; count != 0; count--, addr++)
|
|
outb(addr, value);
|
|
else
|
|
for (; count != 0; count--, addr++)
|
|
writeb(addr, value);
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_set_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int16_t value, size_t count)
|
|
{
|
|
bus_addr_t addr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
for (; count != 0; count--, addr += 2)
|
|
outw(addr, value);
|
|
else
|
|
for (; count != 0; count--, addr += 2)
|
|
writew(addr, value);
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int32_t value, size_t count)
|
|
{
|
|
bus_addr_t addr = bsh + offset;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
for (; count != 0; count--, addr += 4)
|
|
outl(addr, value);
|
|
else
|
|
for (; count != 0; count--, addr += 4)
|
|
writel(addr, value);
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_set_region_8 */
|
|
#define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Copy `count' 1, 2, 4, or 8 byte values from bus space starting
|
|
* at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
|
|
*/
|
|
|
|
static __inline void bus_space_copy_region_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh1,
|
|
bus_size_t off1,
|
|
bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count);
|
|
|
|
static __inline void bus_space_copy_region_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh1,
|
|
bus_size_t off1,
|
|
bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count);
|
|
|
|
static __inline void bus_space_copy_region_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh1,
|
|
bus_size_t off1,
|
|
bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count);
|
|
|
|
static __inline void
|
|
bus_space_copy_region_1(bus_space_tag_t tag, bus_space_handle_t bsh1,
|
|
bus_size_t off1, bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count)
|
|
{
|
|
bus_addr_t addr1 = bsh1 + off1;
|
|
bus_addr_t addr2 = bsh2 + off2;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1++, addr2++)
|
|
outb(addr2, inb(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += (count - 1), addr2 += (count - 1);
|
|
count != 0; count--, addr1--, addr2--)
|
|
outb(addr2, inb(addr1));
|
|
}
|
|
} else {
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1++, addr2++)
|
|
writeb(addr2, readb(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += (count - 1), addr2 += (count - 1);
|
|
count != 0; count--, addr1--, addr2--)
|
|
writeb(addr2, readb(addr1));
|
|
}
|
|
}
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_copy_region_2(bus_space_tag_t tag, bus_space_handle_t bsh1,
|
|
bus_size_t off1, bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count)
|
|
{
|
|
bus_addr_t addr1 = bsh1 + off1;
|
|
bus_addr_t addr2 = bsh2 + off2;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1 += 2, addr2 += 2)
|
|
outw(addr2, inw(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
|
|
count != 0; count--, addr1 -= 2, addr2 -= 2)
|
|
outw(addr2, inw(addr1));
|
|
}
|
|
} else {
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1 += 2, addr2 += 2)
|
|
writew(addr2, readw(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
|
|
count != 0; count--, addr1 -= 2, addr2 -= 2)
|
|
writew(addr2, readw(addr1));
|
|
}
|
|
}
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1,
|
|
bus_size_t off1, bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count)
|
|
{
|
|
bus_addr_t addr1 = bsh1 + off1;
|
|
bus_addr_t addr2 = bsh2 + off2;
|
|
|
|
if (tag == MIPS_BUS_SPACE_IO)
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1 += 4, addr2 += 4)
|
|
outl(addr2, inl(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
|
|
count != 0; count--, addr1 -= 4, addr2 -= 4)
|
|
outl(addr2, inl(addr1));
|
|
}
|
|
} else {
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1 += 4, addr2 += 4)
|
|
writel(addr2, readl(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
|
|
count != 0; count--, addr1 -= 4, addr2 -= 4)
|
|
writel(addr2, readl(addr1));
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
#if 0 /* Cause a link error for bus_space_copy_8 */
|
|
#define bus_space_copy_region_8 !!! bus_space_copy_region_8 unimplemented !!!
|
|
#endif
|
|
|
|
|
|
/*
|
|
* Bus read/write barrier methods.
|
|
*
|
|
* void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
* bus_size_t offset, bus_size_t len, int flags);
|
|
*
|
|
*
|
|
* Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than
|
|
* prevent reordering by the compiler; all Intel x86 processors currently
|
|
* retire operations outside the CPU in program order.
|
|
*/
|
|
#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
|
|
#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
|
|
|
|
static __inline void
|
|
bus_space_barrier(bus_space_tag_t tag __unused, bus_space_handle_t bsh __unused,
|
|
bus_size_t offset __unused, bus_size_t len __unused, int flags)
|
|
{
|
|
#if 0
|
|
#ifdef __GNUCLIKE_ASM
|
|
if (flags & BUS_SPACE_BARRIER_READ)
|
|
__asm __volatile("lock; addl $0,0(%%rsp)" : : : "memory");
|
|
else
|
|
__asm __volatile("" : : : "memory");
|
|
#endif
|
|
#endif
|
|
}
|
|
|
|
#ifdef BUS_SPACE_NO_LEGACY
|
|
#undef inb
|
|
#undef outb
|
|
#define inb(a) compiler_error
|
|
#define inw(a) compiler_error
|
|
#define inl(a) compiler_error
|
|
#define outb(a, b) compiler_error
|
|
#define outw(a, b) compiler_error
|
|
#define outl(a, b) compiler_error
|
|
#endif
|
|
|
|
#include <machine/bus_dma.h>
|
|
|
|
/*
|
|
* Stream accesses are the same as normal accesses on amd64; there are no
|
|
* supported bus systems with an endianess different from the host one.
|
|
*/
|
|
#define bus_space_read_stream_1(t, h, o) bus_space_read_1((t), (h), (o))
|
|
#define bus_space_read_stream_2(t, h, o) bus_space_read_2((t), (h), (o))
|
|
#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o))
|
|
|
|
#define bus_space_read_multi_stream_1(t, h, o, a, c) \
|
|
bus_space_read_multi_1((t), (h), (o), (a), (c))
|
|
#define bus_space_read_multi_stream_2(t, h, o, a, c) \
|
|
bus_space_read_multi_2((t), (h), (o), (a), (c))
|
|
#define bus_space_read_multi_stream_4(t, h, o, a, c) \
|
|
bus_space_read_multi_4((t), (h), (o), (a), (c))
|
|
|
|
#define bus_space_write_stream_1(t, h, o, v) \
|
|
bus_space_write_1((t), (h), (o), (v))
|
|
#define bus_space_write_stream_2(t, h, o, v) \
|
|
bus_space_write_2((t), (h), (o), (v))
|
|
#define bus_space_write_stream_4(t, h, o, v) \
|
|
bus_space_write_4((t), (h), (o), (v))
|
|
|
|
#define bus_space_write_multi_stream_1(t, h, o, a, c) \
|
|
bus_space_write_multi_1((t), (h), (o), (a), (c))
|
|
#define bus_space_write_multi_stream_2(t, h, o, a, c) \
|
|
bus_space_write_multi_2((t), (h), (o), (a), (c))
|
|
#define bus_space_write_multi_stream_4(t, h, o, a, c) \
|
|
bus_space_write_multi_4((t), (h), (o), (a), (c))
|
|
|
|
#define bus_space_set_multi_stream_1(t, h, o, v, c) \
|
|
bus_space_set_multi_1((t), (h), (o), (v), (c))
|
|
#define bus_space_set_multi_stream_2(t, h, o, v, c) \
|
|
bus_space_set_multi_2((t), (h), (o), (v), (c))
|
|
#define bus_space_set_multi_stream_4(t, h, o, v, c) \
|
|
bus_space_set_multi_4((t), (h), (o), (v), (c))
|
|
|
|
#define bus_space_read_region_stream_1(t, h, o, a, c) \
|
|
bus_space_read_region_1((t), (h), (o), (a), (c))
|
|
#define bus_space_read_region_stream_2(t, h, o, a, c) \
|
|
bus_space_read_region_2((t), (h), (o), (a), (c))
|
|
#define bus_space_read_region_stream_4(t, h, o, a, c) \
|
|
bus_space_read_region_4((t), (h), (o), (a), (c))
|
|
|
|
#define bus_space_write_region_stream_1(t, h, o, a, c) \
|
|
bus_space_write_region_1((t), (h), (o), (a), (c))
|
|
#define bus_space_write_region_stream_2(t, h, o, a, c) \
|
|
bus_space_write_region_2((t), (h), (o), (a), (c))
|
|
#define bus_space_write_region_stream_4(t, h, o, a, c) \
|
|
bus_space_write_region_4((t), (h), (o), (a), (c))
|
|
|
|
#define bus_space_set_region_stream_1(t, h, o, v, c) \
|
|
bus_space_set_region_1((t), (h), (o), (v), (c))
|
|
#define bus_space_set_region_stream_2(t, h, o, v, c) \
|
|
bus_space_set_region_2((t), (h), (o), (v), (c))
|
|
#define bus_space_set_region_stream_4(t, h, o, v, c) \
|
|
bus_space_set_region_4((t), (h), (o), (v), (c))
|
|
|
|
#define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
|
|
bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
|
|
#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
|
|
bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c))
|
|
#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
|
|
bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
|
|
|
|
#endif /* !TARGET_OCTEON */
|
|
#endif /* !_MACHINE_BUS_H_ */
|