73e48bc6d6
Original PCIe nodes for Marvell SoCs consists of ports' nodes under main controller node. In order to properly parse this kind of representation in DT a mechanism for traversing through the tree required an update. Moreover, processing FDT data consisting of more than 2 cells had to be fixed, because the 'reg' property of mrvl,pcie node have additional parameter in front of 64-bit address. It should be skipped by default. This commit works properly with old mrvl,pcie representation for Kirkwood and ArmadaXP SoCs. Submitted by: Wojciech Macek <wma@semihalf.com> Michal Mazur <mkm@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield, Netgate Differential revision: https://reviews.freebsd.org/D10905 |
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armada | ||
armada38x | ||
armadaxp | ||
discovery | ||
kirkwood | ||
orion | ||
files.mv | ||
gpio.c | ||
ic.c | ||
mpic.c | ||
mv_common.c | ||
mv_localbus.c | ||
mv_machdep.c | ||
mv_pci.c | ||
mv_ts.c | ||
mvreg.h | ||
mvvar.h | ||
mvwin.h | ||
rtc.c | ||
std-pj4b.mv | ||
std.mv | ||
timer.c |