114 lines
3.3 KiB
C
114 lines
3.3 KiB
C
/*-
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* Copyright (c) 2001 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_INTR_MACHDEP_H_
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#define _MACHINE_INTR_MACHDEP_H_
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#define IRSR_BUSY (1 << 5)
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#define PIL_MAX (1 << 4)
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#define IV_MAX (1 << 11)
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#define IR_FREE (PIL_MAX * 2)
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#define IH_SHIFT PTR_SHIFT
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#define IQE_SHIFT 5
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#define IV_SHIFT 6
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#define PIL_LOW 1 /* stray interrupts */
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#define PIL_ITHREAD 2 /* interrupts that use ithreads */
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#define PIL_RENDEZVOUS 3 /* smp rendezvous ipi */
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#define PIL_AST 4 /* ast ipi */
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#define PIL_STOP 5 /* stop cpu ipi */
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#define PIL_PREEMPT 6 /* preempt idle thread cpu ipi */
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#define PIL_HARDCLOCK 7 /* hardclock broadcast */
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#define PIL_FILTER 12 /* filter interrupts */
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#define PIL_BRIDGE 13 /* bridge interrupts */
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#define PIL_TICK 14 /* tick interrupts */
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#ifndef LOCORE
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#define INTR_BRIDGE INTR_MD1
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struct trapframe;
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typedef void ih_func_t(struct trapframe *);
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typedef void iv_func_t(void *);
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struct intr_request {
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struct intr_request *ir_next;
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iv_func_t *ir_func;
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void *ir_arg;
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u_int ir_vec;
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u_int ir_pri;
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};
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struct intr_controller {
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void (*ic_enable)(void *);
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void (*ic_disable)(void *);
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void (*ic_assign)(void *);
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void (*ic_clear)(void *);
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};
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struct intr_vector {
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iv_func_t *iv_func;
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void *iv_arg;
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const struct intr_controller *iv_ic;
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void *iv_icarg;
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struct intr_event *iv_event;
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u_int iv_pri;
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u_int iv_vec;
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u_int iv_mid;
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u_int iv_refcnt;
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u_int iv_pad[2];
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};
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extern ih_func_t *intr_handlers[];
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extern struct intr_vector intr_vectors[];
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void intr_add_cpu(u_int cpu);
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#ifdef SMP
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int intr_bind(int vec, u_char cpu);
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#endif
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int intr_describe(int vec, void *ih, const char *descr);
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void intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf,
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void *iva);
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void intr_init1(void);
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void intr_init2(void);
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int intr_controller_register(int vec, const struct intr_controller *ic,
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void *icarg);
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int inthand_add(const char *name, int vec, int (*filt)(void *),
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void (*handler)(void *), void *arg, int flags, void **cookiep);
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int inthand_remove(int vec, void *cookie);
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ih_func_t intr_fast;
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#endif /* !LOCORE */
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#endif /* !_MACHINE_INTR_MACHDEP_H_ */
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