e53470fee3
- Support for Texas Instruments SoCs: - AM335x - OMAP4 - Kernel configs, DTS for Beaglebone and Pandaboard Submitted by: Ben Gray, Damjan Marion
198 lines
5.3 KiB
Plaintext
198 lines
5.3 KiB
Plaintext
/*-
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* Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/dts-v1/;
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/ {
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model = "beaglebone";
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compatible = "beaglebone", "ti,am335x";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&AINTC>;
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aliases {
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soc = &SOC;
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uart0 = &uart0;
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};
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memory {
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device_type = "memory";
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reg = < 0x80000000 0x10000000 >; /* 256MB RAM */
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};
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SOC: am335x {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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bus-frequency = <0>;
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AINTC: interrupt-controller@48200000 {
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compatible = "ti,aintc";
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = < 0x48200000 0x1000 >;
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};
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scm@44e10000 {
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compatible = "ti,scm";
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reg = < 0x44e10000 0x2000 >;
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/* Set of triplets < padname, muxname, padstate> */
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scm-pad-config =
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/* I2C0 */
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"I2C0_SDA", "I2C0_SDA","i2c",
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"I2C0_SCL", "I2C0_SCL","i2c",
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/* Ethernet */
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"MII1_RX_ER", "gmii1_rxerr", "input_pulldown",
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"MII1_TX_EN", "gmii1_txen", "output",
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"MII1_RX_DV", "gmii1_rxdv", "input_pulldown",
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"MII1_TXD3", "gmii1_txd3", "output",
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"MII1_TXD2", "gmii1_txd2", "output",
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"MII1_TXD1", "gmii1_txd1", "output",
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"MII1_TXD0", "gmii1_txd0", "output",
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"MII1_TX_CLK", "gmii1_txclk", "input_pulldown",
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"MII1_RX_CLK", "gmii1_rxclk", "input_pulldown",
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"MII1_RXD3", "gmii1_rxd3", "input_pulldown",
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"MII1_RXD2", "gmii1_rxd2", "input_pulldown",
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"MII1_RXD1", "gmii1_rxd1", "input_pulldown",
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"MII1_RXD0", "gmii1_rxd0", "input_pulldown",
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"MDIO", "mdio_data", "input_pullup",
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"MDC", "mdio_clk", "output_pullup",
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/* MMCSD0 */
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"MMC0_CMD", "mmc0_cmd", "input_pullup",
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"MMC0_CLK", "mmc0_clk", "input_pullup",
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"MMC0_DAT0", "mmc0_dat0", "input_pullup",
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"MMC0_DAT1", "mmc0_dat1", "input_pullup",
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"MMC0_DAT2", "mmc0_dat2", "input_pullup",
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"MMC0_DAT3", "mmc0_dat3", "input_pullup";
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};
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prcm@44E00000 {
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compatible = "am335x,prcm";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = < 0x44E00000 0x1300 >;
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};
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dmtimers@44E05000 {
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compatible = "ti,am335x-dmtimer";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = < 0x44E05000 0x1000
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0x44E31000 0x1000
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0x48040000 0x1000
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0x48042000 0x1000
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0x48044000 0x1000
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0x48046000 0x1000
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0x48048000 0x1000
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0x4804A000 0x1000 >;
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interrupts = < 66 67 68 69 92 93 94 95 >;
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interrupt-parent = <&AINTC>;
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};
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GPIO: gpio {
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#gpio-cells = <3>;
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compatible = "ti,gpio";
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gpio-controller;
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reg =< 0x44E07000 0x1000
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0x4804C000 0x1000
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0x481AC000 0x1000
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0x481AE000 0x1000 >;
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interrupts = < 17 19 21 23 >;
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interrupt-parent = <&AINTC>;
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};
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uart0: serial@44E09000 {
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compatible = "ns16550";
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reg = <0x44E09000 0x1000>;
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reg-shift = <2>;
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interrupts = < 72 >;
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interrupt-parent = <&AINTC>;
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clock-frequency = < 48000000 >; /* FIXME */
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};
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edma3@49000000 {
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compatible = "ti,edma3";
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reg =< 0x49000000 0x100000 /* Channel Controller Regs */
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0x49800000 0x100000 /* Transfer Controller 0 Regs */
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0x49900000 0x100000 /* Transfer Controller 1 Regs */
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0x49a00000 0x100000 >; /* Transfer Controller 2 Regs */
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interrupts = <12 13 14>;
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interrupt-parent = <&AINTC>;
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};
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mmchs0@4809C000 {
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compatible = "ti,mmchs";
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reg =<0x48060000 0x1000 >;
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interrupts = <64>;
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interrupt-parent = <&AINTC>;
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mmchs-device-id = <0>;
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};
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enet0: ethernet@4A100000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ti,cpsw";
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reg = <0x4A100000 0x3000>;
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interrupts = <40 41 42 43>;
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interrupt-parent = <&AINTC>;
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phy-handle = <&phy0>;
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ti,cpsw-mdio";
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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};
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};
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};
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i2c0: i2c@44e0b000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ti,i2c";
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reg =< 0x44e0b000 0x1000 >;
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interrupts = <70>;
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interrupt-parent = <&AINTC>;
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i2c-device-id = <0>;
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pmic@24 {
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compatible = "ti,am335x-pmic";
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reg = <0x24>;
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};
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};
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};
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chosen {
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stdin = "uart0";
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stdout = "uart0";
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};
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};
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