550 lines
16 KiB
C
550 lines
16 KiB
C
/*-
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* Copyright 2009 Solarflare Communications Inc. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "efsys.h"
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#include "efx.h"
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#include "efx_impl.h"
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#if EFSYS_OPT_SIENA
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__checkReturn int
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siena_mac_poll(
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__in efx_nic_t *enp,
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__out efx_link_mode_t *link_modep)
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{
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efx_port_t *epp = &(enp->en_port);
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siena_link_state_t sls;
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int rc;
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if ((rc = siena_phy_get_link(enp, &sls)) != 0)
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goto fail1;
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epp->ep_adv_cap_mask = sls.sls_adv_cap_mask;
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epp->ep_fcntl = sls.sls_fcntl;
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*link_modep = sls.sls_link_mode;
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return (0);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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*link_modep = EFX_LINK_UNKNOWN;
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return (rc);
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}
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__checkReturn int
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siena_mac_up(
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__in efx_nic_t *enp,
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__out boolean_t *mac_upp)
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{
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siena_link_state_t sls;
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int rc;
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/*
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* Because Siena doesn't *require* polling, we can't rely on
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* siena_mac_poll() being executed to populate epp->ep_mac_up.
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*/
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if ((rc = siena_phy_get_link(enp, &sls)) != 0)
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goto fail1;
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*mac_upp = sls.sls_mac_up;
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return (0);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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return (rc);
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}
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__checkReturn int
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siena_mac_reconfigure(
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__in efx_nic_t *enp)
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{
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efx_port_t *epp = &(enp->en_port);
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uint8_t payload[MAX(MC_CMD_SET_MAC_IN_LEN,
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MC_CMD_SET_MCAST_HASH_IN_LEN)];
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efx_mcdi_req_t req;
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unsigned int fcntl;
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int rc;
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req.emr_cmd = MC_CMD_SET_MAC;
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req.emr_in_buf = payload;
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req.emr_in_length = MC_CMD_SET_MAC_IN_LEN;
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EFX_STATIC_ASSERT(MC_CMD_SET_MAC_OUT_LEN == 0);
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req.emr_out_buf = NULL;
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req.emr_out_length = 0;
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MCDI_IN_SET_DWORD(req, SET_MAC_IN_MTU, epp->ep_mac_pdu);
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MCDI_IN_SET_DWORD(req, SET_MAC_IN_DRAIN, epp->ep_mac_drain ? 1 : 0);
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EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, SET_MAC_IN_ADDR),
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epp->ep_mac_addr);
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MCDI_IN_POPULATE_DWORD_2(req, SET_MAC_IN_REJECT,
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SET_MAC_IN_REJECT_UNCST, !epp->ep_unicst,
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SET_MAC_IN_REJECT_BRDCST, !epp->ep_brdcst);
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if (epp->ep_fcntl_autoneg)
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/* efx_fcntl_set() has already set the phy capabilities */
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fcntl = MC_CMD_FCNTL_AUTO;
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else if (epp->ep_fcntl & EFX_FCNTL_RESPOND)
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fcntl = (epp->ep_fcntl & EFX_FCNTL_GENERATE)
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? MC_CMD_FCNTL_BIDIR
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: MC_CMD_FCNTL_RESPOND;
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else
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fcntl = MC_CMD_FCNTL_OFF;
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MCDI_IN_SET_DWORD(req, SET_MAC_IN_FCNTL, fcntl);
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efx_mcdi_execute(enp, &req);
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if (req.emr_rc != 0) {
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rc = req.emr_rc;
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goto fail1;
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}
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/* Push multicast hash. Set the broadcast bit (0xff) appropriately */
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req.emr_cmd = MC_CMD_SET_MCAST_HASH;
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req.emr_in_buf = payload;
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req.emr_in_length = MC_CMD_SET_MCAST_HASH_IN_LEN;
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EFX_STATIC_ASSERT(MC_CMD_SET_MCAST_HASH_OUT_LEN == 0);
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req.emr_out_buf = NULL;
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req.emr_out_length = 0;
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memcpy(MCDI_IN2(req, uint8_t, SET_MCAST_HASH_IN_HASH0),
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epp->ep_multicst_hash, sizeof (epp->ep_multicst_hash));
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if (epp->ep_brdcst)
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EFX_SET_OWORD_BIT(*MCDI_IN2(req, efx_oword_t,
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SET_MCAST_HASH_IN_HASH1), 0x7f);
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efx_mcdi_execute(enp, &req);
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if (req.emr_rc != 0) {
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rc = req.emr_rc;
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goto fail2;
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}
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return (0);
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fail2:
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EFSYS_PROBE(fail2);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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return (rc);
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}
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#if EFSYS_OPT_LOOPBACK
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__checkReturn int
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siena_mac_loopback_set(
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__in efx_nic_t *enp,
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__in efx_link_mode_t link_mode,
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__in efx_loopback_type_t loopback_type)
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{
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efx_port_t *epp = &(enp->en_port);
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efx_phy_ops_t *epop = epp->ep_epop;
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efx_loopback_type_t old_loopback_type;
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efx_link_mode_t old_loopback_link_mode;
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int rc;
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/* The PHY object handles this on Siena */
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old_loopback_type = epp->ep_loopback_type;
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old_loopback_link_mode = epp->ep_loopback_link_mode;
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epp->ep_loopback_type = loopback_type;
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epp->ep_loopback_link_mode = link_mode;
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if ((rc = epop->epo_reconfigure(enp)) != 0)
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goto fail1;
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return (0);
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fail1:
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EFSYS_PROBE(fail2);
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epp->ep_loopback_type = old_loopback_type;
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epp->ep_loopback_link_mode = old_loopback_link_mode;
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return (rc);
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}
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#endif /* EFSYS_OPT_LOOPBACK */
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#if EFSYS_OPT_MAC_STATS
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__checkReturn int
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siena_mac_stats_clear(
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__in efx_nic_t *enp)
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{
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uint8_t payload[MC_CMD_MAC_STATS_IN_LEN];
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efx_mcdi_req_t req;
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int rc;
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req.emr_cmd = MC_CMD_MAC_STATS;
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req.emr_in_buf = payload;
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req.emr_in_length = sizeof (payload);
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EFX_STATIC_ASSERT(MC_CMD_MAC_STATS_OUT_DMA_LEN == 0);
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req.emr_out_buf = NULL;
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req.emr_out_length = 0;
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MCDI_IN_POPULATE_DWORD_3(req, MAC_STATS_IN_CMD,
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MAC_STATS_IN_DMA, 0,
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MAC_STATS_IN_CLEAR, 1,
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MAC_STATS_IN_PERIODIC_CHANGE, 0);
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efx_mcdi_execute(enp, &req);
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if (req.emr_rc != 0) {
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rc = req.emr_rc;
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goto fail1;
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}
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return (0);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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return (rc);
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}
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__checkReturn int
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siena_mac_stats_upload(
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__in efx_nic_t *enp,
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__in efsys_mem_t *esmp)
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{
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uint8_t payload[MC_CMD_MAC_STATS_IN_LEN];
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efx_mcdi_req_t req;
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size_t bytes;
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int rc;
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EFX_STATIC_ASSERT(MC_CMD_MAC_NSTATS * sizeof (uint64_t) <=
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EFX_MAC_STATS_SIZE);
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bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t);
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req.emr_cmd = MC_CMD_MAC_STATS;
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req.emr_in_buf = payload;
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req.emr_in_length = sizeof (payload);
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EFX_STATIC_ASSERT(MC_CMD_MAC_STATS_OUT_DMA_LEN == 0);
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req.emr_out_buf = NULL;
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req.emr_out_length = 0;
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MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
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EFSYS_MEM_ADDR(esmp) & 0xffffffff);
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MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
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EFSYS_MEM_ADDR(esmp) >> 32);
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MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
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/*
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* The MC DMAs aggregate statistics for our convinience, so we can
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* avoid having to pull the statistics buffer into the cache to
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* maintain cumulative statistics.
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*/
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MCDI_IN_POPULATE_DWORD_3(req, MAC_STATS_IN_CMD,
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MAC_STATS_IN_DMA, 1,
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MAC_STATS_IN_CLEAR, 0,
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MAC_STATS_IN_PERIODIC_CHANGE, 0);
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efx_mcdi_execute(enp, &req);
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if (req.emr_rc != 0) {
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rc = req.emr_rc;
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goto fail1;
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}
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return (0);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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return (rc);
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}
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__checkReturn int
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siena_mac_stats_periodic(
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__in efx_nic_t *enp,
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__in efsys_mem_t *esmp,
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__in uint16_t period,
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__in boolean_t events)
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{
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uint8_t payload[MC_CMD_MAC_STATS_IN_LEN];
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efx_mcdi_req_t req;
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size_t bytes;
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int rc;
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bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t);
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req.emr_cmd = MC_CMD_MAC_STATS;
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req.emr_in_buf = payload;
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req.emr_in_length = sizeof (payload);
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EFX_STATIC_ASSERT(MC_CMD_MAC_STATS_OUT_DMA_LEN == 0);
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req.emr_out_buf = NULL;
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req.emr_out_length = 0;
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MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
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EFSYS_MEM_ADDR(esmp) & 0xffffffff);
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MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
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EFSYS_MEM_ADDR(esmp) >> 32);
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MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
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/*
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* The MC DMAs aggregate statistics for our convinience, so we can
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* avoid having to pull the statistics buffer into the cache to
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* maintain cumulative statistics.
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*/
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MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD,
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MAC_STATS_IN_DMA, 0,
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MAC_STATS_IN_CLEAR, 0,
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MAC_STATS_IN_PERIODIC_CHANGE, 1,
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MAC_STATS_IN_PERIODIC_ENABLE, period ? 1 : 0,
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MAC_STATS_IN_PERIODIC_NOEVENT, events ? 0 : 1,
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MAC_STATS_IN_PERIOD_MS, period);
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efx_mcdi_execute(enp, &req);
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if (req.emr_rc != 0) {
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rc = req.emr_rc;
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goto fail1;
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}
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return (0);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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return (rc);
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}
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#define SIENA_MAC_STAT_READ(_esmp, _field, _eqp) \
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EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
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__checkReturn int
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siena_mac_stats_update(
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__in efx_nic_t *enp,
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__in efsys_mem_t *esmp,
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__out_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
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__out_opt uint32_t *generationp)
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{
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efx_qword_t rx_pkts;
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efx_qword_t value;
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efx_qword_t generation_start;
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efx_qword_t generation_end;
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_NOTE(ARGUNUSED(enp))
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/* Read END first so we don't race with the MC */
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END,
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&generation_end);
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EFSYS_MEM_READ_BARRIER();
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/* TX */
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_CONTROL_PKTS, &value);
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EFSYS_STAT_SUBR_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PAUSE_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PAUSE_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_UNICAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_UNICST_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTICAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULTICST_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BROADCAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_BRDCST_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BYTES, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_OCTETS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_128_TO_255_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_128_TO_255_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_256_TO_511_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_256_TO_511_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_512_TO_1023_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_512_TO_1023_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_1024_TO_15XX_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_1024_TO_15XX_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_GTJUMBO_PKTS, &value);
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EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BAD_FCS_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_ERRORS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_SGL_COL_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS,
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&value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULT_COL_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS,
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&value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_COL_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LATE_COLLISION_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LATE_COL_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_DEFERRED_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_DEF_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS,
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&value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_DEF_PKTS]), &value);
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/* RX */
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &rx_pkts);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &rx_pkts);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNICAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_UNICST_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MULTICAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MULTICST_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BROADCAST_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_BRDCST_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PAUSE_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PAUSE_PKTS]), &value);
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|
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNDERSIZE_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_64_PKTS, &value);
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EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
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|
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_65_TO_127_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_65_TO_127_PKTS]), &value);
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|
|
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_128_TO_255_PKTS, &value);
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_128_TO_255_PKTS]), &value);
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|
|
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_256_TO_511_PKTS, &value);
|
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EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_256_TO_511_PKTS]), &value);
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|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_512_TO_1023_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_512_TO_1023_PKTS]), &value);
|
|
|
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SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_1024_TO_15XX_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_1024_TO_15XX_PKTS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_GTJUMBO_PKTS, &value);
|
|
EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BAD_FCS_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FCS_ERRORS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_OVERFLOW_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_DROP_EVENTS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_FALSE_CARRIER_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FALSE_CARRIER_ERRORS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_SYMBOL_ERRORS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_ALIGN_ERROR_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_ALIGN_ERRORS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_INTERNAL_ERRORS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_JABBER_PKTS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_JABBER_PKTS]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_CHAR_ERR, &value);
|
|
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_CHAR_ERR]),
|
|
&(value.eq_dword[0]));
|
|
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_CHAR_ERR]),
|
|
&(value.eq_dword[1]));
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_CHAR_ERR, &value);
|
|
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_CHAR_ERR]),
|
|
&(value.eq_dword[0]));
|
|
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_CHAR_ERR]),
|
|
&(value.eq_dword[1]));
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_DISP_ERR, &value);
|
|
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_DISP_ERR]),
|
|
&(value.eq_dword[0]));
|
|
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_DISP_ERR]),
|
|
&(value.eq_dword[1]));
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_DISP_ERR, &value);
|
|
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_DISP_ERR]),
|
|
&(value.eq_dword[0]));
|
|
EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_DISP_ERR]),
|
|
&(value.eq_dword[1]));
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MATCH_FAULT, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MATCH_FAULT]), &value);
|
|
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_NODESC_DROPS, &value);
|
|
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_NODESC_DROP_CNT]), &value);
|
|
|
|
EFSYS_MEM_READ_BARRIER();
|
|
SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START,
|
|
&generation_start);
|
|
|
|
/* Check that we didn't read the stats in the middle of a DMA */
|
|
if (memcmp(&generation_start, &generation_end,
|
|
sizeof (generation_start)))
|
|
return (EAGAIN);
|
|
|
|
if (generationp)
|
|
*generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0);
|
|
|
|
return (0);
|
|
}
|
|
|
|
#endif /* EFSYS_OPT_MAC_STATS */
|
|
|
|
#endif /* EFSYS_OPT_SIENA */
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