4a9af7d53f
NetFPGA-10G Embedded CPU Ethernet Core. The current version operates on a simple PIO based interface connected to a NetFPGA-10G port. To avoid confusion: this driver operates on a CPU running on the FPGA, e.g. BERI/mips, and is not suited for the PCI host interface. MFC after: 1 week Relnotes: yes Sponsored by: DARPA/AFRL
27 lines
1.4 KiB
Plaintext
27 lines
1.4 KiB
Plaintext
# $FreeBSD$
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dev/altera/atse/if_atse.c optional altera_atse
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dev/altera/atse/if_atse_fdt.c optional altera_atse fdt
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dev/altera/atse/if_atse_nexus.c optional altera_atse
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dev/altera/jtag_uart/altera_jtag_uart_cons.c optional altera_jtag_uart
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dev/altera/jtag_uart/altera_jtag_uart_tty.c optional altera_jtag_uart
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dev/altera/jtag_uart/altera_jtag_uart_fdt.c optional altera_jtag_uart fdt
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dev/altera/jtag_uart/altera_jtag_uart_nexus.c optional altera_jtag_uart
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dev/netfpga10g/nf10bmac/if_nf10bmac_fdt.c optional netfpga10g_nf10bmac fdt
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dev/netfpga10g/nf10bmac/if_nf10bmac.c optional netfpga10g_nf10bmac
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dev/terasic/de4led/terasic_de4led.c optional terasic_de4led
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dev/terasic/de4led/terasic_de4led_fdt.c optional terasic_de4led fdt
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dev/terasic/de4led/terasic_de4led_nexus.c optional terasic_de4led
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dev/terasic/mtl/terasic_mtl.c optional terasic_mtl
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dev/terasic/mtl/terasic_mtl_fdt.c optional terasic_mtl fdt
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dev/terasic/mtl/terasic_mtl_nexus.c optional terasic_mtl
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dev/terasic/mtl/terasic_mtl_pixel.c optional terasic_mtl
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dev/terasic/mtl/terasic_mtl_reg.c optional terasic_mtl
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dev/terasic/mtl/terasic_mtl_syscons.c optional terasic_mtl
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dev/terasic/mtl/terasic_mtl_text.c optional terasic_mtl
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mips/beri/beri_machdep.c standard
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mips/beri/beri_pic.c optional fdt
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mips/beri/beri_simplebus.c optional fdt
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mips/beri/fdt_ic_if.m optional fdt
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mips/mips/intr_machdep.c standard
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mips/mips/tick.c standard
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